JOURNAL OF CIRCUITS AND SYSTEMS September, (2002) HDTV RTOS [1] [2] [3] [4]

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1 7 3 Vol.7 No JOURNAL OF CIRCUITS AND SYSTEMS September, (2002) HDTV RTOS *,,, SOC SOC HDTV Iota Iota RTOS SOC TP316/TN402 A 1 SOC (Time-To-Market) RTOS [1] [2] RTOS RTOS SOC [3] [4] SOC 10kB RTOS RTOS psos QNX VxWorks Windows CE HARTOS Spring Kernel SOC Windows CE 200KB [5] HDTV MPEG-2 MP@HL MIPS R4000 RISC Virgo [6] AC3 RTOS RTOS DMA Iota I/O DMA 2 Iota 3 HDTV 4 Iota I/O 5 Iota SOC-Y-3-2

46 7 7 2 Iota Iota SOC Iota 1 Iota HDTV I/O 9.

MPEG-2 AC-3 Audio Frame Buffer Video Frame Buffer RISC TS

2 Iota Iota SOC Iota 1 Iota HDTV I/O 9.4k 1 Iota Iota SOC Iota 2 3 HDTV 2 CPU TS OSD(On-Screen-Display) [2] (BIU) DMA CPU TS HDTV 3 TS TS Packets Buffer Video Packets Buffer Audio Packets Buffer MPEG-2 AC-3 Audio Frame Buffer Video Frame Buffer RISC TS Audio Playback 4 I/O 3 HDTV Iota 441 TS OSD RISC HDTV OSD T 1 TS T 2 AC3 T 3 T 0

3 3 HDTV RTOS ms RISC TS AC3 T 2 TS AC3 Iota T 2 T 3 [5] RM Rate-Monotonic EDF Earliest-Deadline-First [5][7] RM EDF RM T 1 T 2 {T 1,T 2 } {T 1,T 2 } T 3 {T 1,T 2 } RM 5.2 AC3 5.5ms T 0 4 {T 1,T 2 } T 3 {T 1,T 2 } RM T 1 T 2 T 1 T 2 T 1 T 0 T 0 {T 1,T 2 } T 2 RISC ISR T 1 T 2 Ready T 1 T 2 T 1 T 1 T 2 T 2 T 3 T Iota SOC RTOS [8] Iota Buffer Iota Iota TLB Translation Lookaside TLB TID TLB TID Iota domain space T 1

4 48 7 TLB miss TLB TLB Iota TLB TLB TLB miss TLB TID TID 6.1 Virgo X86 CPU Motorola [8] Virgo TLB TLB CPU 6.2 Iota PROM RAM stuct domain { int * text_start; TCB int *data_start; int *stack_start; domain domain 5 int text_len; domain TLB int data_len; Virgo TID TLB } TLB miss Iota 5 domain 7 Verilog-XL [2] Iota Iota 7.4Kbytes 2Kbytes RTOS RM TS AC3 Iota MHz Virgo µs TLB PID 4 20 HDTV SOC [1] Yanbing Li, Potkonjak M Wolf W. Real-time operating systems for embedded computing [A]. IEEE International Conference on Computer Design: VLSI in Computers and Processors[C], ICCD 97: int stack_len; [2]. RISC [A]. 16 [C], [3]. RTOS [J]., 2001, [4] Iwasaki H Naganuma J Endo M Ogura T. On-chip multimedia real-time OS and its MPEG-2 applications[a]. Sixth International Conference

5 3 HDTV RTOS 49 on Real-time Computing Systems and Applications, RTCSA '99[C], 1999, [5] Khawar M. Zuberi, Padmanabhan Pillai, Kang G. Shin. EMERALDS: a small-memory real-time micro-kernel[a]. 17 th ACM Symposium on Operating System Principles (SOSP 99)[C]. Published as Operating Systems Review[J], ,.34(5): , [6]. HDTV RISC [A]. 16 ICCAS2001 [C] [7] Krishna C M Kang G Shin. Real-time Systems[M]. The McGraw-Hill Companies, [8] Khawar M Zuberi, Kang G Shin. EMERALDS: A Microkernel for Embedded Real-time Systems[A]. Proceedings of Real-time Technology and Applications Symposium[C], 1996, SOC VLSI Design and Implementation of RTOS for a HDTV Integrated Source Decoding Chip GAO Feng, LIU Peng, YAO Qing-dong, LI Dong-xiao (Department of Information Science & Electronic Engineering, Zhejiang University, Hangzhou , China) Abstract: Because of the complexity and Time-To-Market challenge in system-on-chip (SOC) design, the real-time operating system (RTOS) has become indispensable in SOC. In the HDTV integrated source-decoding chip, the RTOS, named Iota, is designed for the management of memory units, I/O devices and the scheduling and synchronization of multitasks. In this article, the design principle of a multi-task real-time operating system with small-memory footprint is proposed. The I/O management of Iota is implemented in hardware components and a hybrid scheduling mechanism is adopted for the tasks in the decoding chip. Furthermore, a simple memory protection mechanism is realized to improve the robustness of the system. Keywords: Real-time Operating System (RTOS); System on Chip (SOC); Hardware/Software Co-design; Real-time Scheduling; Memory Protection 57 (from page 57) Image Secure Communication System Based on Chaotic Maps and Software Implementation TAN Jian-ming, QIU Shui-sheng, WU Min (Dept. of Electronic & Communication Eng. South China Univ. of Tech, Guangzhou ,China) Abstract: A program for image encryption communication based on chaotic maps is implemented. The algorithm in the proposed program can mask the image data and permute pixel s location by chaotic sequences. In addition to exact recovery of original signal and high operational peed, this algorithm provides very high security. Illustrative examples are also presented to demonstrate the effectiveness of the algorithm and program. Key words: chaos; secure communication; soft implementation

Hardware/Software Codesign for Embedded RISC Core *

Hardware/Software Codesign for Embedded RISC Core * Peng Liu 1 Zhejiang University Department of Information Science & Electronic Engineering Hangzhou, 310027, China ABSTRACT This paper describes hardware/software