style Click to edit Master text Click to edit Master subtitle style Rodrigo Améstica Click to edit Master text styles
|
|
- Sabrina Beasley
- 5 years ago
- Views:
Transcription
1 Correlator DataMaster Processor Click to edit title Click to edit Master subtitle style style Click to edit Master text Rodrigo Améstica Click to edit Master text styles Atacama Large Millimeter/submillimeter Array Karl G. Jansky Very Large Array Robert C. Byrd Green Bank Telescope Very Long Baseline Array
2 Outline Cluster overview Data acquisition: hardware interface, data content and handling in software, lags normalization. Data processing: on-line calibration and transformation from normalized correlator lags to auto-correlations and visibilities. Data delivery: data collecting from nodes and formatting into a binary data format suitable for storage. ALMA Correlator Workshop, May,
3
4 CDP Application Deployment
5 Data Acquisition
6 Data Port Interface
7 Hardware Time Stamp to Absolute time
8 From DMA to Application Memory
9 Lag Processing Overview
10 Data Processing
11 Raw Lags from the Correlator Correlator Multiplication table and accumulation 2-bit sampling per antenna Voltage Binary Weight Analog v l v Gsp 0 v <v l v l v < v v l bit 4 Gsp TDM 20 log 10 ( ) L(τ) raw correlation function 250 MiLags/sec 250 MiLags/sec bias implies Vs db bit integers 32-bit CDP 32-bit floats 8e6 visibilities/sec BDF blobs within ASDM
12 Data Processing Stages
13 2x2-bit Quantization Correction 1 po l σ 1, σ 2 ρ(τ) Vl ec k yn om ia l correlation function ρ Va n R4 (τ) correlation coefficient rms / volt 0 requires signal level for each one antenna in a base-line ρ4
14 Options to Access Total Power On-line Correlator (0) current TDM lag zero available on every correlator dump. (0) or (1) CDP (1) 3-bit population counts added to dumps' meta-data. It would imply just 8 additional integer values per antenna. CAN bus Ethernet (2) (3) IFProc (4) DTX CCC DTX: digital transmitter IFProc: intermediate frequency processor (2) CCC retrieves population counts through specific CAN bus protocol and forwards to CDP (-1683) (3) & (4) devices such IFProc (full fledged square law detector) or DTX could either publish already computed total power figures or population counts, respectively.
15 Spectral Normalization
16 Residual Delay Correction
17 Atmospheric Path Length Correction
18 Data Delivery
19 Incremental Binary Data Formatting
20 Flagging and Blanking Bit Name Reason Implies blanking 0 INTEGRATION_FULLY_BLANKED Empty integration Yes 1 WVR_APC WVR coefficients not received. Yes 2 CORRELATOR_MISSING_STATUS Correlator status not received. Maybe 3 MISSING_ANTENNA_EVENT Antenna delay event was not received. Yes 5 DELAY_CORRECTION_NOT_APPLIED Residual delay correction was not applied. Yes 6 SYNCRONIZATION_ERROR CDP node(s) not properly synchronized N/A 8 TFB_SCALING_FACTOR_NOT_RETRIEVED TFB scaling factor not available. No 9 ZERO_LAG_NOT_RECEIVED Cross CDP node has no auto data. No 12 QC_FAILED Quantization correction failed. No 13 NOISY_TDM_CHANNELS First TDM channels clipped in software. No 14 SPECTRAL_NORMALIZATION_FAILED Cross-correlation not normalized. No 31 ALL_PURPOSE_ERROR Used for troubleshooting purposes. Maybe (*) Not used at this moment (*) To become obsolete Flagging or blanking an integration product is described by additional binary attachments within a BDF sub-header: Flagging implies a flags binary attachment. Blanking implies actual times and actual durations attachments. Flagging and blanking can happen at the same time.
21 Computation and Data Transport Overheads
22 BDF Processing Overview
23 Future Correlator Modes 3-bit, 4-bit quantization modes and double Nyquist sampling to improve sensitivity. A 2-bit correlator provides 88% efficiency, a 3-bit correlator has 96% efficiency, and a 4-bit correlator 99% efficiency. Low complexity. CCC to deduce parameters for already existing protocol. CDP to implement already documented algorithms. 1 software release. Fast accumulation mode. 1 ms correlator dumps in autocorrelation mode only. Low complexity. Already implemented, revive after so much unrelated changes. 1 software release MHz bandwidth modes (highest spectral resolution). Low complexity. CCC to deduce parameters for already existing protocol. CDP to extend frequency-to-channel index mapping. 1 software release.
24 Future Correlator Modes cont'd Side-band separation based on LO1 and TFB frequency offsetting, such that some sub-bands are assigned USB and others LSB, simultaneously. ALMA Use of LO Offsetting for Spurious Signal Suppression and Sideband R ejection Medium complexity. CCC and CDP need to agree how to assign TFB subbands. No new protocols required. 2 software releases. Tsys in FDM mode to allow for more accurate weighting of atmospheric features. High complexity. Sub-tasks in require some attention from CCC and CDP. Never used before protocols. 3 software releases.
25 Future Correlator Modes cont'd Multi-resolution modes to allow for a zoom-in like feature per base-band. Better bandwidth utilization by allowing to observe at two different spectral resolutions within the same base-band. High complexity. There will be some iterations to fully understand the protocol to configure different fractional modes. 3 software releases.
The Correlator Control Computer
The Correlator Control Computer J Perez Atacama Large Millimeter/submillimeter Array Karl G. Jansky Very Large Array Robert C. Byrd Green Bank Telescope Very Long Baseline Array ICT CCC Functional Overview
More informationALMA Correlator Enhancement
ALMA Correlator Enhancement Technical Perspective Rodrigo Amestica, Ray Escoffier, Joe Greenberg, Rich Lacasse, J Perez, Alejandro Saez Atacama Large Millimeter/submillimeter Array Karl G. Jansky Very
More informationCorrelator Subsystem Software Design
COMP-70.40.00.00-001-E-DSN Jim Pisano Prepared By: Name(s) and Signature(s) Organization Date Jim Pisano NRAO 2008-08-01 Approved By: Name and Signature Organization Date Released By: Name and Signature
More informationALMA Test Correlator Control Computer Software Design
ALMA Test Correlator Control Computer Software Design Jim Pisano 2001-03-27 Page 1 of 54 Contents LIST OF FIGURES... 4 LIST OF TABLES... 4 1 INTRODUCTION... 4 1.1 Test Correlator Hardware Description...5
More informationPMC-12AI Channel, 12-Bit Analog Input PMC Board. With 1,500 KSPS Input Conversion Rate
PMC-12AI64 64-Channel, 12-Bit Analog Input PMC Board With 1,500 KSPS Input Conversion Rate Features Include: 64 Single-ended or 32 Differential 12-Bit Scanned Analog Input Channels Sample Rates to 1,500
More informationI VLB A Correlator Memo No.jkfLl (860506)
I VLB A Correlator Memo No.jkfLl (860506) National Radio Astronomy Observatory Charlottesville, Virginia 5 May, 1986 To: VLBA Correlator Memo Series From: John Benson, Ray Escoffier Subject: On-line Computers
More information12AI Channel, 12-Bit Analog Input PMC Board. With 1,500 KSPS Input Conversion Rate
64-Channel, 12-Bit Analog Input PMC Board With 1,500 KSPS Input Conversion Rate Available in PMC, PCI, cpci and PC104-Plus and PCI Express form factors as: PMC-12AI64: PCI-12AI64: cpci-12ai64: PC104P-12AI64:
More informationCASA. Emmanuel Momjian (NRAO)
CASA Emmanuel Momjian (NRAO) Atacama Large Millimeter/submillimeter Array Karl G. Jansky Very Large Array Robert C. Byrd Green Bank Telescope Very Long Baseline Array CASA CASA is the offline data reduction
More informationPCI-16HSDI: 16-Bit, Six-Channel Sigma-Delta Analog Input PMC Board. With 1.1 MSPS Sample Rate per Channel, and Two Independent Clocks
PMC-16HSDI 16-Bit, Six-Channel Sigma-Delta Analog Input PMC Board With 1.1 MSPS Sample Rate per Channel, and Two Independent Clocks Available also in PCI, cpci and PC104-Plus form factors as: PCI-16HSDI:
More informationCPCI-12AI Channel, 12-Bit Analog Input CPCI Board With 1,500 KSPS Input Conversion Rate
CPCI-12AI64 64-Channel, 12-Bit Analog Input CPCI Board With 1,500 KSPS Input Conversion Rate Features Include: 64 Single-ended or 32 Differential 12-Bit Scanned Analog Input Channels Sample Rates to 1,500
More informationVisualization & the CASA Viewer
Visualization & the Viewer Juergen Ott & the team Atacama Large Millimeter/submillimeter Array Expanded Very Large Array Robert C. Byrd Green Bank Telescope Very Long Baseline Array Visualization Goals:
More informationProduct Information Sheet PDA14 2 Channel, 14-Bit Waveform Digitizer APPLICATIONS FEATURES OVERVIEW
Product Information Sheet PDA 2 Channel, -Bit Waveform Digitizer FEATURES 2 Channels at up to 100 MHz Sample Rate Bits of Resolution Bandwidth from DC-50 MHz 512 Megabytes of On-Board Memory 500 MB/s Transfer
More informationCPCI-16HSDI. 16-Bit, Six-Channel Sigma-Delta Analog Input Board. With 1.1 MSPS Sample Rate per Channel, and Two Independent Clocks.
02/01/01 CPCI-16HSDI 16-Bit, Six-Channel Sigma-Delta Analog Input Board With 1.1 MSPS Sample Rate per Channel, and Two Independent Clocks Features Include: Sigma-Delta Conversion; No External Antialiasing
More informationET4254 Communications and Networking 1
Topic 2 Aims:- Communications System Model and Concepts Protocols and Architecture Analog and Digital Signal Concepts Frequency Spectrum and Bandwidth 1 A Communications Model 2 Communications Tasks Transmission
More informationPCI-12AIO 12-Bit Analog Input/Output PCI Board
PCI-12AIO 12-Bit Analog Input/Output PCI Board With 32 Input Channels, 4 Output Channels, a 16-Bit Digital I/O Port and 1.5 MSPS Input Conversion Rate Features: 32 Single-Ended or 16 Differential 12-Bit
More informationAdvanced Multi-Beam Spect rom et er for t he GBT
Advanced Multi-Beam Spect rom et er for t he Conceptual Software Design Amy Shelton, Patrick Brandt, Bob Garwood, Joe Masters, Mark Whitehead NRAO and U.C. Berkeley Joint Conceptual Design Review January
More informationDT9828. Low-Cost, Isolated, Thermocouple Measurement Module. Overview. Key Features. Supported Operating Systems
DT9828 Low-Cost, Isolated, Thermocouple Measurement Module Overview The DT9828 is an 8-channel, isolated thermocouple DAQ module that features superb accuracy yet is lowcost and easy-to-use. The DT9828
More informationPC104P-16AIO Bit Analog Input/Output PC104-Plus Board
PC104P-16AIO168 16-Bit Analog Input/Output PC104-Plus Board With 16 Input Channels and 8 Output Channels (Similar GSC Product) Features Include: 16 Single-Ended or 8 Differential 16-Bit Scanned Analog
More informationPMC-12AIO. 12-Bit PMC Analog Input/Output Board
PMC-12AIO 12-Bit PMC Analog Input/Output Board With 32 Input Channels, 4 Output Channels, a 16-Bit Digital I/O Port and 1.5 MSPS Input Conversion Rate Features: 32 Single-Ended or 16 Differential 12-Bit
More informationAdaptive selfcalibration for Allen Telescope Array imaging
Adaptive selfcalibration for Allen Telescope Array imaging Garrett Keating, William C. Barott & Melvyn Wright Radio Astronomy laboratory, University of California, Berkeley, CA, 94720 ABSTRACT Planned
More informationIsolated, Field Configurable Analog Input 6B11 / 6B11HV FEATURES APPLICATIONS PRODUCT OVERVIEW
Isolated, Field Configurable Analog Input 6B11 / 6B11HV FEATURES Single-channel isolated signal-conditioning modules. Accepts outputs from Thermocouple, millivolt, volt and current signals. Complete microcomputer-based
More informationPMC-16AIO 16-Bit Analog Input/Output PMC Board With 32 Input Channels, 4 Output Channels and 16-Bit Digital I/O Port
PMC-16AIO 16-Bit Analog Input/Output PMC Board With 32 Input Channels, 4 Output Channels and 16-Bit Digital I/O Port Features Include: 32 Single-Ended or 16 Differential 16-Bit Scanned Analog Input Channels
More informationCorrelX: A Cloud-Based VLBI Correlator
CorrelX: A Cloud-Based VLBI Correlator V. Pankratius, A. J. Vazquez, P. Elosegui Massachusetts Institute of Technology Haystack Observatory pankrat@mit.edu, victorpankratius.com 5 th International VLBI
More information16AIO Bit Analog Input/Output Board. With 16 Input Channels and 8 Output Channels
16AIO168 16-Bit Analog Input/Output Board With 16 Input Channels and 8 Output Channels Available in PMC, PCI, cpci, PCI-104 and PC104-Plus and PCI Express form factors as: PMC-16AIO168: PMC, Single-width
More informationA 20 GSa/s 8b ADC with a 1 MB Memory in 0.18 µm CMOS
A 20 GSa/s 8b ADC with a 1 MB Memory in 0.18 µm CMOS Ken Poulton, Robert Neff, Brian Setterberg, Bernd Wuppermann, Tom Kopley, Robert Jewett, Jorge Pernillo, Charles Tan, Allen Montijo 1 Agilent Laboratories,
More informationNHSC HIFI DP workshop Caltech, September A Tour of HIFI Data. - page 1
NHSC HIFI DP workshop Caltech, 12-13 September 2012 A Tour of HIFI Data - page 1 Outline Opening the observation context A casual look at the HIPE GUI presentation of your data How to plot the spectra
More informationDepartment of Computer Science and Engineering. CSE 3213: Computer Networks I (Summer 2008) Midterm. Date: June 12, 2008
Department of Computer Science and Engineering CSE 3213: Computer Networks I (Summer 2008) Midterm Date: June 12, 2008 Name: Student number: Instructions: Examination time: 120 minutes. Write your name
More informationMeerKAT Data Architecture. Simon Ratcliffe
MeerKAT Data Architecture Simon Ratcliffe MeerKAT Signal Path MeerKAT Data Rates Online System The online system receives raw visibilities from the correlator at a sufficiently high dump rate to facilitate
More informationAllan Variance Analysis of Random Noise Modes in Gyroscopes
Allan Variance Analysis of Random Noise Modes in Gyroscopes Alexander A. Trusov, Ph.D. Alex.Trusov@gmail.com, AlexanderTrusov.com, MEMS.eng.uci.edu MicroSystems Laboratory, Mechanical and Aerospace Engineering
More informationECE4703 B Term Laboratory Assignment 2 Floating Point Filters Using the TMS320C6713 DSK Project Code and Report Due at 3 pm 9-Nov-2017
ECE4703 B Term 2017 -- Laboratory Assignment 2 Floating Point Filters Using the TMS320C6713 DSK Project Code and Report Due at 3 pm 9-Nov-2017 The goals of this laboratory assignment are: to familiarize
More informationUNIT II SYSTEM BUS STRUCTURE 1. Differentiate between minimum and maximum mode 2. Give any four pin definitions for the minimum mode. 3. What are the pins that are used to indicate the type of transfer
More informationDesign of a Gigabit Distributed Data Multiplexer and Recorder System
Design of a Gigabit Distributed Data Multiplexer and Recorder System Abstract Albert Berdugo VP of Advanced Product Development Teletronics Technology Corporation Bristol, PA Historically, instrumentation
More informationPC104P-24DSI6LN. Six-Channel Low-Noise 24-Bit Delta-Sigma PC104-Plus Analog Input Module. With 200 KSPS Sample Rate per Channel
PC104P-24DSI6LN Six-Channel Low-Noise 24-Bit Delta-Sigma PC104-Plus Analog Input Module With 200 KSPS Sample Rate per Channel Available also in PCI, cpci and PMC form factors as: PCI-24DSI6LN: cpci-24dsi6ln:
More informationUSER MANUAL EXPERIENCE INCREDIBLE PERFORMANCE V2.3
USER MANUAL EXPERIENCE INCREDIBLE PERFORMANCE V2.3 CONTENTS 1 INTRODUCTION... 3 2 INTERFACE DESIGN... 4 2.1 Connectivity... 5 2.2 Analog Interface... 6 2.3 I 2 C Interface... 7 2.4 I 2 C Operations...
More informationProduct Information Sheet PX Channel, 14-Bit Waveform Digitizer
Product Information Sheet PX14400 2 Channel, 14-Bit Waveform Digitizer FEATURES 2 Analog Channels at up to 400 MHz Sample Rate per Channel 14 Bits of Resolution Bandwidth from 100 KHz to 400 MHz 1 Gigabyte
More informationUsing CASA to Simulate Interferometer Observations
Using CASA to Simulate Interferometer Observations Nuria Marcelino North American ALMA Science Center Atacama Large Millimeter/submillimeter Array Expanded Very Large Array Robert C. Byrd Green Bank Telescope
More informationProduct Information Sheet PDA GHz Waveform Digitizer APPLICATIONS FEATURES OVERVIEW
Product Information Sheet PDA1000 1 GHz Waveform Digitizer FEATURES Single channel at up to 1 GHz sample rate Bandwidth from DC-500 MHz 256 Megabytes of on-board memory 500 MB/s transfer via Signatec Auxiliary
More informationPMC-16AI Channel, 16-Bit Analog Input PMC Board. With 500 KSPS Input Conversion Rate. Features Include: Applications Include:
PMC-16AI64 64-Channel, 16-Bit Analog Input PMC Board With 500 KSPS Input Conversion Rate Features Include: 64 Single-ended or 32 Differential 16-Bit Scanned Analog Input Channels Conversion Rates to 500K
More informationThe Link Layer and LANs. Chapter 6: Link layer and LANs
The Link Layer and LANs EECS3214 2018-03-14 4-1 Chapter 6: Link layer and LANs our goals: understand principles behind link layer services: error detection, correction sharing a broadcast channel: multiple
More informationMiniaturized Multi-Channel Thermocouple Sensor System
Miniaturized Multi-Channel Thermocouple Sensor System Feb. 23 Dr. Darold Wobschall and Avarachan Cherian Esensors Inc. IEEE SAS 2011 1 Agenda Goals Handles multiple thermocouples Reference junction compensation
More informationSoftware Overview. Bryan Butler. EVLA Advisory Committee Meeting, March 19-20, EVLA Computing Division Head
Software Overview EVLA Advisory Committee Meeting, March 19-20, 2009 Bryan Butler EVLA Computing Division Head Software Scope Software to control and monitor antennas and correlator; includes software
More informationPC104P-24DSI Channel 24-Bit Delta-Sigma PC104-Plus Analog Input Board
PC104P-24DSI12 12-Channel 24-Bit Delta-Sigma PC104-Plus Analog Input Board With 200 KSPS Sample Rate per Channel and Optional Low-Power Configuration Available also in PCI, cpci and PMC form factors as:
More informationOverview: Functional Description:
CPCI-ADADIO 12-Channel 16-Bit Analog I/O CPCI Card With 8 Simultaneous Input Channels at 200K Samples per Second per Channel, 4 Output Channels, and Byte-Wide Digital I/O Port Features Include: 8 Analog
More informationCASA Pipelines. Liz Humphreys. ESO ALMA Regional Centre
CASA Pipelines Liz Humphreys ESO ALMA Regional Centre Overview ALMA and VLA have CASA Pipelines Currently calibration only Diagnostic calibrator images ALMA science target imaging being commissioned The
More informationChapter 1 Introducing the OM-USB Functional block diagram... 5
Table of Contents Preface About this User's Guide... 4 What you will learn from this user's guide... 4 Conventions in this user's guide... 4 Where to find more information... 4 Safety guidelines... 4 Chapter
More informationSpecifications USB-1616HS
Document Revision 1.0, August, 2007 Copyright 2007, Measurement Computing Corporation Typical for 25 C unless otherwise specified. Specifications in italic text are guaranteed by design. Analog input A/D
More information16AIO 16-Bit Analog Input/Output Board With 32 Input Channels, 4 Output Channels and 16-Bit Digital I/O Port
16AIO 16-Bit Analog Input/Output Board With 32 Input Channels, 4 Output Channels and 16-Bit Digital I/O Port Features Include: Available in PMC, PCI, cpci and PC104-Plus and PCI Express form factors as:
More informationcpci6u-24dsi32r 32-Channel 24-Bit Delta-Sigma Analog Input Board
cpci6u-24dsi32r 32-Channel 24-Bit Delta-Sigma Analog Input Board FEATURES: 32 Differential 24-Bit Analog Input Channels Delta-Sigma Converter per Channel, with Linear Phase Digital Antialias Filtering
More informationPXDAC4800. Product Information Sheet. 1.2 GSPS 4-Channel Arbitrary Waveform Generator FEATURES APPLICATIONS OVERVIEW
Product Information Sheet PXDAC4800 1.2 GSPS 4-Channel Arbitrary Waveform Generator FEATURES 4 AC-Coupled or DC-Coupled DAC Channel Outputs 14-bit Resolution @ 1.2 GSPS for 2 Channels or 600 MSPS for 4
More informationChapter 6 Data Acquisition and Spectral Analysis System high-speed digitizer card for acquiring time-domain data. The digitizer is used in
Chapter 6 Data Acquisition and Spectral Analysis System 6.1 Introduction This chapter will discuss the hardware and software involved in developing the data acquisition and spectral analysis system. The
More information111 Highland Drive Putnam, CT USA PHONE (860) FAX (860) SM32Pro SDK
SM32Pro SDK Spectrometer Operating Software USER MANUAL SM301/SM301EX Table Of Contents Warranty And Liability...3 Quick Start Installation Guide...4 System Requirements...5 Getting Started...6 Using the
More informationSCHEDULE AND TIMELINE. The Project WBS, expanded to level 2, presented in the form of a Gantt chart
ALMA Test Interferometer Project Book, Chapter 14 SCHEDULE AND TIMELINE Richard Simon Last Changed 2000-Feb-22 Revision History: 2000-Feb-22: Initial version created (R. Simon) Introduction This chapter
More information275 to 550 MHz Frequency Synthesizer
LCFS1055-DEMO 275 to 550 MHz Frequency Synthesizer Low Phase Noise in a Lower Cost Package Features Low Phase Noise: -116 dbc/hz (100 khz offset) Internal Reference Oscillator (External Option at No Extra
More informationPC104P66-16HSDI4AO4:
PMC66-16HSDI4AO4 16-Bit, 8-Channel, 1-MSPS PMC Analog Input/Output Board With Four Simultaneously Sampled Sigma-Delta Analog Inputs, and Four Buffered Analog Outputs, Available also in PCI, cpci and PC104-Plus
More informationVertex Detector Electronics: ODE to ECS Interface
Vertex Detector Electronics: ODE to ECS Interface LHCb Technical Note Issue: 1 Revision: 0 Reference: LHCb 2000-012 VELO Created: 1 February 2000 Last modified: 20 March 2000 Prepared By: Yuri Ermoline
More informationScience Data Model v2
Science Data Model v2 François Viallefond Observatoire de Paris - LERMA Steve Torchinsky Observatoire de Paris - USN François Viallefond Science Data Model v2 CALIM2010, Dwingeloo, 24 Aug 2010 1 Science
More informationIsolated, Voltage or Current Input 7B30 FEATURES APPLICATIONS PRODUCT OVERVIEW FUNCTIONAL BLOCK DIAGRAM
Isolated, Voltage or Current Input 7B30 FEATURES Interfaces, amplifies and filters unipolar and bipolar millivolt and voltage inputs. Provides a protected precision output of either +1 V to +5 V or 0 V
More informationArgus Radio Telescope Architecture
Argus Radio Telescope Architecture Douglas Needham http://cinnion.ka8zrt.com http://www.naapo.org Argus Architecture p.1/15 Introduction: Traditional Telescopes Radio telescopes commonly consist of a single
More informationCCVPX-16AI32SSC1M. 32-Channel, Differential, 16-Bit Simultaneous Sampling; Conduction-Cooled VPX Analog Input Board
CCVPX-16AI32SSC1M 32-Channel, Differential, 16-Bit Simultaneous Sampling; Conduction-Cooled VPX Analog Input Board With 1.0MSPS Sample Rate per Channel, Time-tagging, Low-latency access, and Front-Panel
More informationOTO Photonics. Sidewinder TM Series Datasheet. Description
OTO Photonics Sidewinder TM Series Datasheet Description SW (Sidewinder TM ) Series spectrometer,built with the InGaAs type sensor and high performance 32bits RISC controller in, is specially designed
More informationCS 4453 Computer Networks Winter
CS 4453 Computer Networks Chapter 2 OSI Network Model 2015 Winter OSI model defines 7 layers Figure 1: OSI model Computer Networks R. Wei 2 The seven layers are as follows: Application Presentation Session
More informationSelf-calibration: about the implementation in GILDAS. Vincent Piétu IRAM. IRAM millimeter interferometry summerschool
Self-calibration: about the implementation in GILDAS Vincent Piétu IRAM 1 About an interferometer sensitivity One usually considers only the noise equation to assess the feasibility of an observation.
More informationCS 455/555 Intro to Networks and Communications. Link Layer
CS 455/555 Intro to Networks and Communications Link Layer Dr. Michele Weigle Department of Computer Science Old Dominion University mweigle@cs.odu.edu http://www.cs.odu.edu/~mweigle/cs455-s13 1 Link Layer
More informationSR3_Analog_32. User s Manual
SR3_Analog_32 User s Manual by with the collaboration of March 2nd 2012 1040, avenue Belvédère, suite 215 Québec (Québec) G1S 3G3 Canada Tél.: (418) 686-0993 Fax: (418) 686-2043 1 INTRODUCTION 4 2 TECHNICAL
More informationIsolated Wideband Voltage Input 3B40 / 3B41 FEATURES APPLICATIONS PRODUCT OVERVIEW FUNCTIONAL BLOCK DIAGRAM
Isolated Wideband Voltage Input 3B40 / 3B41 FEATURES Interfaces, amplifies, protects& filters wide-bandwidth (h0 khz) single-channel analog voltage inputs. Module provides simultaneous precision voltage
More informationADM-96S AND ADM-48D HIGH PERFORMANCE DATA ACQUISITION SYSTEMS
ADM-96S AND ADM-48D HIGH PERFORMANCE DATA ACQUISITION SYSTEMS ADM-96S DATA ACQUISITION SYSTEM 500-1-0-4100 REV.A ADM-96S / 48D VME MODULE KEY FEATURES Up to 96 Single Ended Input (ADM-96S) Up to 48 Differential
More informationRASDRWin Companion Software for RASDR. Paul Oxley Retired AT&T Microwave Engineer David Fields Stan Kurtz
RASDRWin Companion Software for RASDR Paul Oxley Retired AT&T Microwave Engineer David Fields Stan Kurtz Abstract: An update of the RASDR project will be presented. The paper demonstrates Windows control
More informationUsing CASA to Simulate Interferometer Observations
Using CASA to Simulate Interferometer Observations Nuria Marcelino North American ALMA Science Center Atacama Large Millimeter/submillimeter Array Expanded Very Large Array Robert C. Byrd Green Bank Telescope
More information32-CHANNEL 16-BIT TRANSDUCER INPUT PMC
16AICS32 32-CHANNEL 16-BIT TRANSDUCER INPUT PMC With Scanning Input Current Source Available in PMC, PCI, cpci and PC104-Plus and PCI Express form factors as: PMC-16AICS32: PCI-1616AICS32: cpci-16aics32:
More informationExperiment 3. Getting Start with Simulink
Experiment 3 Getting Start with Simulink Objectives : By the end of this experiment, the student should be able to: 1. Build and simulate simple system model using Simulink 2. Use Simulink test and measurement
More information16-Bit, 12-Channel, 2-MSPS PMC Analog Input/Output Board
PMC66-16AISS8AO4 16-Bit, 12-Channel, 2-MSPS PMC Analog Input/Output Board With Eight Simultaneously Sampled Analog Inputs, Four Analog Outputs, and Input Sampling Rates to 2.0 MSPS per channel Available
More informationIsolated Voltage Input 3B30 / 3B31 FEATURES APPLICATIONS PRODUCT OVERVIEW FUNCTIONAL BLOCK DIAGRAM
Isolated Voltage Input 3B30 / 3B31 FEATURES Interfaces, amplifies, & filtersanalog input voltages. Narrow-bandwidth (3Hz) single-channel single conditioning. Module provides simultaneous precision voltage
More information12-Channel, 12-Bit PMC Analog Input/Output Board
12-Channel, 12-Bit PMC Analog Input/Output Board With Eight Simultaneously-Sampled Wide-Range Inputs at 2.0 MSPS per Channel, Four Analog Outputs, and 16-Bit Digital I/O Port Available also in PCI, cpci
More informationIsolated, Process Current Output 7B39 FEATURES APPLICATIONS PRODUCT OVERVIEW FUNCTIONAL BLOCK DIAGRAM
Isolated, Process Current Output 7B39 FEATURES Interfaces, isolates and filters a 0 V to + 10 V or +1 V to +5 V input signal. Provides an isolated process current output of 0 ma to 20 ma or 4 ma to 20
More informationIRAM mm-interferometry School UV Plane Analysis. IRAM Grenoble
IRAM mm-interferometry School 2004 1 UV Plane Analysis Frédéric Gueth IRAM Grenoble UV Plane analysis 2 UV Plane analysis The data are now calibrated as best as we can Caution: data are calibrated, but
More informationSpecifications USB-1408FS
Document Revision 1.1, May, 2006 Copyright 2006, Measurement Computing Corporation Typical for 25 C unless otherwise specified. Specifications in italic text are guaranteed by design. Analog input Table
More informationGNSS High Rate Binary Format (v2.1) 1 Overview
GNSS High Rate Binary Format (v2.1) 1 Overview This document describes a binary GNSS data format intended for storing both low and high rate (>1Hz) tracking data. To accommodate all modern GNSS measurements
More informationProject Overview and Status
Project Overview and Status EVLA Advisory Committee Meeting, March 19-20, 2009 Mark McKinnon EVLA Project Manager Outline Project Goals Organization Staffing Progress since last meeting Budget Contingency
More informationMMC-2 CD MODEL. Document Number R0 File name MM2-05r0.doc. Content: Clause 5 of SFF CD Model
Document Number 97-104R0 File name MM2-05r0.doc MMC-2 CD MODEL Content: Clause 5 of SFF8090-.09 CD Model Technical Editor: Ron Roberts Sierra-Pac Technology PO Box 2389 Shingle Springs, CA 95682 E-mail:
More informationUSB-1208LS Specifications
Specifications Document Revision 1.1, February, 2010 Copyright 2010, Measurement Computing Corporation Typical for 25 C unless otherwise specified. Specifications in italic text are guaranteed by design.
More informationRadio Propagation Characteristics of MIMO Systems in Practical Deployment Scenarios
NPL EM Day 29 November 2007 Radio Propagation Characteristics of MIMO Systems in Practical Deployment Scenarios Matthew Webb, Mark Beach and Mythri Hunukumbure University of Bristol Introduction MIMO now
More informationTOP Server V5 to MicroLogix Using DNP3 Ethernet Driver
TOP Server V5 to MicroLogix 1400 Using DNP3 Ethernet Driver Page 2 of 36 Table of Contents INTRODUCTION 3 CONFIGURING THE MICROLOGIX 1400 AS A DNP3 SLAVE 4 CONFIGURING TOP SERVER AS A DNP3 MASTER 9 TESTING
More informationE Series Multifunction I/O 1.25 MS/s, 12-Bit, 16 or 64 Analog Inputs
E Series Multifunction I/O 1.25 MS/s, 12-Bit, 16 or 64 Inputs Families (E-1) Families (E-1) Family (MIO-16E-1) PCI-MIO-16E-1 PXI- AT-MIO-16E-1 Family (MIO-64E-1) PCI- PXI- VXI-MIO-64E-1 Input 16 single-ended,
More informationDS1845 Dual NV Potentiometer and Memory
www.maxim-ic.com FEATURES Two linear taper potentiometers -010 one 10k, 100 position & one 10k, 256 position -050 one 10k, 100 position & one 50k, 256 postition -100 one 10k, 100 position & one 100k, 256
More information16-Bit, 12-Channel, 2-MSPS PMC Analog Input/Output Board
66-16AISS8AO4 16-Bit, 12-Channel, 2-MSPS PMC Analog Input/Output Board With Eight Simultaneously Sampled Analog Inputs, Four Analog Outputs, and Input Sampling Rates to 2.0 MSPS per channel Available in
More informationCS267 Homework 1: Fast Matrix Multiply
CS267 Homework 1: Fast Matrix Multiply S Woo X, Simon Scott April 18, 2012 1 Introduction The VEGAS HPC uses three shared memory data buffers, one between each of the data processing threads. There is
More informationOptical Data Interface ODI-2.1 High Speed Data Formats Preliminary Specification
Optical Data Interface O-2.1 High Speed Data Formats Preliminary Specification Revision 2, Date 1842 The O Specification is managed by the AXIe Consortium. For more information about O, go to http://axiestandard.org/odispecifications.html
More informationPC104P-16AO2-MF Two-Channel 16-Bit High-Speed Analog Output PMC Board With 400,000 Samples per Second per Channel, and Independent Clocking
PC104P-16AO2-MF Two-Channel 16-Bit High-Speed Analog Output PMC Board With 400,000 Samples per Second per Channel, and Independent Clocking Features: Two Precision Differential 2-Wire High-Speed Analog
More informationPHY Link Channel Resource Allocation, Overhead, Impact on Procedures. Nicola Varanese (Qualcomm)
PHY Link Channel Resource Allocation, Overhead, Impact on Procedures Nicola Varanese (Qualcomm) 1 Summary A PHY Control Channel (PLC) is needed for Aiding PHY initialization and CNU bring-up Broadcasting
More informationUSB-2527 Specifications
Specifications Document Revision 1.4, February, 2010 Copyright 2010, Measurement Computing Corporation Typical for 25 C unless otherwise specified. Specifications in italic text are guaranteed by design.
More informationSpecifications minilab 1008
Specifications minilab 1008 Document Revision 1.3, May, 2004 Copyright 2004, Measurement Computing Corporation Specifications Typical for 25 C unless otherwise specified. Analog Input Section A/D converter
More informationIntelliCAP PLUS Supplement for Landis & Gyr Telegyr 8979 Protocol
IntelliCAP PLUS Supplement for Landis & Gyr Telegyr 8979 Protocol March 31, 2003 1135 Atlantic Avenue Alameda, California USA 1023-563 / 3-31-03 IntelliCAP PLUS Capacitor Control Proprietary Notice This
More informationPCI-DAS1602/12 Specifications
Specifications Document Revision 4.2, February, 2010 Copyright 2010, Measurement Computing Corporation Typical for 25 C unless otherwise specified. Specifications in italic text are guaranteed by design.
More informationHCOMM Reference Manual
HCOMM Reference Manual Document Number: 1000-2984 Document Revision: 0.3.2 Date: December 23, 2013 November 21, 2013 1000-2984 Revision 0.3.1 1 / 49 Copyright 2012, Hillcrest Laboratories, Inc. All rights
More informationSV3C DPRX MIPI D-PHY Analyzer. Data Sheet
SV3C DPRX MIPI D-PHY Analyzer Data Sheet Table of Contents Table of Contents Table of Contents... 1 List of Figures... 2 List of Tables... 3 Introduction... 4 Overview... 4 Key Benefits... 4 Applications...
More informationECE 650 Systems Programming & Engineering. Spring 2018
ECE 650 Systems Programming & Engineering Spring 2018 Networking Introduction Tyler Bletsch Duke University Slides are adapted from Brian Rogers (Duke) Computer Networking A background of important areas
More informationALMA CORRELATOR : Added chapter number to section numbers. Placed specifications in table format. Added milestone summary.
ALMA Project Book, Chapter 10 Revision History: ALMA CORRELATOR John Webber Ray Escoffier Chuck Broadwell Joe Greenberg Alain Baudry Last revised 2001-02-07 1998-09-18: Added chapter number to section
More informationIsolated Linearized RTD Input 5B34 FEATURES APPLICATIONS PRODUCT OVERVIEW FUNCTIONAL BLOCK DIAGRAM
Isolated Linearized RTD Input 5B34 FEATURES Amplifies, Protects, Filters, and Isolates Analog Input. Linearize a wide variety of 2 & 3 wire RTDs. (True 4-wire RTD measurements are provided by the 5B35).
More informationImaging and Deconvolution
Imaging and Deconvolution Urvashi Rau National Radio Astronomy Observatory, Socorro, NM, USA The van-cittert Zernike theorem Ei E V ij u, v = I l, m e sky j 2 i ul vm dldm 2D Fourier transform : Image
More informationWide Bandwidth Strain Gage Input 3B18 FEATURES APPLICATIONS PRODUCT OVERVIEW FUNCTIONAL BLOCK DIAGRAM
Wide Bandwidth Strain Gage Input 3B18 FEATURES Wideband (20 khz) single-channel signal conditioning module. Module Bandwidth is user-selectable between 20 khz and 100Hz, with user-supplied filter caps
More information