GM8126 GM8126 CAPTURE. User Guide Rev.: 1.2 Issue Date: June 2011

Transcription

1 GM8126 GM8126 CAPTURE User Guide Rev.: 1.2 Issue Date: June 2011

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3 REVISION HISTORY Date Rev. From To Nov Original Jan Updated the module parameters in Chapter 3 Jun Added the OV7720 and HM2055 sensor module parameters Updated the TW9910 codec module parameter Updated the MT9V136 sensor module parameter Added the /proc/vcap_drv/property usage Added a table for the default OSD font database Copyright 2011 Grain Media, Inc. All Rights Reserved. Printed in Taiwan 2011 Grain Media and the Grain Media Logo are trademarks of Grain Media, Inc. in Taiwan and/or other countries. Other company, product and service names may be trademarks or service marks of others. All information contained in this document is subject to change without notice. The products described in this document are NOT intended for use in implantation or other life support application where malfunction may result in injury or death to persons. The information contained in this document does not affect or change Grain Media s product specification or warranties. Nothing in this document shall operate as an express or implied license or indemnity under the intellectual property rights of Grain Media or third parties. All information contained in this document was obtained in specific environments, and is presented as an illustration. The results obtained in other operating environments may vary. THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED ON AN AS IS BASIS. In no event will Grain Media be liable for damages arising directly or indirectly from any use of the information contained in this document. Grain Media, Inc. 5F, No. 5, Li-Hsin Road III, Hsinchu Science Park, Hsinchu City, Taiwan 300, R.O.C. Grain Media's home page can be found at:

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5 TABLE OF CONTENTS Chapter 1 Introduction Overview Features Block Diagram... 3 Chapter 2 Capture Driver Module... 5 Chapter 3 Capture Module Parameters fcap_common Module fcap_common_v4l Module fcapx Module Input Modules... 9 Chapter 4 Capture Proc Nodes /proc/vcap_drv Proc Nodes /proc/vcap_drv/fcap_devx Proc Nodes Chapter 5 Capture Device Nodes for V4L Chapter 6 Capture OSD and Mask OSD/Mask Device Nodes i

6 LIST OF TABLES Table 3-1. Parameters of fcap_common Module... 8 Table 3-2. Parameters of fcap_common_v41 Module... 8 Table 3-3. Parameters of fcapx Module... 8 Table 3-4. Parameters of fcap200_mt9d131 Module... 9 Table 3-5. Parameters of fcap200_geninput Module Table 3-6. Parameters of fcap200_isp Module Table 3-7. Parameters of fcap200_tw9910 Module Table 3-8. Parameters of fcap200_ov7740 Module Table 3-9 Parameters of fcap200_poa030d Module Table Parameters of fcap200_ov10630 Module Table Parameters of fcap200_ov7720 Module Table Parameters of fcap200_hm2055 Module Table Parameters of fcap200_mt9v136 Module ii

7 LIST OF FIGURES Figure 1-1. Capture 0 Block Diagram... 3 Figure 1-2. Capture 1 Block Diagram... 4 Figure 4-1. Proc Nodes of Capture Module iii

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9 Chapter 1 Introduction This chapter contains the following sections: 1.1 Overview 1.2 Features 1.3 Block Diagram 1

10 1.1 Overview FTVCAP210 in GM8126 is used to capture the video data from various video interfaces and outputs data to AMBA AHB. It provides the de-interlace function to reduce the video artifact of the interlace video. With the ability of sizing down, users can individually reduce the image size to a specific resolution for two paths. The Color OSD function helps user paste any character to the captured video. The window clipping function is used to clip the interested region of an image before or after size down. The host processor interface is compliant with AMBA AHB 2.0, which serves as an IP core for integrating into the AMBA system. 1.2 Features The capture contains the following features: Supports maximum capture resolution of up to 1920 x 1080 Supports ITU-R BT bit input interface Supports ITU-R BT bit input interface YCbCr 4:2:2 8-bit/16-bit with H/V reference control signal interface Supports one video capture input with data output paths Edge-based line average de-interlacer Includes embedded font RAM for color OSD for path 0 and path 1 Supports up to eight mask windows with transparency degree control Supports individual image size-down function for two output paths Path 0: Supports integer sizing down ratio Path 1: Supports fraction sizing down ratio Supports individual frame-skip function at two output paths Supports individual even/odd field-sorting function for two output paths Supports VBI data extraction function Supports source and output target image crop function Uses YCbCr 4:2:2 output format for path 0 and path 1 Uses DMA raster order output sequence to support output frame flip and mirror function Supports capture clock of up to 108 MHz and AHB clock of up to 240 MHz in 90 nm processes 2

11 1.3 Block Diagram Figure 1-1. Capture 0 Block Diagram 3

12 Figure 1-2. Capture 1 Block Diagram 4

13 Chapter 2 Capture Driver Module In the GM8126 SDK release package, users will find the source code and kernel module of the capture from /module/vcap200_v3. The source code and kernel module of the sensor are placed in /module/vcap200_v3/input_module. The capture driver module contains the following parts. fcap_common.ko This is the capture core for a video graph. It includes all capture flow controls and API. fcap_common_v4l.ko This is the capture core for Video4Linux. It includes all capture flow controls and API. fcapx.ko This contains the IP information. It includes the IP base address and IRQ number. In GM8126, X is ranging from 0 to 1. fcap200_xxxx.ko This contains the external input information. It includes the external sensor or codec initiation information. 5

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15 Chapter 3 Capture Module Parameters This chapter contains the following sections: 3.1 fcap_common Module 3.2 fcap_common_v4l Module 3.3 fcapx Module 3.4 Input Modules 7

16 3.1 fcap_common Module Table 3-1. Parameters of fcap_common Module Name Default Value Description Max_LLI MAX_LLI_TABLE (10) Maximum LLI table length The default value is MAX_LLI_TABLE, which is defined in vcap200_v3/config. Users can specify this value to improve the frame rate switch delay time (Need new DVR driver support). This feature is supported on: Vcap200_v3: V fcap_common_v4l Module Table 3-2 lists the module parameters while inserting this driver. Table 3-2. Parameters of fcap_common_v41 Module Name Default Value Description max_width 720 Maximum width of the frame buffer max_height 576 Maximum height of the frame buffer buffer_number 5 Number of the frame buffers 3.3 fcapx Module Table 3-3 lists the module parameters while inserting this driver. Table 3-3. Parameters of fcapx Module Name Default Value Description mode 0 0: Single-step fire mode 1: Link list mode Driver supports two capture modes. One is the single-step fire mode and the other is the link list mode. The single-step fire mode uses CPU to trigger each frame; while the link list mode uses the hardware link list table to do the same operation. 8

17 Name Default Value Description album_mode 0 Use Path 0 and Path 1 to synchronously grab the image 0: None (Disable) 1: Mode_1 Path 0: Grab the left half side of an image Path 1: Grab the right half side of an image Support only in the single-step fire mode 3.4 Input Modules fcap200_mt9d131 Module Table 3-4 lists the module parameters while inserting this driver. Table 3-4. Parameters of fcap200_mt9d131 Module Name Default Value Description iaddr 0x90 I 2 C address for MT9D131 src 0 Number of the capture sources src_x 3 Horizontal pixel capture start point of the source image (Effect on VP_H_REF_DEF = 1 of the SRCIF[0x0044] register) src_y 4 Vertical pixel capture start point of the source image bswap 0 Swap device Cb Cr (Effect on VP_V_REF_DEF = 1 of the SRCIF[0x0044] register) bv_polarity 1 0: Video port vertical control timing is active low. 1: Video port vertical control timing is active high. bh_polarity 1 0: Video port horizontal control timing is active low. 1: Video port horizontal control timing is active high. port_used -1 External signal connected to the chip port Bit X = Port X Not used in GM8126 9

18 3.4.2 fcap200_geninput Module Table 3-5 lists the module parameters while inserting this driver. Table 3-5. Parameters of fcap200_geninput Module Name Default Value Description src 0 Number of the capture sources src_w 720 Width of the capture source src_h 480 Height of the capture source src_x 3 Horizontal pixel capture start point of the source image (Effect on VP_H_REF_DEF = 1 of the SRCIF[0x0044] register) src_y 2 Vertical pixel capture start point of the source image inv_clk 0 Invert clock (Effect on VP_V_REF_DEF = 1 of the SRCIF[0x0044] register) 0: None 1: Invert bv_polarity 0 0: Video port vertical control timing is active low. 1: Video port vertical control timing is active high. bh_polarity 0 0: Video port horizontal control timing is active low. 1: Video port horizontal control timing is active high. vbi_en 0 VBI enable vpif_format 0 Interface format of the video port 0: CCIR656 is the 8-bit interlace video port. 1: CCIR656 is the 8-bit progressive video port. 2: CCIR601 is the 8-bit progressive video port. 3: CCIR601 is the 16-bit progressive video port. 4: CCIR656 is the 16-bit interlace video port. 5: ISP210 is the 8-bit progressive video port. 6: TW2835 and CCIR656 are the 8-bit interlace video port. 7: Sony is 16-bit video port. 8: CCIR656 is the 16-bit progressive video port. 10

19 Name Default Value Description OData 0 0: Throughput of one data path at 27 MHz for the 1-channel video data 1: Throughput of one data path at 54 MHz for the 2-channel video data 2: Throughput of one data path at 108 MHz for the 4-channel video data port_used -1 External signal connected to the chip port Bit X = Port X Not used in GM8126 inv_demuxclk {0, 0} Invert the demux pixel clock Not used in GM8126 cfg_pmu_eclk 0 Configure the PMU external clock Not used in GM8126 cfg_pmu_demux -1 0: demux 0 1: demux 1-1: demux all Not used in GM8126 cfg_channel_switch 0 0: Disable 1: Enable Not used in GM8126 input_clk The capture clock frequency is input from the sensor or decoder. This feature is supported on: Vcap200_v3: V Input API: V fcap200_isp Module Table 3-6 lists the module parameters while inserting this driver. Table 3-6. Parameters of fcap200_isp Module Name Default Value Description src 0 Number of the capture sources src_w 1280 Width of the capture source src_h 720 Height of the capture source 11

20 Name Default Value Description src_x 3 Horizontal pixel capture start point of the source image (Effect on VP_H_REF_DEF = 1 of the SRCIF[0x0044] register) src_y 2 Vertical pixel capture start point of the source image (Effect on VP_V_REF_DEF = 1 of the SRCIF[0x0044] register) inv_clk 0 Invert clock 0: None 1: Invert bv_polarity 0 0: Video port vertical control timing is active low. 1: Video port vertical control timing is active high. bh_polarity 0 0: Video port horizontal control timing is active low. 1: Video port horizontal control timing is active high. port_used -1 External signal connected to the chip port Bit X = Port X Not used in GM8126 input_clk The capture clock frequency is input from the sensor. This feature is supported on: Vcap200_v3: V Input API: V fcap200_tw9910 Module Table 3-7 lists the module parameters while inserting this driver. Table 3-7. Parameters of fcap200_tw9910 Module Name Default Value Description chip_num 1 TW9910 chip number iaddr { 0x8a, 0x88 } I 2 C address for TW9910 src 0 Number of the capture sources inv_clk 1 Inverted clock 0: None 1: Invert buse_vfs 0 0: Use bit F as frame start 1: Use bit V as frame start 12

21 Name Default Value Description port_used -1 External signal connected to the chip port Bit X = Port X Not used in GM8126 OData 0 0: Throughput of one data path at 27 MHz for the 1-channel video data 1: Throughput of one data path at 54 MHz for the 2-channel video data 2: Throughput of one data path at 108 MHz for the 4-channel video data Not used in GM8126 inv_demuxclk {0, 0} Invert the demux pixel clock Not used in GM8126 cfg_pmu_eclk 0 Configure the PMU external clock Not used in GM8126 cfg_pmu_demux -1 0: demux 0 1: demux 1-1: demux all Not used in GM8126 cfg_channel_switch 0 0: Disable 1: Enable Not used in GM fcap200_ov7740 Module Table 3-8 lists the module parameters while inserting this driver. Table 3-8. Parameters of fcap200_ov7740 Module Name Default Value Description iaddr 0x42 I 2 C address for OV7740 src 0 Number of the capture sources port_used -1 External signal connected to the chip port Bit X = Port X Not used in GM8126 inv_clk 0 Invert clock 0: None 13

22 Name Default Value Description 1: Invert buse_vfs 0 0: Use bit F as frame start 1: Use bit V as frame start fcap200_poa030d Module Table 3-9 lists the module parameters while inserting this driver. Table 3-9 Parameters of fcap200_poa030d Module Name Default Value Description iaddr 0xdc I 2 C address for POA030D src 0 Number of the capture sources port_used -1 External signal connected to the chip port Bit X = Port X Not used in GM8126 inv_clk 0 Invert clock 0: None 1: Invert buse_vfs 0 0: Use bit F as frame start 1: Use bit V as frame start fcap200_ov10630 Module Table 3-10 lists the module parameters while inserting this driver. Table Parameters of fcap200_ov10630 Module Name Default Value Description iaddr 0x60 I 2 C address for OV10630 src 0 Number of the capture sources src_x 4 Horizontal pixel capture start point of the source image (Effect on VP_H_REF_DEF = 1 of the SRCIF[0x0044] register) 14

23 Name Default Value Description src_y 3 Vertical pixel capture start point of the source image (Effect on VP_V_REF_DEF = 1 of the SRCIF[0x0044] register) bv_polarity 0 0: Video port vertical control timing is active low. 1: Video port vertical control timing is active high. bh_polarity 1 0: Video port horizontal control timing is active low. 1: Video port horizontal control timing is active high. port_used -1 External signal connected to the chip port Bit X = Port X Not used in GM8126 inv_clk 0 Invert clock 0: None 1: Invert fcap200_ov7720 Module Table 3-11 lists the module parameters while inserting this driver. Table Parameters of fcap200_ov7720 Module Name Default Value Description iaddr 0x42 I 2 C address for OV7720 src 0 Number of the capture sources port_used -1 External signal connected to the chip port Bit X = Port X Not used in GM8126 inv_clk 0 Invert clock 0: None 1: Invert buse_vfs 0 0: Use bit F as frame start 1: Use bit V as frame start 15

24 3.4.9 fcap200_hm2055 Module Table 3-12 lists the module parameters while inserting this driver. Table Parameters of fcap200_hm2055 Module Name Default Value Description iaddr 0x48 I 2 C address for OV10630 src 0 Number of the capture sources src_x 3 Horizontal pixel capture start point of the source image (Effect on VP_H_REF_DEF = 1 of the SRCIF[0x0044] register) src_y 4 Vertical pixel capture start point of the source image (Effect on VP_V_REF_DEF = 1 of the SRCIF[0x0044] register) bv_polarity 1 0: Video port vertical control timing is active low. 1: Video port vertical control timing is active high. bh_polarity 1 0: Video port horizontal control timing is active low. 1: Video port horizontal control timing is active high. port_used -1 External signal connected to the chip port Bit X = Port X Not used in GM8126 inv_clk 0 Invert clock 0: None 1: Invert 16

25 fcap200_mt9v136 Module Table 3-13 lists the module parameters while inserting this driver. Table Parameters of fcap200_mt9v136 Module Name Default Value Description iaddr 0x90 I 2 C address for MT9V136 src 0 Number of the capture sources src_x 3 Horizontal pixel capture start point of the source image (Effect on VP_H_REF_DEF = 1 of the SRCIF[0x0044] register) src_y 4 Vertical pixel capture start point of the source image (Effect on VP_V_REF_DEF = 1 of the SRCIF[0x0044] register) bv_polarity 1 0: Video port vertical control timing is active low. 1: Video port vertical control timing is active high. bh_polarity 1 0: Video port horizontal control timing is active low. 1: Video port horizontal control timing is active high. port_used -1 External signal connected to the chip port Bit X = Port X Not used in GM8126 inv_clk 0 Invert clock 0: None 1: Invert pal 0 Analog output PAL mode (Need to switch the D_SLB0 jumper to PAL) 17

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27 Chapter 4 Capture Proc Nodes The capture module provides the proc nodes. Users can read the captured information or enable the debugging message through these nodes. A sample of these nodes is listed below. / # cat /proc/vcap_drv/ /proc/vcap_drv/autocheck_in /proc/vcap_drv/cn_dbg_mask /proc/vcap_drv/input_module_table /proc/vcap_drv/cn_triggermode /proc/vcap_drv/fcap_dev0/ /proc/vcap_drv/property /proc/vcap_drv/cn_dbg_ch /proc/vcap_drv/fcap_dev1/ / # cat /proc/vcap_drv/fcap_dev0/ /proc/vcap_drv/fcap_dev0/dump_lli /proc/vcap_drv/fcap_dev0/dump_reg /proc/vcap_drv/fcap_dev0/status / # cat /proc/vcap_drv/fcap_dev0/ Figure 4-1. Proc Nodes of Capture Module 19

28 The following table shows the proc nodes of the capture module. /proc/vcap_drv AutoCheck_IN cn_triggermode cn_dbg_ch cn_dbg_mask input_module_table property fcap_devx dump_lli dump_reg status 4.1 /proc/vcap_drv Proc Nodes AutoCheck_IN User can use the /proc/vcap_drv/autocheck_in node to disable/enable the automatic detection of the input signal. Usage: Get the current value cat /proc/vcap_drv/autocheck_in / # cat /proc/vcap_drv/autocheck_in Auto check Input signal. 0: Disable Current value is 1000 ms. Set the signal detection period value (0: Disable) echo [value (ms)] > /proc/vcap_drv/autocheck_in 20

29 4.1.2 cn_triggermode User can use the /proc/vcap_drv/cn_triggermode node to start/stop the operation of the capture debug message. Usage: Get the current value cat /proc/vcap_drv/cn_triggermode / # cat /proc/vcap_drv/cn_triggermode Trigger mode= [start(bit1) stop(bit0)] (31-2 reserve) Mode=0x0 Set the trigger mode value echo [value] > /proc/vcap_drv/cn_triggermode Value: 0x ~ 0xFFFFFFFF Bit 0: Stop [0: Off, 1: On] Bit 1: Start [0: Off, 1: On] Others: Reserved cn_dbg_ch User can use the /proc/vcap_drv/cn_dbg_ch node to disable/enable the operation of the capture debug message for different channels. Usage: Get the current value cat /proc/vcap_drv/cn_dbg_ch / # cat /proc/vcap_drv/cn_dbg_ch cn_debug_ch=0x0 Set the channel value echo [value] > /proc/vcap_drv/cn_dbg_ch Value: 0x ~ 0xFFFFFFFF Bit X: Control the channel_x debugging message operation. Set to 0 to enable and 1 to disable. 21

30 4.1.4 cn_dbg_mask User can use the /proc/cn_dbg_mask node to trigger different capture debug messages for output. Usage: Get the current value cat /proc/vcap_drv/cn_dbg_mask / # cat /proc/vcap_drv/cn_dbg_mask cn_debug_mask=0xffffffff Set the mask value of the debugging message echo [value] > /proc/vcap_drv/cn_dbg_mask Value: 0x ~ 0xFFFFFFFF Bit Description Value 0 Function entry/leave 0: On, 1: Off 1 IOCTL name 0: On, 1: Off 2 IOCTL parameter 0: On, 1: Off 4 Driver state machine flow 0: On, 1: Off 5 Skip the function status trace 0: On, 1: Off 6 Buffer IN/OUT 0: On, 1: Off 7 DMA buffer information (Address, offset, and size) 0: On, 1: Off 8 Trace the link list table 0: On, 1: Off 9 Performance information 0: On, 1: Off 29 Memory pool trace of the link list table 0: On, 1: Off 30 Dump the register/lli table when error occurs 0: On, 1: Off 31 Trace the link list table (Include all table contents) 0: On, 1: Off 22

31 4.1.5 input_module_table User can use the /proc/vcap_drv/input_module_table node to display which input driver have been installed. After insert the fcap200_xxx.ko input driver, the information of the input driver is shown in the following table. Item name grab type Channel number source Description Name of the input module ID of the input module ID assigned by the capture driver Number of the capture sources Usage: Get the current value cat /proc/vcap_dvr/input_module_table / # cat /proc/vcap_drv/input_module_table Name Grab Type Channel Number Source GENINPUT

32 4.1.6 Property User can use the /proc/vcap_drv/property node to display all configuration property of each capture path. User should specify the number of the capture paths before display. Usage: Get the configuration property value of the current capture path cat /proc/vcap_drv/property / # cat /proc/vcap_drv/property Capture fd 0x0 property ======================== bg_x=0 bg_y=0 bg_width=352 bg_height=240 buf_y0=0 buf_u0=0 buf_v0=0 buf_y1=90112 buf_u1=0 buf_v1=0 width=352 height=240 DI_mode=0 color=2 mode=1 dma_order=0 scaler_indep=1 do_clamp=0 updata=0 start=0 stop=0 resume=0 24

33 pause=0 input_ch=0 input_mode=1 VG_E_header_size=0 buf_vbi0=0 buf_vbi1=0 bcrop=0 crop_x=0 crop_y=0 crop_w=0 crop_h=0 FrameRate_Numerator=30 FrameRate_Denominator=30 InputFrameRatio=0 SharePath=0 H_Flip=0 V_Flip=0 sharpness=0 Set the number of the capture paths for display echo [capture-path] > /proc/vcap_drv/property capture-path=>0xab [ A: capture number, from 0~1, B: path number from 0~3 ] 25

34 4.2 /proc/vcap_drv/fcap_devx Proc Nodes The following sections describe these proc nodes dump_lli User can use the /proc/vcap_drv/fcap_devx/dump_lli node to display the hardware link list table when capture is set to the link list mode. Usage: Get the current value cat /proc/vcap_drv/fcap_devx/dump_lli / # cat /proc/vcap_drv/fcap_dev0/dump_lli [0]:P0 LinkList Table =========== [0]:[0:0x01d20b01](P0) [0]: (0) 0x [0]: (1) 0x [0]: (2) 0x [0]: (3) 0x810a6900 [0]: (4) 0x000f0218 [0]: (5) 0x [0]: (6) 0x c [0]: (7) 0x [0]: (8) 0x [0]: (9) 0x [0]: (10) 0x [0]: (11) 0x [0]: (12) 0xc1d20901 [0]:[1:0x01d20901](P0) [0]: (0) 0x [0]: (1) 0x812e0400 [0]: (2) 0x [0]: (3) 0x [0]: (4) 0x000f0218 [0]: (5) 0x [0]: (6) 0x c [0]: (7) 0x [0]: (8) 0x [0]: (9) 0x [0]: (10) 0x [0]: (11) 0x [0]: (12) 0xc1d20e81 [0]:[E:0x01d20e01] [0]: (0) 0x

35 4.2.2 dump_reg User can use the /proc/vcap_drv/fcap_devx/dump_reg node to display the register value of a capture. Usage: Get the current value cat /proc/vcap_drv/fcap_devx/dump_reg / # cat /proc/vcap_drv/fcap_dev0/dump_reg [0]:0x0000: [0]:0x0010: 02d d [0]:0x0020: 00f f f00140 [0]:0x0030: [0]:0x0040: [0]:0x0050: 02d d d00500 [0]:0x0060: d f00140 [0]:0x0100: [0]:0x0110: [0]:0x0120: [0]:0x0130: [0]:0x0140: [0]:0x0150: [0]:0x0160: [0]:0x0170: [0]:0x0180: [0]:0x0190: [0]:0x01a0: [0]:0x01b0: [0]:0x01c0: [0]:0x01d0: [0]:0x01e0: 3c f f f [0]:0x01f0: [0]:0x0200: [0]:0x0210: a0 [0]:0x0220: 010e [0]:0x0230: [0]:0x0240: [0]:0x0250: 01862e [0]:0x0260: [0]:0x0270: 01868bc [0]:0x0280: 01d20e81 01d30b01 01d30b01 01d30b01 27

36 4.2.3 Status User can use the /proc/vcap_drv/fcap_devx/status node to display the machine state and FIFO status of each driver for each path. Usage: Get the current status cat /proc/vcap_drv/fcap_devx/status / # cat /proc/vcap_drv/fcap_dev0/status P0 ST fifo P1 ST fifo P2 ST fifo P3 ST fifo

37 Chapter 5 Capture Device Nodes for V4L GM8126 has two captures. Each capture has two paths. When using the V4L capture driver, the V4L capture device node will be created in /dev/. The following table shows the device nodes in the single-step fire mode and link list mode. SSF Mode Capture # Path # Device Node Capture_0 Capture_1 Path_0 Path_1 Path_0 Path_1 /dev/video0 /dev/video1 /dev/video2 /dev/video3 29

38 LLI Mode Capture # Path # Device Node Capture_0 Capture_1 Path_0 (HW Path_0) Path_1 (HW Path_1) Path 2 (Sub Path_0) Path 3 (Sub Path_1) Path_0 (HW Path_0) Path_1 (HW Path_1) Path 2 (Sub Path_0) Path 3 (Sub Path_1) /dev/video0 /dev/video1 /dev/video2 /dev/video3 /dev/video4 /dev/video5 /dev/video6 /dev/video7 30

39 Chapter 6 Capture OSD and Mask Each capture OSD supports four independent OSD windows. Users can get the maximum display fonts of OSD. The maximum fonts are put in the capture from /module/vcap200_v3/config_8126. Each capture has two paths. In GM8126, all paths support OSD, but the capabilities are different. The following table shows the OSD capabilities. Capture Path Font RAM Size (Bit) Display RAM Size (Bit) Font Number CAP#0-PATH# x 12 x x CAP#0-PATH# x 12 x x CAP#1-PATH# x 12 x x CAP#1-PATH# x 12 x x The unit of fonts stored in the OSD RAM is 12 x 18. The following example is 12 x

40 The following table lists the default font database for each capture path. Font Index 0 0x30 1 0x31 2 0x32 3 0x33 4 0x34 5 0x35 6 0x36 7 0x37 8 0x38 9 0x39 A B C D E F G H 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 32

41 Font Index I 0x49 J 0x4A K 0x4B L 0x4C M 0x4D N 0x4E O 0x4F P 0x50 Q 0x51 R 0x52 S 0x53 T 0x54 U 0x55 V 0x56 W 0x57 X 0x58 Y 0x59 Z 0x5A space 0x20 = 0x3D, 0x2C - 0x2D / 0x2F : 0x3A Capture also supports the video mask. Users can use it to mask any video region. It supports eight independent mask windows. It includes all paths. 33

42 6.1 OSD/Mask Device Nodes Users can use the capture OSD/Mask feature from the device nodes. The single-step fire mode and link list mode have different reference nodes. The following table shows the OSD nodes in the SSF mode. SSF Mode Capture # Path # Device Node Capture_0 Capture_1 Path_0 Path_1 Path_0 Path_1 /dev/fosd00 /dev/fosd01 /dev/fosd10 /dev/fosd11 The following table shows the OSD nodes in the LLI mode. LLI Mode Capture # Path # Device Node Capture_0 Capture_1 Path_0 (HW Path_0) Path_1 (HW Path_1) Path 2 (Sub Path_0) Path 3 (Sub Path_1) Path_0 (HW Path_0) Path_1 (HW Path_1) Path 2 (Sub Path_0) Path 3 (Sub Path_1) /dev/fosd00 /dev/fosd01 /dev/fosd02 /dev/fosd03 /dev/fosd10 /dev/fosd11 /dev/fosd12 /dev/fosd13 34