LSF HPC :: getting most out of your NUMA machine
|
|
- Aldous Marshall
- 6 years ago
- Views:
Transcription
1 Leopold-Franzens-Universität Innsbruck ZID Zentraler Informatikdienst (ZID) LSF HPC :: getting most out of your NUMA machine platform computing conference, Michael Fink
2 who we are & what we do university of innsbruck founded 1669, state funded students, 5000 employees, external partners (university spinoff) central compute services (ZID) complete IT infractructure for research, teaching and administration central servers, computer labs (teaching) city-wide network (3 campuses + scattered sites) applications (ISP for all university members, database, HPC & al) staff: 80 ZID HPC group clusters and NUMA machines, mass storage staff: 4 HPC user consortium 15 member institutes coordination, exchange of knowlege and methods (seminar)
3 our SGI altix ccnuma machine SGI altix 350 why? plan 32 s GB ccnuma memory SLES 4, SGI propack 4 hierarchical sets efficient shm (openmp, posix threads) + message passing (MPI) large memory jobs (esp. abaqus) strategic preference "open source" software use SUN grid engine did not work out decision grid engine not NUMA-aware stay with LSF (origin 3800, compute cluster)
4 motivation parallel job in distributed memory cluster mpirun or batch system (LSF) message passing Switch places threads on n nodes processes stay within nodes memory access strictly intranode internode traffic limited to message passing LSF aware of layout physical node LSF node
5 parallel job in SMP machine disk IP OS assumes SMP paradigm IO n s 1 shared memory uniform access: same cost for accessing any part of memory arbitrary placement of processes arbitrary migration of processes LSF: 1 LSF-node, n s 1 LSF node SMP does not scale > 8 s need NUMA
6 parallel job in NUMA machine disk IP NUMA non uniform memory access (virtual shared memory) logical: SMP memory + I/O globally visible to all s, single OS instance physical: interconnect topology latency no. of hops ( 60ns/hop) internode traffic memory access + message passing OS (+LSF): behaves as in SMP 1 LSF node arbitrary placement+migration no dynamic memory page migration 1 LSF node why is this bad?
7 parallel job in NUMA machine :: job start disk IP what happens experiment job 4 threads uses 4 s and memory OS arbitrarily assigns 4 s initially internode traffic limited to message passing non-optimal placement: more hops than necessary
8 parallel job in NUMA machine :: the problem disk IP some time later threads migrate on different s used memory stays put (first touch) threads get separated from their memory new memory on new nodes internode traffic message passing memory access the same happens to other jobs fragmentation interconnect & I/O contention poor performance/throughput vanilla LSF: OS-instance granular does not address this problem
9 solution :: SGI propack4 sets + LSF HPC boot OS + I/O login batch disk IP set layout boot (2): OS, I/O (boot set) login (2): interactive work batch (28): LSF what are sets tell OS scheduler where to allocate and memory hierarchical: nesting allowed LSF HPC can create sets implementation activate boot-set develop persistent sets restrain interactive logins platform support secret LSF HPC option LSF_ROOT_SET
10 boot set goal bind all O/S + I/O processes to boot set how have kernel start /sbin/bootcpuset instead of /etc/init in /etc/elilo.conf add line append = "init=/sbin/bootcpuset" create file /etc/bootcpuset.conf how it works /sbin/bootcpuset reads config file /etc/bootcpuset.conf creates boot set binds itself to boot set exec's /etc/init /etc/bootcpuset.conf cpus 0-1 mems 0 see - linux resource admin guide
11 persistent sets fact propack4 sets are dynamic: lost on reboot goal sets persistent across boots how startup script /var/local/adm/cpuset/init.d/cpuset reads cpuset descriptions from files in /var/local/adm/cpuset/defs executed on system boot, creates all cpusets in defs /.../defs/login cpus 2-3 mems 1 /.../defs/lsfroot cpus 4-31 mems 2-15
12 restrain interactive logins goal bind interactive logins (we allow only ssh) to login set how in /etc/init.d/sshd replace startproc -f -p $SSHD_PIDFILE \ /usr/sbin/sshd $SSHD_OPTS -o "PidFile=$SSHD_PIDFILE" by /usr/bin/cpuset -i /login -I startproc -- -f -p $SSHD_PIDFILE \ /usr/sbin/sshd $SSHD_OPTS -o "PidFile=$SSHD_PIDFILE"
13 lsf root cpuset fact by default, LSF manages all s goal restrict LSF to manage batch set how create persistent set /lsfroot add line LSF_ROOT_SET=/lsfroot to lsf.conf result LSF creates sub-sets /dev/cpuset/lsfroot/hostname@jobid
14 how to use simple bsub -n 4 mpirun -np 4 program arg... OMP_NUM_THREADS=4 bsub -n 4 program arg... advanced control allocation within LSF-created set bsub -n 4 dplace -s 1 -c 0-3 mpirun -np 4 program arg... OMP_NUM_THREADS=4 bsub -n 4 dplace -x 2 -c 0-3 program arg... how it works LSF knows about topology and running jobs picks optimal set of s and creates set places job on set cpu # always starts at 0
15 result :: LSF HPC manages batch load boot OS + I/O login batch disk IP benefits threads + memory stay together internode traffic reduced to program semantics minimal distance minimal contention it really works this way! /dev/cpuset/lsfroot # head */cpus ==> altix32@1225/cpus <== 4-7,24-25 ==> altix32@1250/cpus <== 8-13 ==> altix32@1256/cpus <== 18-19,26-27 ==> altix32@1257/cpus <== 20-21,28-29 /dev/cpuset/lsfroot # uptime 5:25pm up 56 days 2:28, 8 users, load average: 19.72, 19.64, 19.64
16 parerga & paralipomena setup is available follow link altix-cpusets acknowledgments platform computing platform support martin pöll invitation to this conference very fast and effective response sysadmin, 3rd party software questions?
Altix UV HW/SW! SGI Altix UV utilizes an array of advanced hardware and software feature to offload:!
Altix UV HW/SW! SGI Altix UV utilizes an array of advanced hardware and software feature to offload:!! thread synchronization!! data sharing!! massage passing overhead from CPUs.! This system has a rich
More informationHPC Architectures. Types of resource currently in use
HPC Architectures Types of resource currently in use Reusing this material This work is licensed under a Creative Commons Attribution- NonCommercial-ShareAlike 4.0 International License. http://creativecommons.org/licenses/by-nc-sa/4.0/deed.en_us
More informationMoab Workload Manager on Cray XT3
Moab Workload Manager on Cray XT3 presented by Don Maxwell (ORNL) Michael Jackson (Cluster Resources, Inc.) MOAB Workload Manager on Cray XT3 Why MOAB? Requirements Features Support/Futures 2 Why Moab?
More informationParallel Applications on Distributed Memory Systems. Le Yan HPC User LSU
Parallel Applications on Distributed Memory Systems Le Yan HPC User Services @ LSU Outline Distributed memory systems Message Passing Interface (MPI) Parallel applications 6/3/2015 LONI Parallel Programming
More informationNUMA replicated pagecache for Linux
NUMA replicated pagecache for Linux Nick Piggin SuSE Labs January 27, 2008 0-0 Talk outline I will cover the following areas: Give some NUMA background information Introduce some of Linux s NUMA optimisations
More informationScalable Single System Image SGI Altix 3700, 512p Architecture and Software Environment
Silicon Graphics, Inc. Scalable Single System Image SGI Altix 3700, 512p Architecture and Software Environment Presented by: Jean-Pierre Panziera Principal Engineer Altix 3700 SSSI - Architecture and Software
More informationCOSC 6385 Computer Architecture - Multi Processor Systems
COSC 6385 Computer Architecture - Multi Processor Systems Fall 2006 Classification of Parallel Architectures Flynn s Taxonomy SISD: Single instruction single data Classical von Neumann architecture SIMD:
More informationExperiences with LSF and cpusets on the Origin3800 at Dresden University of Technology
Experiences with LSF and cpusets on the Origin3800 at Dresden University of Technology Stefanie Maletti TU Dresden, University Computer Center (URZ) stefanie.maletti@urz.tu-dresden.de ABSTRACT: Based on
More informationCerebro Quick Start Guide
Cerebro Quick Start Guide Overview of the system Cerebro consists of a total of 64 Ivy Bridge processors E5-4650 v2 with 10 cores each, 14 TB of memory and 24 TB of local disk. Table 1 shows the hardware
More informationSMP and ccnuma Multiprocessor Systems. Sharing of Resources in Parallel and Distributed Computing Systems
Reference Papers on SMP/NUMA Systems: EE 657, Lecture 5 September 14, 2007 SMP and ccnuma Multiprocessor Systems Professor Kai Hwang USC Internet and Grid Computing Laboratory Email: kaihwang@usc.edu [1]
More informationEIC system user manual
EIC system user manual how to use system Feb 28 th 2013 SGI Japan Ltd. Index EIC system overview File system, Network User environment job script Submitting job Displaying status of job Canceling,deleting
More informationCluster Computing. Resource and Job Management for HPC 16/08/2010 SC-CAMP. ( SC-CAMP) Cluster Computing 16/08/ / 50
Cluster Computing Resource and Job Management for HPC SC-CAMP 16/08/2010 ( SC-CAMP) Cluster Computing 16/08/2010 1 / 50 Summary 1 Introduction Cluster Computing 2 About Resource and Job Management Systems
More informationWindows Server 2012: Server Virtualization
Windows Server 2012: Server Virtualization Module Manual Author: David Coombes, Content Master Published: 4 th September, 2012 Information in this document, including URLs and other Internet Web site references,
More informationOS impact on performance
PhD student CEA, DAM, DIF, F-91297, Arpajon, France Advisor : William Jalby CEA supervisor : Marc Pérache 1 Plan Remind goal of OS Reproducibility Conclusion 2 OS : between applications and hardware 3
More informationPractical Introduction to
1 2 Outline of the workshop Practical Introduction to What is ScaleMP? When do we need it? How do we run codes on the ScaleMP node on the ScaleMP Guillimin cluster? How to run programs efficiently on ScaleMP?
More informationImperial College London. Simon Burbidge 29 Sept 2016
Imperial College London Simon Burbidge 29 Sept 2016 Imperial College London Premier UK University and research institution ranked #2= (with Cambridge) in QS World University rankings (MIT #1) #9 in worldwide
More informationPARALLEL ARCHITECTURES
PARALLEL ARCHITECTURES Course Parallel Computing Wolfgang Schreiner Research Institute for Symbolic Computation (RISC) Wolfgang.Schreiner@risc.jku.at http://www.risc.jku.at Parallel Random Access Machine
More informationThe SGI Message Passing Toolkit
White Paper The SGI Message Passing Toolkit Optimized Performance Across the Altix Product Line Table of Contents 1.0 Introduction... 1 2.0 SGI MPT Performance... 1 2.1 Message Latency... 1 2.1.1 Altix
More informationMSC Nastran Explicit Nonlinear (SOL 700) on Advanced SGI Architectures
MSC Nastran Explicit Nonlinear (SOL 700) on Advanced SGI Architectures Presented By: Dr. Olivier Schreiber, Application Engineering, SGI Walter Schrauwen, Senior Engineer, Finite Element Development, MSC
More informationComputing architectures Part 2 TMA4280 Introduction to Supercomputing
Computing architectures Part 2 TMA4280 Introduction to Supercomputing NTNU, IMF January 16. 2017 1 Supercomputing What is the motivation for Supercomputing? Solve complex problems fast and accurately:
More informationAdvanced Job Launching. mapping applications to hardware
Advanced Job Launching mapping applications to hardware A Quick Recap - Glossary of terms Hardware This terminology is used to cover hardware from multiple vendors Socket The hardware you can touch and
More informationLecture Topics. Announcements. Today: Advanced Scheduling (Stallings, chapter ) Next: Deadlock (Stallings, chapter
Lecture Topics Today: Advanced Scheduling (Stallings, chapter 10.1-10.4) Next: Deadlock (Stallings, chapter 6.1-6.6) 1 Announcements Exam #2 returned today Self-Study Exercise #10 Project #8 (due 11/16)
More informationUsing Docker in High Performance Computing in OpenPOWER Environment
Using Docker in High Performance Computing in OpenPOWER Environment Zhaohui Ding, Senior Product Architect Sam Sanjabi, Advisory Software Engineer IBM Platform Computing #OpenPOWERSummit Join the conversation
More informationGetting Performance from OpenMP Programs on NUMA Architectures
Getting Performance from OpenMP Programs on NUMA Architectures Christian Terboven, RWTH Aachen University terboven@itc.rwth-aachen.de EU H2020 Centre of Excellence (CoE) 1 October 2015 31 March 2018 Grant
More informationCluster Network Products
Cluster Network Products Cluster interconnects include, among others: Gigabit Ethernet Myrinet Quadrics InfiniBand 1 Interconnects in Top500 list 11/2009 2 Interconnects in Top500 list 11/2008 3 Cluster
More informationDELIVERABLE D5.5 Report on ICARUS visualization cluster installation. John BIDDISCOMBE (CSCS) Jerome SOUMAGNE (CSCS)
DELIVERABLE D5.5 Report on ICARUS visualization cluster installation John BIDDISCOMBE (CSCS) Jerome SOUMAGNE (CSCS) 02 May 2011 NextMuSE 2 Next generation Multi-mechanics Simulation Environment Cluster
More informationAn introduction to checkpointing. for scientific applications
damien.francois@uclouvain.be UCL/CISM - FNRS/CÉCI An introduction to checkpointing for scientific applications November 2013 CISM/CÉCI training session What is checkpointing? Without checkpointing: $./count
More informationGraham vs legacy systems
New User Seminar Graham vs legacy systems This webinar only covers topics pertaining to graham. For the introduction to our legacy systems (Orca etc.), please check the following recorded webinar: SHARCNet
More informationPCS - Part Two: Multiprocessor Architectures
PCS - Part Two: Multiprocessor Architectures Institute of Computer Engineering University of Lübeck, Germany Baltic Summer School, Tartu 2008 Part 2 - Contents Multiprocessor Systems Symmetrical Multiprocessors
More informationScheduling. Jesus Labarta
Scheduling Jesus Labarta Scheduling Applications submitted to system Resources x Time Resources: Processors Memory Objective Maximize resource utilization Maximize throughput Minimize response time Not
More informationIntroduction to GALILEO
Introduction to GALILEO Parallel & production environment Mirko Cestari m.cestari@cineca.it Alessandro Marani a.marani@cineca.it Domenico Guida d.guida@cineca.it Maurizio Cremonesi m.cremonesi@cineca.it
More informationMinnesota Supercomputing Institute Regents of the University of Minnesota. All rights reserved.
Minnesota Supercomputing Institute Introduction to MSI for Physical Scientists Michael Milligan MSI Scientific Computing Consultant Goals Introduction to MSI resources Show you how to access our systems
More informationExperiences in Managing Resources on a Large Origin3000 cluster
Experiences in Managing Resources on a Large Origin3000 cluster UG Summit 2002, Manchester, May 20 2002, Mark van de Sanden & Huub Stoffers http://www.sara.nl A oarse Outline of this Presentation Overview
More informationDetermining Optimal MPI Process Placement for Large- Scale Meteorology Simulations with SGI MPIplace
Determining Optimal MPI Process Placement for Large- Scale Meteorology Simulations with SGI MPIplace James Southern, Jim Tuccillo SGI 25 October 2016 0 Motivation Trend in HPC continues to be towards more
More informationMERCED CLUSTER BASICS Multi-Environment Research Computer for Exploration and Discovery A Centerpiece for Computational Science at UC Merced
MERCED CLUSTER BASICS Multi-Environment Research Computer for Exploration and Discovery A Centerpiece for Computational Science at UC Merced Sarvani Chadalapaka HPC Administrator University of California
More informationOutline. Execution Environments for Parallel Applications. Supercomputers. Supercomputers
Outline Execution Environments for Parallel Applications Master CANS 2007/2008 Departament d Arquitectura de Computadors Universitat Politècnica de Catalunya Supercomputers OS abstractions Extended OS
More informationNon-uniform memory access (NUMA)
Non-uniform memory access (NUMA) Memory access between processor core to main memory is not uniform. Memory resides in separate regions called NUMA domains. For highest performance, cores should only access
More informationNUMA-aware OpenMP Programming
NUMA-aware OpenMP Programming Dirk Schmidl IT Center, RWTH Aachen University Member of the HPC Group schmidl@itc.rwth-aachen.de Christian Terboven IT Center, RWTH Aachen University Deputy lead of the HPC
More informationArchitecting and Managing GPU Clusters. Dale Southard, NVIDIA
Architecting and Managing GPU Clusters Dale Southard, NVIDIA About the Speaker and You [Dale] is a senior solution architect with NVIDIA (I fix things). I primarily cover HPC in Gov/Edu/Research and on
More informationUpdate on Windows Persistent Memory Support Neal Christiansen Microsoft
Update on Windows Persistent Memory Support Neal Christiansen Microsoft 1 Agenda What is Persistent Memory (PM) Review: Existing Windows PM Support What s New New PM APIs Large Page Support Hyper-V Support
More informationCS4500/5500 Operating Systems File Systems and Implementations
Operating Systems File Systems and Implementations Yanyan Zhuang Department of Computer Science http://www.cs.uccs.edu/~yzhuang UC. Colorado Springs Recap of Previous Classes Processes and threads o Abstraction
More informationCray Operating System and I/O Road Map Charlie Carroll
Cray Operating System and I/O Road Map Charlie Carroll Cray Operating Systems Focus Performance Maximize compute cycles delivered to applications while also providing necessary services Lightweight kernel
More informationA Case for High Performance Computing with Virtual Machines
A Case for High Performance Computing with Virtual Machines Wei Huang*, Jiuxing Liu +, Bulent Abali +, and Dhabaleswar K. Panda* *The Ohio State University +IBM T. J. Waston Research Center Presentation
More informationWhy you should care about hardware locality and how.
Why you should care about hardware locality and how. Brice Goglin TADaaM team Inria Bordeaux Sud-Ouest Agenda Quick example as an introduction Bind your processes What's the actual problem? Convenient
More informationParallel Programming with MPI
Parallel Programming with MPI Science and Technology Support Ohio Supercomputer Center 1224 Kinnear Road. Columbus, OH 43212 (614) 292-1800 oschelp@osc.edu http://www.osc.edu/supercomputing/ Functions
More informationIntroduction Workshop 11th 12th November 2013
Introduction Workshop 11th 12th November Lecture II: Access and Batchsystem Dr. Andreas Wolf Gruppenleiter Hochleistungsrechnen Hochschulrechenzentrum Overview Access and Requirements Software packages
More informationThe Google File System (GFS)
1 The Google File System (GFS) CS60002: Distributed Systems Antonio Bruto da Costa Ph.D. Student, Formal Methods Lab, Dept. of Computer Sc. & Engg., Indian Institute of Technology Kharagpur 2 Design constraints
More informationMPI versions. MPI History
MPI versions MPI History Standardization started (1992) MPI-1 completed (1.0) (May 1994) Clarifications (1.1) (June 1995) MPI-2 (started: 1995, finished: 1997) MPI-2 book 1999 MPICH 1.2.4 partial implemention
More informationCoherent HyperTransport Enables The Return of the SMP
Coherent HyperTransport Enables The Return of the SMP Einar Rustad Copyright 2010 - All rights reserved. 1 Top500 History The expensive SMPs used to rule: Cray XMP, Convex Exemplar, Sun ES NOW, the Clusters
More informationTechnical Computing Suite supporting the hybrid system
Technical Computing Suite supporting the hybrid system Supercomputer PRIMEHPC FX10 PRIMERGY x86 cluster Hybrid System Configuration Supercomputer PRIMEHPC FX10 PRIMERGY x86 cluster 6D mesh/torus Interconnect
More informationWhen we start? 10/24/2013 Operating Systems, Beykent University 1
When we start? 10/24/2013 Operating Systems, Beykent University 1 Early Systems 10/24/2013 Operating Systems, Beykent University 2 Second Generation 10/24/2013 Operating Systems, Beykent University 3 Third
More informationRegional & National HPC resources available to UCSB
Regional & National HPC resources available to UCSB Triton Affiliates and Partners Program (TAPP) Extreme Science and Engineering Discovery Environment (XSEDE) UCSB clusters https://it.ucsb.edu/services/supercomputing
More informationHTC Brief Instructions
HTC Brief Instructions Version 18.08.2018 University of Paderborn Paderborn Center for Parallel Computing Warburger Str. 100, D-33098 Paderborn http://pc2.uni-paderborn.de/ 2 HTC BRIEF INSTRUCTIONS Table
More informationIntroduction to HPC Using zcluster at GACRC
Introduction to HPC Using zcluster at GACRC Georgia Advanced Computing Resource Center University of Georgia Zhuofei Hou, HPC Trainer zhuofei@uga.edu Outline What is GACRC? What is HPC Concept? What is
More informationThe MOSIX Scalable Cluster Computing for Linux. mosix.org
The MOSIX Scalable Cluster Computing for Linux Prof. Amnon Barak Computer Science Hebrew University http://www. mosix.org 1 Presentation overview Part I : Why computing clusters (slide 3-7) Part II : What
More informationIntroduction to the SHARCNET Environment May-25 Pre-(summer)school webinar Speaker: Alex Razoumov University of Ontario Institute of Technology
Introduction to the SHARCNET Environment 2010-May-25 Pre-(summer)school webinar Speaker: Alex Razoumov University of Ontario Institute of Technology available hardware and software resources our web portal
More informationAltix Usage and Application Programming
Center for Information Services and High Performance Computing (ZIH) Altix Usage and Application Programming Discussion And Important Information For Users Zellescher Weg 12 Willers-Bau A113 Tel. +49 351-463
More informationMinnesota Supercomputing Institute Regents of the University of Minnesota. All rights reserved.
Minnesota Supercomputing Institute Introduction to MSI Systems Andrew Gustafson The Machines at MSI Machine Type: Cluster Source: http://en.wikipedia.org/wiki/cluster_%28computing%29 Machine Type: Cluster
More informationMulticore Performance and Tools. Part 1: Topology, affinity, clock speed
Multicore Performance and Tools Part 1: Topology, affinity, clock speed Tools for Node-level Performance Engineering Gather Node Information hwloc, likwid-topology, likwid-powermeter Affinity control and
More informationLecture 17. NUMA Architecture and Programming
Lecture 17 NUMA Architecture and Programming Announcements Extended office hours today until 6pm Weds after class? Partitioning and communication in Particle method project 2012 Scott B. Baden /CSE 260/
More informationSGI UV 300RL for Oracle Database In-Memory
SGI UV 300RL for Oracle Database In- Single-system Architecture Enables Real-time Business at Near Limitless Scale with Mission-critical Reliability TABLE OF CONTENTS 1.0 Introduction 1 2.0 SGI In- Computing
More informationBright Cluster Manager
Bright Cluster Manager Using Slurm for Data Aware Scheduling in the Cloud Martijn de Vries CTO About Bright Computing Bright Computing 1. Develops and supports Bright Cluster Manager for HPC systems, server
More informationI/O Monitoring at JSC, SIONlib & Resiliency
Mitglied der Helmholtz-Gemeinschaft I/O Monitoring at JSC, SIONlib & Resiliency Update: I/O Infrastructure @ JSC Update: Monitoring with LLview (I/O, Memory, Load) I/O Workloads on Jureca SIONlib: Task-Local
More informationParallel and Distributed Computing
Parallel and Distributed Computing NUMA; OpenCL; MapReduce José Monteiro MSc in Information Systems and Computer Engineering DEA in Computational Engineering Department of Computer Science and Engineering
More informationConsiderations for LS-DYNA Workflow Efficiencies in an HPC Linux Environment
9 th International LS-DYNA Users Conference Computing / Code Technology (2) Considerations for LS-DYNA Workflow Efficiencies in an HPC Linux Environment Stanley Posey HPC Applications Development SGI,
More informationBatch Systems. Running calculations on HPC resources
Batch Systems Running calculations on HPC resources Outline What is a batch system? How do I interact with the batch system Job submission scripts Interactive jobs Common batch systems Converting between
More informationBlueGene/L (No. 4 in the Latest Top500 List)
BlueGene/L (No. 4 in the Latest Top500 List) first supercomputer in the Blue Gene project architecture. Individual PowerPC 440 processors at 700Mhz Two processors reside in a single chip. Two chips reside
More informationParallel Processors. The dream of computer architects since 1950s: replicate processors to add performance vs. design a faster processor
Multiprocessing Parallel Computers Definition: A parallel computer is a collection of processing elements that cooperate and communicate to solve large problems fast. Almasi and Gottlieb, Highly Parallel
More informationComputer Architecture
Computer Architecture Chapter 7 Parallel Processing 1 Parallelism Instruction-level parallelism (Ch.6) pipeline superscalar latency issues hazards Processor-level parallelism (Ch.7) array/vector of processors
More informationCOSC 6374 Parallel Computation. Parallel Computer Architectures
OS 6374 Parallel omputation Parallel omputer Architectures Some slides on network topologies based on a similar presentation by Michael Resch, University of Stuttgart Spring 2010 Flynn s Taxonomy SISD:
More informationIntroduction to HPC Using zcluster at GACRC
Introduction to HPC Using zcluster at GACRC On-class PBIO/BINF8350 Georgia Advanced Computing Resource Center University of Georgia Zhuofei Hou, HPC Trainer zhuofei@uga.edu Outline What is GACRC? What
More informationWHY PARALLEL PROCESSING? (CE-401)
PARALLEL PROCESSING (CE-401) COURSE INFORMATION 2 + 1 credits (60 marks theory, 40 marks lab) Labs introduced for second time in PP history of SSUET Theory marks breakup: Midterm Exam: 15 marks Assignment:
More informationWindows-HPC Environment at RWTH Aachen University
Windows-HPC Environment at RWTH Aachen University Christian Terboven, Samuel Sarholz {terboven, sarholz}@rz.rwth-aachen.de Center for Computing and Communication RWTH Aachen University PPCES 2009 March
More informationDepartment of Computer Science Institute for System Architecture, Operating Systems Group REAL-TIME MICHAEL ROITZSCH OVERVIEW
Department of Computer Science Institute for System Architecture, Operating Systems Group REAL-TIME MICHAEL ROITZSCH OVERVIEW 2 SO FAR talked about in-kernel building blocks: threads memory IPC drivers
More informationPractical Scientific Computing
Practical Scientific Computing Performance-optimized Programming Preliminary discussion: July 11, 2008 Dr. Ralf-Peter Mundani, mundani@tum.de Dipl.-Ing. Ioan Lucian Muntean, muntean@in.tum.de MSc. Csaba
More informationCOSC 6374 Parallel Computation. Parallel Computer Architectures
OS 6374 Parallel omputation Parallel omputer Architectures Some slides on network topologies based on a similar presentation by Michael Resch, University of Stuttgart Edgar Gabriel Fall 2015 Flynn s Taxonomy
More informationBest practices. Using Affinity Scheduling in IBM Platform LSF. IBM Platform LSF
IBM Platform LSF Best practices Using Affinity Scheduling in IBM Platform LSF Rong Song Shen Software Developer: LSF Systems & Technology Group Sam Sanjabi Senior Software Developer Systems & Technology
More information20/12/12. X86_64 Architecture: NUMA Considerations
20/12/12 X86_64 Architecture: NUMA Considerations X86 Architecture Outline: X86_64 basic Architecture NUMA and ccnuma Architectures NUMA performance issues Memory allocation mechanisms NUMA Policy NUMA
More informationIntroduction to Parallel Programming
Introduction to Parallel Programming David Lifka lifka@cac.cornell.edu May 23, 2011 5/23/2011 www.cac.cornell.edu 1 y What is Parallel Programming? Using more than one processor or computer to complete
More informationInfiniBand-based HPC Clusters
Boosting Scalability of InfiniBand-based HPC Clusters Asaf Wachtel, Senior Product Manager 2010 Voltaire Inc. InfiniBand-based HPC Clusters Scalability Challenges Cluster TCO Scalability Hardware costs
More informationNovoalignMPI User Guide
MPI User Guide MPI is a messaging passing version of that allows the alignment process to be spread across multiple servers in a cluster or other network of computers 1. Multiple servers can be used to
More informationIntroduction to PICO Parallel & Production Enviroment
Introduction to PICO Parallel & Production Enviroment Mirko Cestari m.cestari@cineca.it Alessandro Marani a.marani@cineca.it Domenico Guida d.guida@cineca.it Nicola Spallanzani n.spallanzani@cineca.it
More informationResearch on the Implementation of MPI on Multicore Architectures
Research on the Implementation of MPI on Multicore Architectures Pengqi Cheng Department of Computer Science & Technology, Tshinghua University, Beijing, China chengpq@gmail.com Yan Gu Department of Computer
More informationConsiderations for LS-DYNA Efficiency in SGI IRIX and Linux Environments with a NUMA System Architecture
4 th European LS-DYNA Users Conference MPP / Linux Cluster / Hardware I Considerations for LS-DYNA Efficiency in SGI IRIX and Linux Environments with a NUMA System Architecture Authors: Stan Posey, Nick
More informationBatch Systems & Parallel Application Launchers Running your jobs on an HPC machine
Batch Systems & Parallel Application Launchers Running your jobs on an HPC machine Partners Funding Reusing this material This work is licensed under a Creative Commons Attribution- NonCommercial-ShareAlike
More informationCompute Node Linux (CNL) The Evolution of a Compute OS
Compute Node Linux (CNL) The Evolution of a Compute OS Overview CNL The original scheme plan, goals, requirements Status of CNL Plans Features and directions Futures May 08 Cray Inc. Proprietary Slide
More informationImproving User Accounting and Isolation with Linux Kernel Features. Brian Bockelman Condor Week 2011
Improving User Accounting and Isolation with Linux Kernel Features Brian Bockelman Condor Week 2011 Case Study: MPD The MPICH2 library is a common implementation of the MPI interface, a popular parallel
More informationTowards NUMA Support with Distance Information
Towards NUMA Support with Distance Information Dirk Schmidl, Christian Terboven, Dieter an Mey {schmidl terboven anmey}@rz.rwth-aachen.de Rechen- und Kommunikationszentrum (RZ) Agenda Topology of modern
More informationSCALABILITY AND HETEROGENEITY MICHAEL ROITZSCH
Faculty of Computer Science Institute of Systems Architecture, Operating Systems Group SCALABILITY AND HETEROGENEITY MICHAEL ROITZSCH LAYER CAKE Application Runtime OS Kernel ISA Physical RAM 2 COMMODITY
More informationHigh Performance Computing (HPC) Using zcluster at GACRC
High Performance Computing (HPC) Using zcluster at GACRC On-class STAT8060 Georgia Advanced Computing Resource Center University of Georgia Zhuofei Hou, HPC Trainer zhuofei@uga.edu Outline What is GACRC?
More informationMultiple Processor Systems. Lecture 15 Multiple Processor Systems. Multiprocessor Hardware (1) Multiprocessors. Multiprocessor Hardware (2)
Lecture 15 Multiple Processor Systems Multiple Processor Systems Multiprocessors Multicomputers Continuous need for faster computers shared memory model message passing multiprocessor wide area distributed
More informationUnderstanding vnuma (Virtual Non-Uniform Memory Access)
Understanding vnuma (Virtual Non-Uniform Memory Access) SYMETRIC MULTIPROCESSING (SMP) To keep it simple, SMP architecture allows for multiprocessor servers to share a single bus and memory, while being
More informationMapReduce. U of Toronto, 2014
MapReduce U of Toronto, 2014 http://www.google.org/flutrends/ca/ (2012) Average Searches Per Day: 5,134,000,000 2 Motivation Process lots of data Google processed about 24 petabytes of data per day in
More informationMPI History. MPI versions MPI-2 MPICH2
MPI versions MPI History Standardization started (1992) MPI-1 completed (1.0) (May 1994) Clarifications (1.1) (June 1995) MPI-2 (started: 1995, finished: 1997) MPI-2 book 1999 MPICH 1.2.4 partial implemention
More informationCOS 318: Operating Systems. Overview. Jaswinder Pal Singh Computer Science Department Princeton University
COS 318: Operating Systems Overview Jaswinder Pal Singh Computer Science Department Princeton University (http://www.cs.princeton.edu/courses/cos318/) Important Times u Precepts: l Mon: 7:30-8:20pm, 105
More informationTrafficDB: HERE s High Performance Shared-Memory Data Store Ricardo Fernandes, Piotr Zaczkowski, Bernd Göttler, Conor Ettinoffe, and Anis Moussa
TrafficDB: HERE s High Performance Shared-Memory Data Store Ricardo Fernandes, Piotr Zaczkowski, Bernd Göttler, Conor Ettinoffe, and Anis Moussa EPL646: Advanced Topics in Databases Christos Hadjistyllis
More informationIntroduction to UBELIX
Science IT Support (ScITS) Michael Rolli, Nico Färber Informatikdienste Universität Bern 06.06.2017, Introduction to UBELIX Agenda > Introduction to UBELIX (Overview only) Other topics spread in > Introducing
More informationUAntwerpen, 24 June 2016
Tier-1b Info Session UAntwerpen, 24 June 2016 VSC HPC environment Tier - 0 47 PF Tier -1 623 TF Tier -2 510 Tf 16,240 CPU cores 128/256 GB memory/node IB EDR interconnect Tier -3 HOPPER/TURING STEVIN THINKING/CEREBRO
More informationSlurm Version Overview
Slurm Version 18.08 Overview Brian Christiansen SchedMD Slurm User Group Meeting 2018 Schedule Previous major release was 17.11 (November 2017) Latest major release 18.08 (August 2018) Next major release
More information1 Bull, 2011 Bull Extreme Computing
1 Bull, 2011 Bull Extreme Computing Table of Contents Overview. Principal concepts. Architecture. Scheduler Policies. 2 Bull, 2011 Bull Extreme Computing SLURM Overview Ares, Gerardo, HPC Team Introduction
More information