Communication interfaces
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1 Communication interfaces Emphasis on serial interfaces Parallel link Unit 2 Unit
2 Serial link Unit 2 Unit Skew in parallel link Risk of missreading 2
3 Unbalanced link One signal line Ground Balanced link Positive line Negative line No ground besides maybe shielding 3
4 isturbance on a unbalanced link Transmitter isturbance Reciver isturbance on a balanced link 4
5 Parallel interfaces Two examples Memory interface GPIB Memory interface Example from HC2 Two emulation modes Emulation expanded wide 6 bit address bus PORTA and PORTB 6 bit data bus PORTA and PORTB Multiplexing Emulation expanded narrow 6 bit address bus 8 bit data bus PORTA and PORTB PORTA Multiplexing 5
6 Memory interface cont. External 8K static RAM, Address lines 8K addresses 8 ata lines byte oriented Output enable /OE active low Open for reading Write enable /WE active low Open for writing Two chip select CS and CS2 Activate chip Memory interface cont. Two phases Address phase ata phase The memory chip still needs to be addressed during the data phase Control using external logic 6
7 Memory interface cont. Control signals from the processor Read/write R/W High for read Low for write E clock ECLK Low during address phase High during data phase Memory interface cont. Logic for Write Enable /WE Active (low) in data phase (ECLK high) and when R/W is low ECLK R/W /WE /WE = NOT(ECLK AN NOT(R/W)) 7
8 Memory interface cont. Logic for Output Enable /OE Active (low) in data phase (ECLK high) and when R/W is high ECLK R/W /OE /OE = NOT(ECLK AN R/W) Memory interface cont A PORTB PORTA ECLK A5-A8/ LE OE 74HC374 Q Q Q2 Q3 Q4 Q5 Q6 Q7 A7-A A5-A3 +V A B C A2-A8 G G2A G2B 74HC38 Y Y Y2 Y3 Y4 Y5 Y6 Y7 A A2 A3 A4 A5 A6 A7 A8 A9 A A A2 OE WE CS CS & & R/W & 8
9 GPIB Parallel bus for measurement instruments General Purpose Instrument Bus IEEE-488 Institute of Electrical and Electronics Engineers IEEE-488. IEC-625 International Electrotechnical Commision IEEE SCPI Standard Commands forprogrammable Instruments GPIB cont. Up to 5 instruments Three types of devices Controller Talker Listener One instrument can have more than one function 9
10 GPIB cont. Speed Standard GPIB up to.8 Mbyte/second High speed GPIB HS488 up to 8 Mbyte/second GPIB cont. 8 data lines 8 ground lines 3 handshake lines 5 interface management lines
11 GPIB cont. The handshake lines NRF Not Ready for ata NAC Not ata Accepted AV ata Valid GPIB cont. The interface management lines ATN Attention EOI End or Identify IFC Interface Clear REN Remote Enable SRQ Service Request
12 GPIB cont. GPIB cont. Bus configuration Linear 2
13 GPIB cont. Bus configuration cont. Star evice evice 2 evice 4 evice 3 GPIB cont. Bus configuration cont. Combined linear and star evice 5 evice evice 2 evice 6 evice 4 evice 3 3
14 GPIB cont. Connector Stackable Unbalanced RS-232-C Synchronious or unsynchronious Logic one ~ -2 Volts Logic zero ~ +2 Volts Up to 2 Kbps in standard but used for higher bitrates, for example 5,2 Kbps Up to distances of 5 meter 4
15 RS-232-C signals 25 pin SUB RS-232-C signals 9 pin SUB 5
16 Transfer of the letter A odd parity Odd number of ones +5V ata +2V Idle Startbit Stopbit Paritybit RS-232-2V Transfer of the letter A even parity Even number of ones +5V ata Idle Startbit Stopbit Paritybit 6
17 Transfer of the letter A space parity Always zero +5V ata Idle Startbit Stopbit Paritybit Transfer of the letter A mark parity Always one +5V ata Idle Startbit Stopbit Paritybit 7
18 Transfer of the letter A no parity No parity bit +5V ata Idle Startbit Stopbit Typical asynchronous transmitter 8
19 Typical asynchronous receiver Hamming coding Example 4 data bits 3 parity bits 3 2 P 2 P P 9
20 2 Hamming coding CONT. Generation of parity bits = = = P P P exclusive-or Hamming coding CONT. Generation of status bits S 2 S S give error position = = = P S P S P S Position 7 MSB (to the lrft) Position LSB (to the right)
21 RS-422, RS-423 and RS-485 RS-423 unbalanced, faster than RS-232 but signal compatible, half duplex RS-422 balanced version of RS-423, half duplex RS-485, balanced, multi master Return to zero protocols Synchronisation 2
22 Return to zero protocols cont. Synchronisation Serial peripheral interface, SPI Synchronious Separate clock line Separate transfer lines in the two directions Master and slave(s) Bit rate up to tens of Mbps Peripherals at short distance 22
23 Serial peripheral interface, SPI one slave From master to slave From slave to master Slave Master Serial clock Slave select Serial peripheral interface, SPI 23
24 Serial peripheral interface, SPI multiple slaves Slave Master Slave 2 Separate Slave select Slave 3 Serial peripheral interface, SPI clocking conditions 24
25 Inter-integrated circuit, I2C Synchronious Bus topology Bit rates up to Mbps Inter-integrated circuit, I2C 25
26 Inter-integrated circuit, I2C cont. V CC R PU R PU SA SCL ata OUT CLK OUT ata2 OUT CLK2 OUT ata IN CLK IN ata2 IN CLK2 IN evice evice2 Inter-integrated circuit, I2C cont. Master transmitting two bytes of data to slave S Slave address R/W A ata A ata A/A P ' write From master to slave From slave to master S = start condition P = stop condition R/W = read/write A = acknowledge A = not acknowledge 26
27 Inter-integrated circuit, I2C cont. Master receiving two bytes of data from slave Inter-integrated circuit, I2C cont. Start condition 27
28 Inter-integrated circuit, I2C cont. Stop condition Inter-integrated circuit, I2C cont. ACK condition 28
29 Inter-integrated circuit, I2C cont. NACK condition Inter-integrated circuit, I2C cont. Bit transaction SA SCL ata valid 29
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