ELE492 Embedded System Design

Transcription

1 Overview ELE9 Embedded System Design Examples of Human I/O Interfaces Types of System Interfaces Use of standards RS Serial Communication Overview of SPI, I C, L, and CAN Class //0 Eugene Chabot Examples of Human I/O Interfaces Buttons Switches Buzzers (Audible feedback) LEDs Ls Transducers (Visual, Sound, Thermal, ) Types of System Interfaces Directly (TTL logic levels or Analog) Proprietary protocols Standard protocols RS (EIA/TIA) SPI IC CAN Ethernet USB

2 Why do we use standards? Consortium examined and approved Widely used (many development and debugging tools) Well tested Focus on specialization Inexpensive with larger market (Mass production) Serial Communication - Motivation RS is a simple protocol Around since ~90 a.k.a. EIA/TIA Latest revision EIAF (in 99) Widely implemented Non-TTL voltage levels Logic 0 - +V to +V (Space) Logic - -V to -V (Mark) Serial Communication (Cont d) Serial Communication (Cont d) Computer (DTE) Modem (DCE) Direct link Modem (DCE) Computer (DTE) Initiate communication with start bit Send data bits (One byte) Least significant bit first Could use,,, or bits Could have a parity bit Finish with stop bit(s) : transmit data : receive data : data carrier detect : clear to send : request to send : data set ready Start bit 0 Stop bit Stop bit Figure 9. Point-to-point asynchronous connection Diagram from page Figure 9. The format of a character Diagram from page

3 Serial Communication (Cont d) Hardware flow control is DTE to DCE is DCE to DTE Software flow control XON (character or 0x) to start XOFF (character 9 or 0x) to stop Not able to send binary files Parity checking Catches an odd number of bit changes Common Baud Rates What is a baud rate? Number of signal changes What is the duration of each bit of a 900 baud serial communication link? /900 = 0uS Common Rates: 00, 00, 00, 00, 00, 00, 00, 00, 900, 00, 900, 00, 00, 00, 00 Null Modem Connection Connect two DTE devices directly together -> and -> Signal Name FG (frame ground) TD (transmit data) RD (receive data) (request to send) (clear to send) SG (signal ground) (data set ready) (carrier detect) DTR (data terminal ready) DTR (data terminal ready) DB pin 0 0 DTE DTE DB9 pin - DB9 pin - Figure 9. Null Modem connection DB pin 0 0 Diagram from page Signal Name FG RD TD SG DTR DTR Implementing Serial Communication Software implementation Create proper delays Hardware implementation set proper direction of TX and RX pins Note: MAX (or MAX) DC-DC converter for getting proper voltage levels

4 Serial Communication Software Implementation Provide proper delays Requires polling for receiving Wastes software resources Accuracy of bit clock affects reliability Send start bit Delay x microseconds Send least significant bit Delay x microseconds Send stop bit Delay x microseconds Serial Communication Hardware Implementation Control operation through registers TXSTA, RCSTA, SPBRG,PIR,PIE Transmitted/received data in registers TXREG, RCREG Automatically maintains baud rate clock Set SPBRG to configure baud rate TXSTA Register CSRC TX9 TXEN SYNC BRGH TRMT TX9D 0 CSRC TX9 TXEN SYNC -- BRGH TRMT TX9D Value after reset CSRC: Clock Source Select bit Asynchronous mode: (don't care) Synchronous mode: 0 = Slave mode (clock from external source) = Master mode (clock generated internally from BRG) TX9: 9-bit Transmit Enable bit 0 = selects -bit transmission = selects 9-bit transmission TXEN: Transmit Enable Bit 0 = Transmit disabled = Transmit enabled SYNC: USART Mode Select Bit 0 = Asynchronous mode = Synchronous mode BRGH: High Baud Rate Select Bit Asynchronous mode: 0 = low speed = high speed Synchronous mode (unused) TRMT: Transmit Shift Register Status Bit 0 = TSR full = TSR empty TX9D: 9th bit of transmit data Can be Address/Data bit or a parity bit Figure 9. The TXSTA Register (redraw with permission of Microchip) Diagram from page 9 RXSTA Register SPEN RX9 SREN CREN ADDEN FERR OERR 0 Value after SPEN RX9 SREN CREN ADDEN FERR OERR RX9D reset SPEN: Serial Port Enable bit 0 = Serial port disabled = Serial port enabled RX9: 9-bit Receive Enable bit 0 = Selects -bit reception = Selects 9-bit reception SREN: Single Receive Enable bit Asynchronous mode (don't care) Synchronous mode - Master (This bit is cleared after reception is complete): 0 = Disables single receive = Enables single receive Synchronous mode - Slave: (don't care) CREN: Continuous Receive Enable bit Asynchronous mode: 0 = Disables receiver = Enables receiver Synchronous mode: 0 = Disables continuous receive = Enables continuous receive (CREN overrides SREN) ADDEN: Address Detect Enable bit Asynchronous mode 9-bit (RX9 = ): 0 = Disables address detection, all bytes are received, and 9th bit can be used as parity bit. = Enables address detection, enable interrupt and load of the receive buffer when RSR<> is set FERR: Framing Error bit 0 = no framing error = Framing error OERR: Overrun Error bit 0 = No overrun error = Overrun error (can be cleared by clearing bit CREN) RX9D: 9th bit of Received Data This can be Address/Data bit or a parity bit, and must be calculated by firmware. Figure 9.9 The RXSTA Register (redraw with permission of Microchip) RX9D Diagram from page 0

5 SPBRG Serial port baud rate generator Overview of SPI Serial peripheral interface Master provides clock Table 9. Formula for baud rate SYNC bit BRGH = 0 (low speed) BRGH = (high speed) 0 (Asynchronous) Baud rate = F OSC /( (X+)) (Synchronous) Baud Rate = F OSC /((X+)) Baud Rate = F OSC /((X+)) N/A Single slave operation Multiple slave operation Note. X is the content of the SPBRG register In asynchronous mode: When BRGH =, SPBRG = (F OSC /( x baud rate)) - When BRGH = 0, SPBRG = (F OSC /( x baud rate)) - In synchronous mode: SPBRG = (FOSC/( x baud rate)) - Diagram from page Diagrams from Overview of I C Inter-integrated circuit More overhead than SPI Open drain circuit Allows multiple masters CLK CLK SDA line SCL line Data Data R P R P CLK CLK +V DD Data Data Device Device Figure. Connecting standard- and fast-mode devices to the I C bus Diagram from page 0 S Slave address R/W A Data A Data A P '' (read) data transferred (n bytes + acknowledge) Figure. A master read a slave immediately after the first byte Diagram from page 09 Overview of L Local interconnect network Cross between I C and RS Single wire with pull-up open collector Defined up to 0K baud rate

6 Overview of CAN Controller area network Developed by auto supplier Robert Bosch in mid 90s ISO standard in 99 (ISO 9) Layered approach