Motoro a emicon uctor. cto er Document revi ion 1 anuar 199

Transcription

1 3xx euron i M Driver Motoro a emicon uctor cto er 1993 Document revi ion 1 anuar 199 The accompanying software package interfaces a Motorola 683xx family microcontroller to the LO W O Neuron Chip MIP interface. The actual driver and accompanying example use the MC68332 microcontroller, however, with minor modifications any 683xx family member may be used. With additional hardware and minor software modifications a 680x0 microprocessor may be used. Appendix discusses files available for the MC68340 microcontroller. Appendix C discusses files available for the MC68360 microcontroller. The appendices are followed by sample schematics. ve v e The Microprocessor Interface Program (MIP) is special system firmware, available from Echelon Corp., for the Neuron Chip that transforms it into a communications coprocessor for an attached host processor. The MIP moves the upper layers of the LonTalk protocol (part of layer 5 to layer ) to the host. The MIP is used to provide a higher data throughput than the standard parallel I/O interface model. In addition a MIP based application can work with up to 40 6 network variables as compared to the 62 limit allowed with a standalone Neuron. Two versions of the MIP are available from Echelon. The P20/P50 version implements a direct connection to the host interface of a Neuron Chip while the DPS version implements a dual ported S RAM connection to the host interface. A sample DOS driver is available from Echelon for connection of the MIP to a DOS based host computer. The driver presented here modifies this DOS driver for connection to the 683xx microcontroller system. The driver with minor exceptions is written in C. (Routines for enabling and disabling interrupts are written in assembly language). It should be noted as a result of modifying the sample DOS driver some residual DOS code or definitions may remain, but they should not interfere with proper 683xx operation. Page

2 IP Inter e vervie This software uses the chelon MIP interface and implements the driver for the P50 version (for use with the MC Neuron Chip). Currently the DP version of the MIP is not supported. This interface shown in the accompanying hardware schematic, uses all 11 pins of the Neuron Chip's I/O port for connection to a host via a 8 bit data bus,, chip select and either an address pin or a handshake pin. IO_8 usage depends upon selection of the Neuron Chip MIP configuration of either slave mode A or slave mode B. In the following example Mode B is used which causes IO_8 to become a register select pin. This allows the Neuron Chip to occupy two memory locations in the memory map of the host processor. These memory locations are used for selection of a data transfer memory location and a handshake memory location. ost P stem Requirements To implement the MIP driver with the family the following software and hardware features are required a) A CPU with a Motorola instruction set b) Memory map chip select logic for enabling the Neuron Chip. This logic may either be contained in the CPU as it is in the MC68332 or may be provided by external hardware c) A periodic interval timer, (tick), capable of generating an interrupt to the CPU. The time period of this timer should be in the range of 30 to 200 ms d) ardware for detecting and latching reset from the Neuron Chip plus a single bit I/O port from the processor to clear this latch. e) A single bit I/O port from the processor for activating the Neuron Chip's reset line f) Time-out or watchdog timer hardware with a time period of 1 to 4 seconds (optional). This is used to abort transactions between the host CPU and the Neuron Chip should a hardware failure occur between the host and the Neuron Chip g) Driver AM size approx. 5-6kbased upon a total of 1 buffers h) Driver program size approx. 3 k evelo ment ools Requirements The 68 C compiler and linker used to create the ob ect file for the MIP driver was release 8.2 available from Intermetrics. Although the C programming language is somewhat universal, data sizes, methods of dealing with interrupt routines, and embedded assembly language may differ with other C compilers. Therefore modifications may be required to adapt to other compilers. Page2

3 ile Contents The files provided for the driver consist of the following mip_exec.c Main executable code for driver. This file contains the application callable functions of open, close, read and write. mip_332.c hardware specific interface software mdv_time.c Time-out timer (see time-out timer options) neuron.h C language header file describing registers for the Neuron Chip m332sim.h C language header file describing SIM (System Integration Module) registers. 332.bat D S batch file containing command lines for compiling C language source header files and linking compiler output modules to single relocatable object module. esultant relocatable object module must then be linked with user application code null_time.c ll time-out timer functions provide null operation 332drvr.ln Driver compiled and ready to be linked to application, null time-out timer used o t a e ptions at Compile ime The following software options may be selected at compile time by modifying variable initial values, define statement values or lines of code. or an understanding of MC68332 register initiali ation values refer to MC68332 user manual. The number of read and write queues may be set by modifying the file of mip_exec.c variable name of river_len. To set 68K exception interrupt levels for the tick timer and Neuron Chip reset detection circuitry, modify file mip_332.c, the macro enable_interrupts, the 68K instruction immediate data field of "or d1". to move the interrupt mask up or down as required by the interrupt levels that need to be enabled. In addition the file of mip_332.c function of pio_init, C source line of mcsim.picr = 0x0 1c should be modified as required to select the interrupt level generated by the periodic interval timer. To select the periodic interval timer interrupt period modify file mip_332.c, function pio_init, C source line of mcsim.pitr = 12. Note that file m sim.h contains several predefined values for ease in setting this time period. Page3

4 To select the location of the Neuron Chip in the memory map modify file mip_332.c, function pio_init, C source statement of mcsim.csbar3 _ 3. Retain the 2k block size during this modification. imilar changes for mcsim.csbar and mcsim.csbar may be used to change the memory mapped addresses of the location of the reset latch clearing hardware and the Neuron Chip reset logic. 683xx ri er sage For overall usage of the MIP driver please refer to the Lon uilder Microprocessor nter ace Program ser's Guide and the LON W ORKS Host Application Programmer's Guide. Usage of the MIP driver provides 4 function calls for the application program. These four function calls are open Used for allocation resources required for operation of driver and prepare the MIP interface to transfer data close Deallocate resources used by the MIP driver read Read a message from the Neuron Chip via the MIP interface rite rite a message to the Neuron Chip via the interface Formats of the data field being passed from or to the Neuron Chip are outlined in the LON W ORKS Host Application Programmer's Guide. Additional information on network management commands and addressing structure formats are in the MC MC euron C ip istri uted Communications and Control Processors data sheet appendix A. rogram Mo ifi a io for Mem ers of 683xx ami In order to adapt this driver to other members of the 683xx family modifications should be made in the files of mip_332.c, mdv_timer.c and associated header files for these C language source files. In the file mip_332.c the following routines may need to be modified. Note that the first three routines are not callable functions but are Intermetrics C compiler macros and are used for code substitution later in the file. These three macros contain the only 68 assembly language in the driver. The macro of vector_init is used to initialize autovect 4 exception vector to the address of routine pit and initialize autovect to the address of the routine ir. Neither of these operations would be required in a R M based application but are used for convenience in a RAM based development environment. Also this function is used to lower the interrupt mask level which in this example is 3. The interrupt level should be one less than the lowest system interrupt level desired. The macro of enable_interr ptsreads the existing interrupt level and sets a new interrupt mask level. This should set the interrupt level to the same value as in the macro vector_init. Page4

5 The macro disab e_interr pts sets interrupt level to the highest exception level. This operation disables all interrupts except level. The function of reset_mip has no operation at this time. The function of read_isr, reads the Neuron Chip reset generated interrupt status. This is done by temporarily making port f of the into an I/O port and reading the I/O pin. After reading the I/O pin, the pin is restored to its original configuration of an interrupt pin. The function returns the value true if a reset interrupt is true. The function also clears the reset logic by activation of a chip select line on the The chip select line used in this example is CS3. The function of pio_init initializes the MC68332 chip select logic, the periodic interrupt timer, and through the use of the macro vector_init the interrupt vectors. The chip select logic must be initialized to desired port size, start address and block size, and option values. Option values consist of upper or lower byte on data bus, read/write and bus cycle wait states. Currently three chip select lines are used for the MIP interface. CS is used to access the Neuron Chip which consists of two memory locations in a 2 byte memory block starting at address 0x These two memory locations represent data and handshake. CS3 is used to clear the reset latch. CS is used for the autovector selection for reset detection of interrupt. Also the periodic interrupt timer is initialized in this function. This timer is used as the tick timer for the driver. As shown the timer interrupts the CP on level using vector 28 with a time interval of 25ms. This time interval may be increased or decreased for a tweak on overall system performance. aster tick timer values emphasize moving data between the host processor and the Neuron Chip. Slower tick times emphasize host processor compute power. Note Although the user of this driver would not make changes to the functions pit and ir, they are interrupt service routines, not normal C functions. The Intermetrics C compiler uses the _ preceding the function name to indicate to the compiler that this function is an interrupt handler, and to replace the normal RTS (return form subroutine) instruction that occurs at the end of the function with a RT (return from exception) instruction. i i e ri er To ease the process of compiling and linking the MIP driver, a DOS batch file, 332.bat, is included. If changes are made to any of the three source files, mip_exec.c, mip_332.c and mdv_time.c, then the batch file should be executed. The result of the batch file is a relocatable ob ect module that will be linked to the desired host application. Page5

6 Appen i A Appli ation le el programming or t e At the application level the user of MIP must handle some network management commands. The user must save data passed in some of these commands and also respond to the Network Manager with the information re uested by other network management commands. In order to send a message over the MIP interface the data must be enclosed with appropriate MIP header information. The header information includes length of the data and the addressing information for the message destination. The code to handle these network management commands format data to be passed over the MIP interface must also be written by the user. To make this operation easier one may utilize a example provided by Echelon to handle this operation. This example is included with the MIP product and also is available on the LonLink bulletin board service. The example consists of a series of C source code files starting with HA.C. The file HA.C is implements a very specific example for updating and displaying network variables, sending and receiving messages and binding to other nodes by a D based console. owever some of the other source files called by HA.C may be used in a user application with some modification. Files NI_MSG.C and APPLMSG.C may be modified, compiled and linked with user code. The file NI_MSG.C contains user callable functions of ni_init, ni_send_msg_ ait, ni_receive_msgand ni_send_response. As their name implies these functions may be used to initialize the network interface, send a properly formatted message over the interface, receive a message over the interface and send a response over the MIP interface. The file APPLMSG.C contains code to handle the network management commands that the host computer must respond to. These commands are query_nv_config, nv_fetc, update_nv_config, query_snvt and set_node_mode. sed with the above mentioned files are two C header files. These are NI_MSG.H and NI_MGM.H. These files contain structure definitions and must be included in your C source file. Note that the data type definitions of bits is for little endian bit ordering and must be reversed to big endian bit ordering for Motorola microcontroller designs. For additional detail of this Echelon provided example, consult the O O ost pp i atio ro rammer s i e. MC6 xx Neuron Chip MIP Driver Page6

7 ppe i M M ri er In addition to the MC68332 files are source, header and batch files to use MIP with the MC The MC68340 is similar to the MC68332 with a System Integration Module(SIM) providing chip select pins. hile there are similarities in the SIM modules on the MC68332 and the MC68340 system integration module on the MC68340 is programmed differently than the MC68332 SIM. The SIM on the has 4 chip select lines and the programming for the address range and block si e are slightly different. The programmable registers of the periodic interrupt timer(pit) on the MC68340 is identical to that of the MC68332 however the address in the SIM memory map is different. dditional files included for MC68340 support are mi _340.c hardware specific interface software m340 im.h C language header file describing SIM (System Integration Module) registers. n r n_c.h C language header file describing registers for the Neuron Chip with locations for reset latch clear and host initiated reset logic 340. D S batch file containing command lines for compiling C language source header files and linking compiler output modules to single relocatable object module. esultant relocatable object module (340drvr.ln) must then be linked with user application code 340drvr.ln Driver compiled and ready to be linked to application, null time out timer used Due to the fact that the MC68340 has only a total of 4 chip selects additional hardware is used to further decode a single chip select line to include all of the functions associated with the addition of a MIP based Neuron Chip to a MC The chip select with additional address lines select the Neuron Chip s data and handshake register, the reset latch clear line and the host initiated reset logic. Page

8 ppe i C: MC6 6 M Dri er Also included are source, header and batch files to use MIP with the MC Additional files included for MC68360 support are mi _360.c hardware specific interface software m360 im.h C language header file describing SIM (System Integration Module) registers. n r n_c.h C language header file describing registers for the Neuron Chip with locations for reset latch clear and host initiated reset logic 360. D S batch file containing command lines for compiling C language source header files and linking compiler output modules to single relocatable object module. esultant relocatable object module (360drvr.ln) must then be linked with user application code 360drvr.ln Driver compiled and ready to be linked to application, null time out timer used. Di i er: Although this software has been carefully reviewed and is believed to be reliable, neither Motorola, nor the author assume any liability arising from its use. his driver software may be freely used, modified or distributed with user end product(s) at no cost obligation to the user. Page8

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