Functional Units of a Modern Computer
|
|
- Candice Blair
- 6 years ago
- Views:
Transcription
1 Functional Units of a Modern Computer We begin this lecture by repeating a figure from a previous lecture. Logically speaking a computer has four components.
2 Connecting the Components Early schemes for connecting the components could be very messy. The backplane of a PDP 10, circa 1970
3 Another Motherboard
4 Copper Traces on a PCB These traces, which do the job of wires, are the real advantage of a PCB. All modern busses are just collections of traces, aluminum or copper.
5 Types of Busses There are a number of ways to classify computer busses. Here we focus on one distinction: synchronous and asynchronous. A bus transaction is an exchange of data or control information. In simple transactions, a source asserts signals onto a bus, and a destination copies the values into some sort of buffer memory. More complex transactions might comprise a number of simple transactions. A memory read transaction might include the following: Assert the memory address on the address lines. Assert READ on the control lines. Memory places data on the data lines. The distinction of simple vs. complex transactions is not important. The term transaction covers a variety of possible exchanges. A synchronous bus is one in which there is a clock signal, used to coordinate bus transactions. Naturally, it has a line (or trace) dedicated to transmit it. An asynchronous bus is one without a clock signal. It often uses control signals, such as REQ and ACK, to coordinate transactions.
6 Clock Terminology Clock frequencies are specified in Hertz, or cycles per second. Common units include KHz (thousand cycles per second), MHz (million cycles per second), and GHZ (billion cycles per second). The inverse of clock frequency is clock period or clock cycle time. Consider a 2 GHz clock. The frequency is per second, written more precisely as sec 1. The period is 1.0 / ( sec 1 ) = sec = 0.5 nanosecond = 500 picoseconds. Clock signals are described with standard terminology. The clock may be said to tick on every rising edge.
7 The Clock: System and Bus A modern computer is a synchronous sequential machine. A synchronous machine is one in which the actions are coordinated by a central clock signal, either directly or indirectly. A sequential machine is one that has memory and in which the results of a computation depend on both the input and the contents of memory. Each computer has one master clock, probably not called by that name. All other clock signals are derived from this master clock. We can have a frequency divider used to produce a slower clock. For example, a 2 GHz (2000 MHz) clock signal can be converted by a divide by four circuit into a 500 MHz clock signal. There are also frequency doublers, used to produce a faster clock. A 1 GHz clock signal can be doubled to produce a 2 GHz clock signal. Bus clocks are often in the 150 MHz to 250 MHz range.
8 Bus Clock Signals The bus clock frequency is usually a fraction of the system clock frequency. In a typical example, a 2 GHz system clock can be passed through a divide by 8 circuit to produce a 250 MHz bus clock signal. System clock signals are generally represented as square waves, as we have done in previous slides in this lecture. Bus clock signals are commonly represented as trapezoidal waves, to emphasize the fact that signal levels do not change instantaneously. There is no abstract theory behind this representation; it is just common.
9 Signal Assertion Levels A control signal is said to be asserted when it causes some bus action to take place. A signal may be asserted high or asserted low. The terms high and low refer to the voltages used to represent logical signals. In the original TTL protocol, the following are standard. 5.0 volts logic volts logic 0. In TTL, a signal is asserted high when it is driven from 0 volts to 5 volts, in order to achieve its affect. In TTL, a signal is asserted low when it is driven from 5 volts to 0 volts, in order to achieve its affect. A control signal that is active high is simply named. X is active high. There are several notations used to indicate that a signal is active low. Here are several common notations.
10 Example: Memory Control Signals Consider a memory unit that is controlled by the CPU. There are two signals to the memory. One activates it and one indicates the type of transaction commanded by the CPU. SELECT# This active low signal selects the memory chip and activates its circuitry. When high, the chip is inactive. R/W# This is a two valued signal, indicating which of the two possible transactions is commanded by the CPU. The symbol with the #, W#, indicates the action commanded when the signal is asserted low. The symbol without the #, R, indicates the action when the signal is high. If R/W# = 0, the CPU is writing to memory. If R/W# = 1, the CPU is reading from memory.
11 Memory Control The effect of the control signals on memory is summarized in this truth table. Select# R/W# Action 1 0 Memory contents are not changed 1 1 or accessed. Nothing happens. 0 0 CPU writes data to the memory. 0 1 CPU reads data from the memory. There is a standard shorthand for the above table. Select# R/W# Action 1 d Memory contents are not changed or accessed. 0 0 CPU writes data to the memory. 0 1 CPU reads data from the memory. The d in the top row indicates that when Select# = 1, the value of the R/W# signal has no affect on what the memory does. It stands for don t care.
12 Synchronous Control Signals Here is a depiction of two control signals, each of which is asserted low. Signal A# is asserted during the second half of clock pulse T1. Signal B# is asserted during the first half of clock pulse T1 and is shown as asserted for the duration of this diagram. Signal A# is somewhat unusual in that it is asserted at the same time as a clock transition. Often signals are asserted before a transition so that the signal is stable at the time of the transition.
13 Remember the Garden Hose At the time scales of human experience, propagation of electric signals appears to be instantaneous. In the world of CPU design, when timings are routinely expressed in tens of picoseconds (1/100 of a nanosecond or second), times to charge a control line become significant. Consider a bus with a length of 10 centimeters, about 4 inches. The speed of light is about 30 centimeters per nanosecond. The speed of signal transmission of a bus is about 20 centimeters per nanosecond. The signal will take about 0.5 nanoseconds, or 500 picoseconds, to traverse the length of the bus. The signal on the bus is said to be stable after 500 picoseconds.
14 We now have notations for control signals. Collections of Signals What about other signals, such as addresses and data? The interest in representing such non control signals is not their actual value, but whether or not they are valid. For example, we do not want to know the actual values on address lines, but whether or not there is a valid address being asserted. The above notation might be used for a 32 bit address line. A valid address is asserted on these lines in the middle of the first half of T1. It remains valid until the middle of the first half of T2.
15 A Synchronous Bus Timing Diagram This is a bus read. The sequence: the address becomes valid, RD# is asserted, and later the data become valid.
16 An Asynchronous Bus Timing Diagram Here, the importance is the interplay of the Master Synchronization (MSYN#) and Slave Synchronization (SSYN#) signals. The sequence: 1. The address becomes valid; MREQ# and RD# are asserted low. 2. MSYN# is asserted low, causing the memory to react. 3. Data become valid and SSYN# is asserted low. 4. When SSYN# goes high, the data are no longer valid.
17 More on Commercial Memory Modules Here again is a picture of a commercial memory module. Here is a picture of the slot into which three memory modules may be placed.
18 Inserting the DIMM The next figure shows how to insert the Dual In Line Memory Module. The previous memory module had eight memory chips. This module has eight memory chips and a control chip in the middle. We shall discuss this organization of a module into multiple chips in a later lecture.
19 Connecting the CPU to the Motherboard Early CPU chips in the Intel line, such as the 8088 and could be packaged as DIP (dual in line pin) modules. Here is a picture of the Intel Later Pentium CPU chips required more pins, hence different packaging.
20 Cooling the Central Processor Unit A modern CPU generates a lot of heat. This has given rise to an industry devoted to building cooling devices. Here is a picture of one such device. Note that it is the CPU attached to the top of this radiator device. We do not see the fan.
21 The Fetch Execute Cycle Again we mention the fetch execute cycle, which is the key feature of a stored program computer. The instruction is fetched from memory and then executed. The cycle can be described differently, with more phases, as useful to support discussions, but it is really the same. Discussions of the MIPS 32 architecture divide the process into five phases: 1. Fetch instruction from memory. 2. Decode the instruction and read two registers. 3. Execute the operation or calculate an address. 4. Access an operand in data memory or write back a result. 5. For LW only, write the results of the memory read into a register. LW (Load Word) loads a 32 bit register from memory. This key cycle focuses on the IR (Instruction Register), which is a part of the CU (Control Unit) of the CPU. Any binary data copied into the IR are automatically interpreted as an instruction.
22 What Is Executed? Each executable instruction is represented in memory as a binary number. Your instructor prefers to use hexadecimal representation of these numbers, as he finds it easier to read. Consider the following sequence. B B D8 03 D8 8B CB 2B C8 2B C0 EB EE This is represented in standard format, with four bytes (eight hexadecimal digits) per line. At this point, we cannot interpret this sequence. The sequence might represent four floating point numbers, followed by a 16 bit integer. It might represent a strange sequence of character data. If this sequence is read into the IR (Instruction Register), but not all at once, it will be interpreted as a sequence of assembly language instructions. The process of reverse engineering a sequence of absolute binary code into a sequence of assembly language instructions is called disassembly.
23 Here is the disassembled object code. The Disassembly of the Sample Code B82301 MOV AX, 0123 ; Move value 0x0123 to AX ADD AX, 0025 ; Add value 0x0025 to AX 8BD8 MOV BX, AX ; Copy contents of AX into BX 03D8 ADD BX, AX ; Add contents of BX to AX 8BCB MOV CX, AX ; Copy contents of AX into CX 2BC8 SUB CX, AX ; Subtract AX from CX 2BC0 SUB AX, AX ; Subtract AX from AX, clearing it EBEE JMP 100 ; Go to address 100 We shall discuss disassembly a bit more in future lectures. Basically, this is the main function of a good debugger. Terminology: The name assembly language refers to the sequence of human readable code as seen in the column above. Assembly language instructions, called mnemonics are supposed to be suggestive to the programmer. The term object code refers to the sequence of binary numbers, as shown in the left column and on the previous slide. Such code is often represented in hexadecimal form for easier reading.
24 The Assembly Link Execute Cycle Here is the common sequence for processing assembly language programs. The process starts with a file in the form of readable text. The assembler produces listing files (to be read by humans) as well as the object file, containing object code, which is almost ready for execution. The linker connects the object code of the user program with object code from any external procedures used by that code. It produces a file ready for execution. The loader places the executable file into memory and starts execution. The process for higher level languages is similar, except for the fact that the source code is said to be compiled. Compilers for IBM mainframe languages tend to emit assembly language that is then assembled. Other compilers emit object code.
25 The Microsoft Common Language Infrastructure Microsoft introduced its.net architecture on February 13, One of the goals of this architecture was to make it easier to call programs written in one of Microsoft s languages from those written in another. One common option was to call C++ code from Visual Basic code. The VB code would handle the user interface. The C++ code would handle the computations. In order to make the languages interoperable, certain standards were required. One change gave rise to the CIL (Common Intermediate Language), originally called MSIL (Microsoft Intermediate Language). The process of producing an executable program in this architecture is a bit indirect. 1. The compiler converts the source code into a CIL file. 2. The CIL file is converted to a form called bytecode that is called a.net assembly. 3. The.NET assembly is assembled into an object file and linked to form an executable file. This is then executed. There are many more features to the CLI (Common Language Infrastructure) than are mentioned in this slide.
26 The Memory Component Here are a few introductory remarks on memory. It will be studied in greater detail in two future sets of lectures. Modern computers tend to have memory that is byte addressable. A byte corresponds to the size required to store the older character codes. It is a grouping of 8 binary bits. The CPU has two registers dedicated to handling memory. The MAR (Memory Address Register) holds the address being accessed. The MBR (Memory Buffer Register) holds the data being written to the memory or being read from the memory. This is sometimes called the Memory Data Register. Modern memory must allow for addressable entities that have larger sizes. Common lengths are 16, 32, and 64 bits, corresponding to 2, 4, and 8 bytes. How do we address these larger items? Here, we assume standard memory alignments for multiple byte items, as these yield more efficient programs. The standard: every byte has its own address. 16 bit ( 2 byte) words have addresses that are multiples of bit (4 byte) words have addresses that are multiples of 4.
27 Consider a 64 KB Memory This is considered only because it allows for very easy illustrations. 64 K = 2 16 = 65,536. Byte addresses run the range from 0 through 65, bit word addresses: 0, 2, 4,., 65, bit word addresses: 0, 4, 8,., 65,532. The 16 bit word at address 65,534 contains the bytes at addresses 65,534 and 65,535. The 32 bit word at address 65,532 contains bytes at addresses 65532, 65533, 65534, and In general, a 16 bit word at address N comprises two bytes, at address N and address N + 1. In general, a 32 bit word at address N comprises four bytes, at addresses N, N + 1, N + 2, and N + 3. Which bytes go where? This has given rise to the discussion called Big Endian vs. Little Endian.
28 Example: A 32 bit Value Suppose that the 32 bit register EAX contains the value 0x which has decimal representation 16, 909, 060. The value in EAX can be represented as: This figure uses the bit numbering scheme common for Intel computers. Suppose the instruction MOV Z, EAX is executed. What is placed into address Z? This depends on whether the computer is a big endian or little endian device. (The Pentium is a little endian device, but we shall examine both options.) The little endian design stores the little end at address Z. The big endian design stores the big end at address Z.
29 The 32 Bit Example Continued The value that goes into each address is a one byte number, comprising two hexadecimal digits. The hexadecimal digits are not reversed. Address Big-Endian Little-Endian Z Z Z Z Here is a graphic representation of the same process.
30 Consider this memory map. Example: Core Dump at Address 0x200 Address 0x200 0x201 0x202 0x203 Contents What is the 32 bit value stored at address 0x200? Big endian: Little endian: The number is 0x Its decimal value is = 33,818,120 The number is 0x Its decimal value is = 134,611,970. NOTE: Read the bytes backwards, not the hexadecimal digits. What is the 16 bit value stored at address 0x200? Big endian: Little endian: The number is 0x0204. Its decimal value is = 516 The number is 0x0402. Its decimal value is = 1,206. The 16 bit value at 0x200 comprises bytes at addresses 0x200 and 0x201 only. The values at 0x202 and 0x203 are not relevant.
31 I/O Ports Computer memory is best considered as an array of addressable bytes. I/O ports are addressed similarly, but are best considered as an array of addressable registers, each of fixed width. Each I/O device is connected to the computer bus through a number of registers called I/O ports. There are three main types used. Data register Control register Status register For an input device, this contains data to be sent to the CPU. For an output device, this contains data to be output. This allows the CPU to control operation of the I/O device. This register is best considered as a set of Boolean flags, each controlling one option: can the device interrupt the CPU, etc. This allows the CPU to detect the status of the device. Is the power on? Is there a paper jam? The control register is an output register; the CPU writes information to it. The status register is an input register; the CPU reads status information from it. Some simple devices combine the two into a Control & Status register.
The Memory Component
The Computer Memory Chapter 6 forms the first of a two chapter sequence on computer memory. Topics for this chapter include. 1. A functional description of primary computer memory, sometimes called by
More informationComputer Memory Basic Concepts. Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University
Computer Memory Basic Concepts Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University The Memory Component The memory stores the instructions and data for an
More informationComputer Organization & Architecture M. A, El-dosuky
4.1-storage systems and technology Memory as a Linear Array Computer Organization & Architecture M. A, El-dosuky A byte-addressable memory with N bytes is the logical equivalent of a C++ array, declared
More informationCS 101, Mock Computer Architecture
CS 101, Mock Computer Architecture Computer organization and architecture refers to the actual hardware used to construct the computer, and the way that the hardware operates both physically and logically
More informationModule 5 - CPU Design
Module 5 - CPU Design Lecture 1 - Introduction to CPU The operation or task that must perform by CPU is: Fetch Instruction: The CPU reads an instruction from memory. Interpret Instruction: The instruction
More informationCSC 101: Lab Manual#9 Machine Language and the CPU (largely based on the work of Prof. William Turkett) Lab due date: 5:00pm, day after lab session
CSC 101: Lab Manual#9 Machine Language and the CPU (largely based on the work of Prof. William Turkett) Lab due date: 5:00pm, day after lab session Purpose: The purpose of this lab is to gain additional
More informationThe Central Processing Unit
The Central Processing Unit All computers derive from the same basic design, usually referred to as the von Neumann architecture. This concept involves solving a problem by defining a sequence of commands
More informationMicroprocessors and Microcontrollers Prof. Santanu Chattopadhyay Department of E & EC Engineering Indian Institute of Technology, Kharagpur
Microprocessors and Microcontrollers Prof. Santanu Chattopadhyay Department of E & EC Engineering Indian Institute of Technology, Kharagpur Lecture - 09 8085 Microprocessors (Contd.) (Refer Slide Time:
More informationChapter 4. MARIE: An Introduction to a Simple Computer
Chapter 4 MARIE: An Introduction to a Simple Computer Chapter 4 Objectives Learn the components common to every modern computer system. Be able to explain how each component contributes to program execution.
More informationASSEMBLY LANGUAGE MACHINE ORGANIZATION
ASSEMBLY LANGUAGE MACHINE ORGANIZATION CHAPTER 3 1 Sub-topics The topic will cover: Microprocessor architecture CPU processing methods Pipelining Superscalar RISC Multiprocessing Instruction Cycle Instruction
More informationCPU ARCHITECTURE. QUESTION 1 Explain how the width of the data bus and system clock speed affect the performance of a computer system.
CPU ARCHITECTURE QUESTION 1 Explain how the width of the data bus and system clock speed affect the performance of a computer system. ANSWER 1 Data Bus Width the width of the data bus determines the number
More informationBinary Adders: Half Adders and Full Adders
Binary Adders: Half Adders and Full Adders In this set of slides, we present the two basic types of adders: 1. Half adders, and 2. Full adders. Each type of adder functions to add two binary bits. In order
More informationChapter 4. MARIE: An Introduction to a Simple Computer 4.8 MARIE 4.8 MARIE A Discussion on Decoding
4.8 MARIE This is the MARIE architecture shown graphically. Chapter 4 MARIE: An Introduction to a Simple Computer 2 4.8 MARIE MARIE s Full Instruction Set A computer s control unit keeps things synchronized,
More informationUnderstand the factors involved in instruction set
A Closer Look at Instruction Set Architectures Objectives Understand the factors involved in instruction set architecture design. Look at different instruction formats, operand types, and memory access
More informationCREATED BY M BILAL & Arslan Ahmad Shaad Visit:
CREATED BY M BILAL & Arslan Ahmad Shaad Visit: www.techo786.wordpress.com Q1: Define microprocessor? Short Questions Chapter No 01 Fundamental Concepts Microprocessor is a program-controlled and semiconductor
More informationMARIE: An Introduction to a Simple Computer
MARIE: An Introduction to a Simple Computer 4.2 CPU Basics The computer s CPU fetches, decodes, and executes program instructions. The two principal parts of the CPU are the datapath and the control unit.
More informationCOMPUTER ARCHITECTURE AND ORGANIZATION Register Transfer and Micro-operations 1. Introduction A digital system is an interconnection of digital
Register Transfer and Micro-operations 1. Introduction A digital system is an interconnection of digital hardware modules that accomplish a specific information-processing task. Digital systems vary in
More informationThe MARIE Architecture
The MARIE Machine Architecture that is Really Intuitive and Easy. We now define the ISA (Instruction Set Architecture) of the MARIE. This forms the functional specifications for the CPU. Basic specifications
More informationAbout the Presentations
About the Presentations The presentations cover the objectives found in the opening of each chapter. All chapter objectives are listed in the beginning of each presentation. You may customize the presentations
More informationReal instruction set architectures. Part 2: a representative sample
Real instruction set architectures Part 2: a representative sample Some historical architectures VAX: Digital s line of midsize computers, dominant in academia in the 70s and 80s Characteristics: Variable-length
More informationSummer 2003 Lecture 18 07/09/03
Summer 2003 Lecture 18 07/09/03 NEW HOMEWORK Instruction Execution Times: The 8088 CPU is a synchronous machine that operates at a particular clock frequency. In the case of the original IBM PC, that clock
More informationChapter 4. MARIE: An Introduction to a Simple Computer. Chapter 4 Objectives. 4.1 Introduction. 4.2 CPU Basics
Chapter 4 Objectives Learn the components common to every modern computer system. Chapter 4 MARIE: An Introduction to a Simple Computer Be able to explain how each component contributes to program execution.
More information1. INTRODUCTION TO MICROPROCESSOR AND MICROCOMPUTER ARCHITECTURE:
1. INTRODUCTION TO MICROPROCESSOR AND MICROCOMPUTER ARCHITECTURE: A microprocessor is a programmable electronics chip that has computing and decision making capabilities similar to central processing unit
More informationCS Computer Architecture
CS 35101 Computer Architecture Section 600 Dr. Angela Guercio Fall 2010 Computer Systems Organization The CPU (Central Processing Unit) is the brain of the computer. Fetches instructions from main memory.
More informationChapter 7: Processor and Memory
Slide 1/27 Learning Objectives In this chapter you will learn about: Internal structure of processor Memory structure Determining the speed of a processor Different types of processors available Determining
More informationMARIE: An Introduction to a Simple Computer
MARIE: An Introduction to a Simple Computer Outline Learn the components common to every modern computer system. Be able to explain how each component contributes to program execution. Understand a simple
More informationChapter 9: A Closer Look at System Hardware
Chapter 9: A Closer Look at System Hardware CS10001 Computer Literacy Chapter 9: A Closer Look at System Hardware 1 Topics Discussed Digital Data and Switches Manual Electrical Digital Data Representation
More informationChapter 9: A Closer Look at System Hardware 4
Chapter 9: A Closer Look at System Hardware CS10001 Computer Literacy Topics Discussed Digital Data and Switches Manual Electrical Digital Data Representation Decimal to Binary (Numbers) Characters and
More informationDigital System Design Using Verilog. - Processing Unit Design
Digital System Design Using Verilog - Processing Unit Design 1.1 CPU BASICS A typical CPU has three major components: (1) Register set, (2) Arithmetic logic unit (ALU), and (3) Control unit (CU) The register
More informationProcessing Unit CS206T
Processing Unit CS206T Microprocessors The density of elements on processor chips continued to rise More and more elements were placed on each chip so that fewer and fewer chips were needed to construct
More informationOverview of Computer Organization. Chapter 1 S. Dandamudi
Overview of Computer Organization Chapter 1 S. Dandamudi Outline Introduction Basic Terminology and Notation Views of computer systems User s view Programmer s view Advantages of high-level languages Why
More informationEE 3170 Microcontroller Applications
EE 317 Microcontroller Applications Lecture 5 : Instruction Subset & Machine Language: Introduction to the Motorola 68HC11 - Miller 2.1 & 2.2 Based on slides for ECE317 by Profs. Davis, Kieckhafer, Tan,
More informationPin Description, Status & Control Signals of 8085 Microprocessor
Pin Description, Status & Control Signals of 8085 Microprocessor 1 Intel 8085 CPU Block Diagram 2 The 8085 Block Diagram Registers hold temporary data. Instruction register (IR) holds the currently executing
More informationOverview of Computer Organization. Outline
Overview of Computer Organization Chapter 1 S. Dandamudi Outline Introduction Basic Terminology and Notation Views of computer systems User s view Programmer s view Advantages of high-level languages Why
More informationSystems Architecture
Systems Architecture Friday, 27 April 2018 Systems Architecture Today s Objectives: 1. To be able to explain the purposes and uses of embedded systems. 2. To be able to describe how the CPU executes instructions
More informationComputer Systems. Binary Representation. Binary Representation. Logical Computation: Boolean Algebra
Binary Representation Computer Systems Information is represented as a sequence of binary digits: Bits What the actual bits represent depends on the context: Seminar 3 Numerical value (integer, floating
More informationEE 3170 Microcontroller Applications
EE 3170 Microcontroller Applications Lecture 4 : Processors, Computers, and Controllers - 1.2 (reading assignment), 1.3-1.5 Based on slides for ECE3170 by Profs. Kieckhafer, Davis, Tan, and Cischke Outline
More informationProblem Set 1 Solutions
CSE 260 Digital Computers: Organization and Logical Design Jon Turner Problem Set 1 Solutions 1. Give a brief definition of each of the following parts of a computer system: CPU, main memory, floating
More informationA+ Guide to Hardware: Managing, Maintaining, and Troubleshooting, 5e. Chapter 1 Introducing Hardware
: Managing, Maintaining, and Troubleshooting, 5e Chapter 1 Introducing Hardware Objectives Learn that a computer requires both hardware and software to work Learn about the many different hardware components
More informationTop-Level View of Computer Organization
Top-Level View of Computer Organization Bởi: Hoang Lan Nguyen Computer Component Contemporary computer designs are based on concepts developed by John von Neumann at the Institute for Advanced Studies
More informationHardware Level Organization
Hardware Level Organization Intro MIPS 1 Major components: - memory - central processing unit - registers - the fetch/execute cycle CPU PC IR Ex Unit MAR MBR I/O AR I/O BR System Bus Main Memory 0 (the
More informationEEM336 Microprocessors I. I/O Interface
EEM336 Microprocessors I I/O Interface Introduction Basic I/O interface Handshaking process Serial and Parallel communication I/O interface examples 2 Chapter Objectives Upon completion of this chapter,
More informationVon Neumann Architecture
Von Neumann Architecture Assist lecturer Donya A. Khalid Lecture 2 2/29/27 Computer Organization Introduction In 945, just after the World War, Jon Von Neumann proposed to build a more flexible computer.
More informationTechnology in Action
Technology in Action Chapter 9 Behind the Scenes: A Closer Look at System Hardware 1 Binary Language Computers work in binary language. Consists of two numbers: 0 and 1 Everything a computer does is broken
More informationMICROPROCESSOR AND MICROCONTROLLER BASED SYSTEMS
MICROPROCESSOR AND MICROCONTROLLER BASED SYSTEMS UNIT I INTRODUCTION TO 8085 8085 Microprocessor - Architecture and its operation, Concept of instruction execution and timing diagrams, fundamentals of
More informationChapter 4. Chapter 4 Objectives. MARIE: An Introduction to a Simple Computer
Chapter 4 MARIE: An Introduction to a Simple Computer Chapter 4 Objectives Learn the components common to every modern computer system. Be able to explain how each component contributes to program execution.
More informationThe X86 Assembly Language Instruction Nop Means
The X86 Assembly Language Instruction Nop Means As little as 1 CPU cycle is "wasted" to execute a NOP instruction (the exact and other "assembly tricks", as explained also in this thread on Programmers.
More information(Refer Slide Time: 1:40)
Computer Architecture Prof. Anshul Kumar Department of Computer Science and Engineering, Indian Institute of Technology, Delhi Lecture - 3 Instruction Set Architecture - 1 Today I will start discussion
More informationDC57 COMPUTER ORGANIZATION JUNE 2013
Q2 (a) How do various factors like Hardware design, Instruction set, Compiler related to the performance of a computer? The most important measure of a computer is how quickly it can execute programs.
More informationAssembly Language. Lecture 2 x86 Processor Architecture
Assembly Language Lecture 2 x86 Processor Architecture Ahmed Sallam Slides based on original lecture slides by Dr. Mahmoud Elgayyar Introduction to the course Outcomes of Lecture 1 Always check the course
More informationAssembly Language. Lecture 2 - x86 Processor Architecture. Ahmed Sallam
Assembly Language Lecture 2 - x86 Processor Architecture Ahmed Sallam Introduction to the course Outcomes of Lecture 1 Always check the course website Don t forget the deadline rule!! Motivations for studying
More informationMicrocontroller Systems
µcontroller systems 1 / 43 Microcontroller Systems Engineering Science 2nd year A2 Lectures Prof David Murray david.murray@eng.ox.ac.uk www.robots.ox.ac.uk/ dwm/courses/2co Michaelmas 2014 µcontroller
More informationMulticycle conclusion
Multicycle conclusion The last few lectures covered a lot of material! We introduced a multicycle datapath, where different instructions take different numbers of cycles to execute. A multicycle unit is
More informationChapter 3 - Top Level View of Computer Function
Chapter 3 - Top Level View of Computer Function Luis Tarrataca luis.tarrataca@gmail.com CEFET-RJ L. Tarrataca Chapter 3 - Top Level View 1 / 127 Table of Contents I 1 Introduction 2 Computer Components
More informationMachine Architecture. or what s in the box? Lectures 2 & 3. Prof Leslie Smith. ITNP23 - Autumn 2014 Lectures 2&3, Slide 1
Machine Architecture Prof Leslie Smith or what s in the box? Lectures 2 & 3 ITNP23 - Autumn 2014 Lectures 2&3, Slide 1 Basic Machine Architecture In these lectures we aim to: understand the basic architecture
More informationECE 571 Advanced Microprocessor-Based Design Lecture 3
ECE 571 Advanced Microprocessor-Based Design Lecture 3 Vince Weaver http://web.eece.maine.edu/~vweaver vincent.weaver@maine.edu 30 January 2018 Homework #1 was posted Announcements 1 Microprocessors Also
More informationSegment 1A. Introduction to Microcomputer and Microprocessor
Segment 1A Introduction to Microcomputer and Microprocessor 1.1 General Architecture of a Microcomputer System: The term microcomputer is generally synonymous with personal computer, or a computer that
More informationChapter 1 Microprocessor architecture ECE 3120 Dr. Mohamed Mahmoud http://iweb.tntech.edu/mmahmoud/ mmahmoud@tntech.edu Outline 1.1 Computer hardware organization 1.1.1 Number System 1.1.2 Computer hardware
More informationBasic Processing Unit: Some Fundamental Concepts, Execution of a. Complete Instruction, Multiple Bus Organization, Hard-wired Control,
UNIT - 7 Basic Processing Unit: Some Fundamental Concepts, Execution of a Complete Instruction, Multiple Bus Organization, Hard-wired Control, Microprogrammed Control Page 178 UNIT - 7 BASIC PROCESSING
More informationInterconnection Structures. Patrick Happ Raul Queiroz Feitosa
Interconnection Structures Patrick Happ Raul Queiroz Feitosa Objective To present key issues that affect interconnection design. Interconnection Structures 2 Outline Introduction Computer Busses Bus Types
More informationLecture 5: Computer Organization Instruction Execution. Computer Organization Block Diagram. Components. General Purpose Registers.
Lecture 5: Computer Organization Instruction Execution Computer Organization Addressing Buses Fetch-Execute Cycle Computer Organization CPU Control Unit U Input Output Memory Components Control Unit fetches
More informationCOMPUTER ORGANIZATION & ARCHITECTURE
COMPUTER ORGANIZATION & ARCHITECTURE Instructions Sets Architecture Lesson 5a 1 What are Instruction Sets The complete collection of instructions that are understood by a CPU Can be considered as a functional
More informationChapter 1: Introduction to the Microprocessor and Computer 1 1 A HISTORICAL BACKGROUND
Chapter 1: Introduction to the Microprocessor and Computer 1 1 A HISTORICAL BACKGROUND The Microprocessor Called the CPU (central processing unit). The controlling element in a computer system. Controls
More informationCHAPTER 5 : Introduction to Intel 8085 Microprocessor Hardware BENG 2223 MICROPROCESSOR TECHNOLOGY
CHAPTER 5 : Introduction to Intel 8085 Hardware BENG 2223 MICROPROCESSOR TECHNOLOGY The 8085A(commonly known as the 8085) : Was first introduced in March 1976 is an 8-bit microprocessor with 16-bit address
More informationChapter 10 Overview of Busses
Chapter 10 Overview of Busses This chapter contains some important material that is often overlooked in textbooks; indeed, it has been overlooked in every previous edition of this textbook. Computer busses
More information2 MARKS Q&A 1 KNREDDY UNIT-I
2 MARKS Q&A 1 KNREDDY UNIT-I 1. What is bus; list the different types of buses with its function. A group of lines that serves as a connecting path for several devices is called a bus; TYPES: ADDRESS BUS,
More informationPractical Malware Analysis
Practical Malware Analysis Ch 4: A Crash Course in x86 Disassembly Revised 1-16-7 Basic Techniques Basic static analysis Looks at malware from the outside Basic dynamic analysis Only shows you how the
More informationWhy Study Assembly Language?
Why Study Assembly Language? This depends on the decade in which you studied assembly language. 1940 s You cannot study assembly language. It does not exist yet. 1950 s You study assembly language because,
More informationCOSC 243. Computer Architecture 1. COSC 243 (Computer Architecture) Lecture 6 - Computer Architecture 1 1
COSC 243 Computer Architecture 1 COSC 243 (Computer Architecture) Lecture 6 - Computer Architecture 1 1 Overview Last Lecture Flip flops This Lecture Computers Next Lecture Instruction sets and addressing
More informationChapter 5. A Closer Look at Instruction Set Architectures
Chapter 5 A Closer Look at Instruction Set Architectures Chapter 5 Objectives Understand the factors involved in instruction set architecture design. Gain familiarity with memory addressing modes. Understand
More informationCC312: Computer Organization
CC312: Computer Organization Dr. Ahmed Abou EL-Farag Dr. Marwa El-Shenawy 1 Chapter 4 MARIE: An Introduction to a Simple Computer Chapter 4 Objectives Learn the components common to every modern computer
More informationCS311 Lecture: CPU Implementation: The Register Transfer Level, the Register Set, Data Paths, and the ALU
CS311 Lecture: CPU Implementation: The Register Transfer Level, the Register Set, Data Paths, and the ALU Last revised October 15, 2007 Objectives: 1. To show how a CPU is constructed out of a regiser
More informationWrite A General Form Of The Assembly
Write A General Form Of The Assembly Instruction Of 8085 Official Full-Text Publication: An Introduction to Microprocessor 8085 on ResearchGate, the professional network for scientists. Therefore, it is
More informationThese three counters can be programmed for either binary or BCD count.
S5 KTU 1 PROGRAMMABLE TIMER 8254/8253 The Intel 8253 and 8254 are Programmable Interval Timers (PTIs) designed for microprocessors to perform timing and counting functions using three 16-bit registers.
More informationComputer Architecture 2/26/01 Lecture #
Computer Architecture 2/26/01 Lecture #9 16.070 On a previous lecture, we discussed the software development process and in particular, the development of a software architecture Recall the output of the
More informationCOMP 273 Winter asynchronous I/O April 5, 2012
All the I/O examples we have discussed use the system bus to send data between the CPU, main memory, and I/O controllers. The system bus runs at a slower clock speed than the CPU because of greater distances
More information3.1 Description of Microprocessor. 3.2 History of Microprocessor
3.0 MAIN CONTENT 3.1 Description of Microprocessor The brain or engine of the PC is the processor (sometimes called microprocessor), or central processing unit (CPU). The CPU performs the system s calculating
More informationAnalog, Digital Signals; Computer Structure
Analog, Digital Signals; Computer Structure David M. Auslander Mechanical Engineering University of California at Berkeley Copyright 2007, D.M.Auslander Signal Impedance Relationship of current and voltage
More informationOverview. Memory Classification Read-Only Memory (ROM) Random Access Memory (RAM) Functional Behavior of RAM. Implementing Static RAM
Memories Overview Memory Classification Read-Only Memory (ROM) Types of ROM PROM, EPROM, E 2 PROM Flash ROMs (Compact Flash, Secure Digital, Memory Stick) Random Access Memory (RAM) Types of RAM Static
More informationMajor and Minor States
Major and Minor States We now consider the micro operations and control signals associated with the execution of each instruction in the ISA. The execution of each instruction is divided into three phases.
More informationECE232: Hardware Organization and Design
ECE232: Hardware Organization and Design Lecture 4: MIPS Instructions Adapted from Computer Organization and Design, Patterson & Hennessy, UCB From Last Time Two values enter from the left (A and B) Need
More informationCHAPTER SIX BASIC COMPUTER ORGANIZATION AND DESIGN
CHAPTER SIX BASIC COMPUTER ORGANIZATION AND DESIGN 6.1. Instruction Codes The organization of a digital computer defined by: 1. The set of registers it contains and their function. 2. The set of instructions
More information1. Internal Architecture of 8085 Microprocessor
1. Internal Architecture of 8085 Microprocessor Control Unit Generates signals within up to carry out the instruction, which has been decoded. In reality causes certain connections between blocks of the
More informationElectricity: Voltage. Gate: A signal enters the gate at a certain voltage. The gate performs operations on it, and sends it out was a new signal.
Hardware CSCE 101 Electricity: Voltage Gate: A signal enters the gate at a certain voltage. The gate performs operations on it, and sends it out was a new signal. The signals voltage will either be between
More informationAgenda EE 224: INTRODUCTION TO DIGITAL CIRCUITS & COMPUTER DESIGN. Lecture 1: Introduction. Go over the syllabus 3/31/2010
// EE : INTRODUCTION TO DIGITAL CIRCUITS & COMPUTER DESIGN Lecture : Introduction /9/ Avinash Kodi, kodi@ohio.edu Agenda Go over the syllabus Introduction ti to Digital it Systems // Why Digital Systems?
More informationMicrocomputers. Outline. Number Systems and Digital Logic Review
Microcomputers Number Systems and Digital Logic Review Lecture 1-1 Outline Number systems and formats Common number systems Base Conversion Integer representation Signed integer representation Binary coded
More informationSlide Set 1 (corrected)
Slide Set 1 (corrected) for ENCM 369 Winter 2018 Section 01 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary January 2018 ENCM 369 Winter 2018
More informationSummary of Computer Architecture
Summary of Computer Architecture Summary CHAP 1: INTRODUCTION Structure Top Level Peripherals Computer Central Processing Unit Main Memory Computer Systems Interconnection Communication lines Input Output
More informationChapter 5. A Closer Look at Instruction Set Architectures. Chapter 5 Objectives. 5.1 Introduction. 5.2 Instruction Formats
Chapter 5 Objectives Understand the factors involved in instruction set architecture design. Chapter 5 A Closer Look at Instruction Set Architectures Gain familiarity with memory addressing modes. Understand
More informationPESIT Bangalore South Campus
INTERNAL ASSESSMENT TEST 2 Date : 28/03/2016 Max Marks: 50 Subject & Code : Microprocessor (10CS45) Section: IV A and B Name of faculty: Deepti.C Time: 8:30-10:00 am Note: Answer any complete five questions
More informationSo computers can't think in the same way that people do. But what they do, they do excellently well and very, very fast.
Input What is Processing? Processing Output Processing is the thinking that the computer does - the calculations, comparisons, and decisions. Storage People also process data. What you see and hear and
More informationContents Slide Set 9. Final Notes on Textbook Chapter 7. Outline of Slide Set 9. More about skipped sections in Chapter 7. Outline of Slide Set 9
slide 2/41 Contents Slide Set 9 for ENCM 369 Winter 2014 Lecture Section 01 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Winter Term, 2014
More informationName: CMSC 313 Fall 2001 Computer Organization & Assembly Language Programming Exam 1. Question Points I. /34 II. /30 III.
CMSC 313 Fall 2001 Computer Organization & Assembly Language Programming Exam 1 Name: Question Points I. /34 II. /30 III. /36 TOTAL: /100 Instructions: 1. This is a closed-book, closed-notes exam. 2. You
More informationCHAPTER 4 MARIE: An Introduction to a Simple Computer
CHAPTER 4 MARIE: An Introduction to a Simple Computer 4.1 Introduction 177 4.2 CPU Basics and Organization 177 4.2.1 The Registers 178 4.2.2 The ALU 179 4.2.3 The Control Unit 179 4.3 The Bus 179 4.4 Clocks
More informationENCM 369 Winter 2019 Lab 6 for the Week of February 25
page of ENCM 369 Winter 29 Lab 6 for the Week of February 25 Steve Norman Department of Electrical & Computer Engineering University of Calgary February 29 Lab instructions and other documents for ENCM
More informationA3 Computer Architecture
A3 Computer Architecture Engineering Science 3rd year A3 Lectures Prof David Murray david.murray@eng.ox.ac.uk www.robots.ox.ac.uk/ dwm/courses/3co Michaelmas 2000 1 / 1 2: Introduction to the CPU 3A3 Michaelmas
More informationMICROPROCESSOR MICROPROCESSOR. From the above description, we can draw the following block diagram to represent a microprocessor based system: Output
8085 SATISH CHANDRA What is a Microprocessor? The word comes from the combination micro and processor. Processor means a device that processes whatever. In this context, processor means a device that processes
More informationCS 31: Intro to Systems Digital Logic. Kevin Webb Swarthmore College February 2, 2016
CS 31: Intro to Systems Digital Logic Kevin Webb Swarthmore College February 2, 2016 Reading Quiz Today Hardware basics Machine memory models Digital signals Logic gates Circuits: Borrow some paper if
More informationCPE/EE 421/521 Fall 2004 Chapter 4 The CPU Hardware Model. Dr. Rhonda Kay Gaede UAH. The CPU Hardware Model - Overview
CPE/EE 421/521 Fall 2004 Chapter 4 The 68000 CPU Hardware Model Dr. Rhonda Kay Gaede UAH Fall 2004 1 The 68000 CPU Hardware Model - Overview 68000 interface Timing diagram Minimal configuration using the
More informationFigure 1 Logical view of the system memory.
Memory Addressing The memory of a computer system consists of tiny electronic switches, with each switch in one of two states: open or closed. It is, however, more convenient to think of these states as
More information