5/11/2012 CMSIS-RTOS. Niall Cooling Feabhas Limited CMSIS. Cortex Microcontroller Software Interface Standard.
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1 Niall Cooling Feabhas Limited Cortex Microcontroller Software Interface Standard CMSIS 2 1
2 ARM Cortex Family A Series Application MMU Linux, Android, Windows R Series Real-Time MPU M Series Microcontroller Optional-MPU CMSIS 3 DSP / FPU Single cycle 16,32-bit MAC Single cycle dual 16-bit MAC 8,16-bit SIMD arithmetic Hardware Divide (2-12 Cycles) Traditional ARM-7 User RTOS/Middleware C/C++ / JTAG Silicon vendors M4 M3 ARMv7 M0 M0+ M1 ARMv6 FPGA 8-bit PIC 8051 AVR 4 2
3 CMSIS Versions v1 Core 5 CMSIS v1.x Cortex -M3 & Cortex -M0 Core Peripheral Access Layer Cortex-M Core Register Access Cortex-M Instruction Access NVIC Access Functions SysTick Configuration Function Instrumented Trace Macrocell (ITM) Cortex -M3 ITM Debug Access ITM_SendChar Cortex -M3 additional Debug Access ITM_ReceiveChar 6 3
4 CMSIS Versions v2 DSP v1 Core 7 Cortex -M4 DSP Software Library Basic math functions Fast math functions Complex math functions Filters Matrix functions Transforms Motor control functions Statistical functions Support functions Interpolation functions CMSIS v2.x 8 4
5 CMSIS Versions v3 RTOS v2 DSP v1 Core 9 CMSIS 3.x V3.0 Announced at Embedded World 2012 Feb 2012 Latest Version 3.01 May 2012 Standardized API for Real-Time Operating System (RTOS) kernels RTX with API under Open Source License Support for System View Description (SVD) XML files 10 5
6 quasi-concurrent programming Configuration Comms MMI Data Acquisition Alarm Mgmt Control Real-Time Operating System Cortex -M 11 RTOS Onion Real-Time Operating System (RTOS) 300Kb - 2Mb Real-Time Executive (RTX) ~ 4Kb - 30Kb Real-Time Kernel (RTK) < 1Kb - 5Kb 12 6
7 Real-Time Operating System Kernel (RTK) Scheduling Mutual exclusion Executive (RTE) Inter-task communication & synchronisation Memory management RTOS File management System FAT file system Networking E.g. TCP/IP, CAN Graphical User Interface support E.g. OpenGL, Embedded Qt 13 Create a task/thread // Keil RTX Example OS_TID t_blinky; // Declare a task ID for blink RTOS APIs task void blinky(void) { while(1) /* FreeRTOS { Example */ void LPC_GPIO2->MASKED_ACCESS[1] vtaskcode( void* pvparameters = ~LPC_GPIO2->MASKED_ACCESS[1]; ) { // Toggle bit 0 os_dly_wait for( /* ;; Segger ) {(50); embos // Example delay 50 */ clock ticks } LPC_GPIO2->MASKED_ACCESS[1] OS_STACKPTR int StackHP[128]; = ~LPC_GPIO2->MASKED_ACCESS[1]; /* Task stacks */ } vtaskdelay(50); OS_TASK TCBHP; // delay /* Task-control-blocks */ } /********************************************************************/ task } void static init (void) TaskEx(void* { pdata) { t_blinky = while os_tsk_create (1) { (blinky, 1); // Create a task "blinky" with priority 1 os_tsk_delete_self /* Function LPC_GPIO2->MASKED_ACCESS[1] that creates (); a task. */ = ~LPC_GPIO2->MASKED_ACCESS[1]; } void votherfunction( OS_Delay ((OS_TIME) void ) { pdata); static } unsigned char ucparametertopass; xtaskhandle } xhandle; xtaskcreate( vtaskcode, "NAME", STACK_SIZE, &ucparametertopass, tskidle_priority, &xhandle ); vtaskdelete( int main(void) xhandle { ); } OS_IncDI(); /* Initially disable interrupts */ OS_InitKern(); /* initialize OS */ OS_InitHW(); /* initialize Hardware for OS */ OS_CREATETASK_EX(&TCBHP, "HP Task", TaskEx, 100, StackHP, (void*) 50); OS_Start(); /* Start multitasking */ return 0; } 14 7
8 CMSIS v3 Architecture Application CMSIS-DSP RTOS CMSIS-Core Cortex -M Hardware 15 API #include "cmsis_os.h" osthreadid thread1_id; // CMSIS RTOS header file void job1 (void const *argument) { // thread function 'job1' while (1) { : // execute some code osdelay (10); // delay execution for 10ms } } // define job1 as thread function osthreaddef(job1, ospriorityabovenormal, 1, 0); int main (void) { thread1_id = osthreadcreate(osthread(job1), NULL); } 16 8
9 5/11/2012 Features thread management mutual exclusion inter-thread communication & synchronization dynamic memory management 17 Thread Management define & create thread management priority control mutual exclusion delay / yield inter-thread communication & synchronization memory management 18 9
10 5/11/2012 Mutual Exclusion thread management semaphore mutual exclusion inter-thread communication & synchronization mutex dynamic memory management 19 Documented API 20 10
11 5/11/2012 Inter-Thread Comm & Sync thread management Signals mutual exclusion inter-thread communication & synchronization dynamic memory management Message Queues Mail Queue (mailbox) ISR comms 21 Memory Management thread management mutual exclusion inter-thread communication & synchronization dynamic memory management memory pools create alloc (malloc) calloc free 22 11
12 v3 Example Application CMSIS-DSP Keil RTX CMSIS-Core Cortex -M Hardware The RTX implementation has a small memory footprint and uses only 7KB ROM and 320 bytes RAM when compiled with the ARM C/C++ Compiler 23 CMSIS v3 Architecture Application RTK FreeRTOS embos 24 12
13 cmsis_os.h osthreadid osthreadcreate (osthreaddef_t *thread_def, void *argument); /// Thread Definition structure contains startup information of a thread. /// \note CAN BE CHANGED: \b os_thread_def is implementation specific in every. typedef const struct os_thread_def { os_pthread pthread; ///< start address of thread function ospriority tpriority; ///< initial thread priority uint32_t instances; ///< maximum number of instances of that thread uint32_t stacksize; ///< stack size requirements in bytes } osthreaddef_t; /// Entry point of a thread. /// \note MUST REMAIN UNCHANGED: \b os_pthread shall be consistent in every. typedef void (*os_pthread) (void const *argument); /// Priority used for thread control. /// \note MUST REMAIN UNCHANGED: \b ospriority shall be consistent in every. typedef enum { ospriorityidle = -3, ///< priority: idle (lowest) osprioritylow = -2, ///< priority: low osprioritybelownormal = -1, ///< priority: below normal osprioritynormal = 0, ///< priority: normal (default) ospriorityabovenormal = +1, ///< priority: above normal ospriorityhigh = +2, ///< priority: high ospriorityrealtime = +3, ///< priority: realtime (highest) ospriorityerror = 0x84, ///< system cannot determine priority or thread has } ospriority; 25 API macro expansion #include "cmsis_os.h" void job1 (void const *argument) { } // CMSIS RTOS header file // thread function 'job1' osthreaddef(job1, ospriorityabovenormal, 1, 0); int main (void) { thread1_id = osthreadcreate(osthread(job1), NULL); } // cmsis_os.h #define osthreaddef(name, priority, instances, stacksz) \ osthreaddef_t os_thread_def_##name = \ { (name), (priority), (instances), (stacksz) }; #define osthread(name) \ &os_thread_def_##name // define job1 as thread function osthreaddef_t os_thread_def_job1 = \ { (job1), (ospriorityabovenormal), (1), (0) }; int main (void) { thread1_id = osthreadcreate(os_thread_def_job1, NULL); } 26 13
14 CMSIS v3 Adaption osthreaddef Object definition via macros cmsis_os.h Application FreeRTOS osthreadcreate Function call translation cmsis_os.c xtaskcreate 27 cmsis_os.c (FreeRTOS) FiFi-SDR Project 221 typedef const struct os_thread_def { 222 char * name; 223 os_pthread pthread; 224 ospriority tpriority; 225 uint32_t instances; 226 uint32_t stacksize; 83 /// Create a thread and add it to Active Threads and set it to state READY. 227 } osthreaddef_t; 84 /// \param[in] thread_def thread definition referenced with \ref osthread. 85 /// \param[in] argument pointer that is passed to the thread function as start argument. 86 /// \return thread ID for reference by other functions or NULL in case of error. 87 /// \note MUST REMAIN UNCHANGED: \b osthreadcreate shall be consistent in every. 88 osthreadid osthreadcreate (osthreaddef_t *thread_def, void *argument) 89 { 90 (void) argument; 91 xtaskhandle handle; 92 uint32_t stacksize; stacksize = thread_def->stacksize? thread_def->stacksize / 4 : configminimal_stack_size; 96 xtaskcreate((pdtask_code)thread_def->pthread, 97 (const signed portchar *)thread_def->name, 98 stacksize, 99 NULL, 100 makefreertospriority(thread_def->tpriority), 101 &handle); return handle; 104 } 28 14
15 Some Reaction Who wins when Cortex-M adds RTOS? Richard Barry of FreeRTOS.org EE Times 6/3/12 ChibiOS/RT free embedded RTOS forum.chibios.org 29 Summary Opens up lots of possibilities Training classes Easier library support Network (e.g. lwip) File system Some have expressed concerns lowest common denominator Adaption layer overhead As always, time will tell community support mbed 30 15
16 Thank You Niall Cooling Feabhas Limited 5 Lowesden Works Lambourn Woodlands Hungerford Berks. RG17 7RY UK blog.feabhas.com uk.linkedin.com/in/nscooling 31 ARM Software Courses ARM Software Courses available from Feabhas: ARM Cortex-A5 MPCore Software Development ARM Cortex-A5 Software Development ARM Cortex-A8 Software Development ARM Cortex-A9 MPCore Software Development ARM Cortex-A9 Software Development ARM Cortex-M0 Software Design ARM Cortex-M3/M4 Software Design ARM Cortex-R4 Software Development ARM Embedded Software Optimization ARM1136/76 Software Development ARM7/9 Software Development 32 16
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