Enhancing the CNOP Instruction

Transcription

1 Enhancing the CNOP Instruction The CNOP instruction and how it has been enhanced by APAR PI17455 Author: Jeremy Stone Page 1 Copyright IBM (UK) Ltd 2014

2 Introduction With the introduction of APAR PI17455, HLASM has enhanced the CNOP assembler instruction. This technote explains how CNOP works before and after the apply of APAR PI17455, detailing the enhancements provided by the APAR. Review of the CNOP instruction prior to APAR PI17455 As the High Level Assembler Language Reference explains, The CNOP instruction aligns any instruction or other data on a specific halfword boundary. This ensures an unbroken flow of executable instructions, since the CNOP instruction generates nooperation instructions to fill the bytes skipped to achieve specified alignment. Looking at the HLASM Language References, they syntax of the CNOP instruction is: >> CNOP byte,boundary >< +--symbol--+ byte Is an absolute expression that specifies at which even-numbered byte in a fullword, doubleword, or quadword the location counter is set. The value of the expression must be 0 to boundary-2. boundary Is an absolute expression that specifies the byte specified by boundary is in a fullword, doubleword, or quadword. A value of 4 indicates the byte is in a fullword, a value of 8 indicates the byte is in a doubleword, and a value of 16 indicates the byte is in a quadword. To achieve alignment on a specific halfword boundary we can specify how many bytes that halfword is offset from either a fullword, doubleword or quadword address. Where the CNOP instruction already has the desired alignment, then it will generate no code leaving the subsequent instruction with the same alignment. If the CNOP instruction does not fall on a halfword, perhaps because it follows a DC or DS instruction, then normal HLASM processing will first halfword align it before performing any processing. Page 2 Copyright IBM (UK) Ltd 2014

3 Aligning on a fullword, doubleword or quadword boundary Starting with the simpler example where the value of byte is 0, the CNOP instruction will set the location counter so that the next instruction is aligned according to the value of boundary. Depending on whether the boundary value is 4, 8 or 16, the next instruction's location counter would be aligned on a fullword (4), doubleword (8) or quadword (16) location. The following table demonstrates how fullword, doubleword and quadword alignment is achieved and how this affects the location counter of the next instruction: Instruction Current location counter New location counter Comment CNOP 0,4 x'32' x'34' x'34' is the first free fullword boundary CNOP 0,8 x'1032' x'1038' x'1038' is the first free doubleword boundary CNOP 0,16 x'2032' x'2040' x'2040' is the first free quadword boundary The assembler listing containing the above can be seen in Table A at the end of this section. Looking at the following extract from the assembly listing we see: Loc Object Code Addr1 Addr2 Stmt Source Statement C1C1 18 DC C'AA' Plus another 2 bytes CNOP 0,8 Align on a doubleword C2C2 20 DC C'BB' Demonstrate where we are The CNOP instruction is initially aligned at location x'1032', but the value of boundary is 8 and the value of byte is 0, indicating that we require alignment on a doubleword boundary. Since 1032 is not on a doubleword boundary, CNOP generates sufficient nooperation instructions in order that the following instruction becomes on a doubleword boundary. The CNOP generated no-operation instructions are explained in detail below. Page 3 Copyright IBM (UK) Ltd 2014

4 Aligning at an offset from a fullword, doubleword or quadword boundary Where the value of the byte operand is not 0, then the next instruction will be offset from the specified boundary by byte bytes. In a similar example to the above, the following table demonstrates how a halfword offset from a fullword, doubleword and quadword alignment is achieved and how this affects the location counter for the next instruction: Instruction Current location counter New location counter Comment CNOP 2,4 x'32' x'32' Aligned on fullword at x'30' +2 (No change) CNOP 6,8 x'1032' x'1036' Aligned on doubleword at x'1030' +6 CNOP 12,16 x'2032' x'203c' Aligned on quadword at x'2030' +12 The assembler listing containing the above can be seen in Table B at the end of this section. Looking at the following extract from the assembly we have: C1C1 19 DC C'AA' Plus another 2 bytes CNOP 6,8 Align on a doubleword C2C2 21 DC C'BB' Demonstrate where we are The CNOP instruction aligns the next instruction on the first free byte which is 6 bytes after the doubleword at x'1030' even though this doubleword boundary itself is prior to the CNOP instruction. Looking at the following extract we can see: C1C1 11 DC C'AA' Plus another 2 bytes CNOP 2,4 Align on a fullword C2C2 13 DC C'BB' Demonstrate where we are This time the CNOP instruction would not alter the alignment because the current location x'32' is already offset 2 from location x'30' which is fullword aligned. The above examples aligned us at a location offset within byte bytes from the CNOP instruction, but it will be noted that using the CNOP instruction with a non-zero byte value may align us beyond the next fullword, doubleword or quadword. Page 4 Copyright IBM (UK) Ltd 2014

5 Using another example, the following table demonstrates how the alignment may fall after the next fullword, doubleword or quadword. Instruction Current location counter New location counter Comment CNOP 2,4 x'38' x'3a' Fullword at x'38' +2 CNOP 6,16 x'1038' x'1046' Quadword at x'1040' +6 (x'1036' is not free) CNOP 10,16 x'2038' x'203a' Quadword at x'2030'+10 The assembler listing containing the above can be seen in Table C at the end of this section. Looking at the following extract from the assembly we can see: F1F2F3F4F5F6F7F8 21 DC C' ' Plus another 8 bytes CNOP 6,16 Align on a quadword E C2C2 23 DC C'BB' Demonstrate where we are This demonstrates that coding CNOP 6,16 from offset x'1038' requires us to go 6 bytes past the next quadword boundary to get to a free offset of 6 from a quadword boundary. The offset of 6 from the previous quadword boundary at x'1030' would place us at x'1036' which is before the CNOP instruction and is therefore not free. Coding CNOP 10,16 from offset x'3a' only requires us to skip 2 bytes to get to the next 10 byte offset past the doubleword boundary at x'30'. Page 5 Copyright IBM (UK) Ltd 2014

6 CNOP Generated no-operation instructions Let's now look at the no-operation instructions which CNOP may generate to fill any bytes skipped in order to achieve the required alignment. It is essential for HLASM to do this because if we were to just skip some bytes, the contents of these skipped bytes would be unpredictable. The no-operation instructions generated vary depending on how many bytes need to be filled as shown in the table below. They are all equivalent to a no-operation instruction. Bytes to fill Instructions generated Equivalent mnemonics 2 x'0700' BCR 0,0 4 x' ' BC 0,700(0,0) 6 x' ' BCR 0,0 BC 0,700(0,0) 8 14 Above + x' ' The intention of generating different instructions according to how many bytes need to be filled is to fill the gap with the fewest number of executable instructions. The assembler listing demonstrating the above equivalence of the BCR and BC mnemonics with the instructions generated can be seen in Table D at the end of this section. Page 6 Copyright IBM (UK) Ltd 2014

7 Output from sample assemblies demonstrating use of CNOP The following output now demonstrate the examples used above. The following extracts are strictly for the purposes of demonstrating the action of the CNOP instruction and do not serve any other useful purpose. Table A 2 * Code to demonstrate CNOP processing to align on 3 * a fullword, doubleword and a quadword. 4 * CNOPTST1 CSECT 6 CNOPTST1 AMODE ANY R:C USING *,12 8 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 9 DC 3C' ABCDEF' Fill with x'30' bytes C1C1 10 DC C'AA' Plus another 2 bytes CNOP 0,4 Align on a fullword C2C2 12 DC C'BB' Demonstrate where we are A 13 CNOPTST2 CSECT 14 CNOPTST2 AMODE ANY R:C USING *,12 16 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 17 DC 3C' ABCDEF' Fill with x'30' bytes C1C1 18 DC C'AA' Plus another 2 bytes CNOP 0,8 Align on a doubleword C2C2 20 DC C'BB' Demonstrate where we are CNOPTST3 CSECT 22 CNOPTST3 AMODE ANY R:C USING *,12 24 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 25 DC 3C' ABCDEF' Fill with x'30' bytes C1C1 26 DC C'AA' Plus another 2 bytes CNOP 0,16 Align on a quadword C2C2 28 DC C'BB' Demonstrate where we are LTORG 30 END Page 7 Copyright IBM (UK) Ltd 2014

8 Table B 2 * Code to demonstrate CNOP processing to 3 * align on various offsets from a 4 * fullword, doubleword and a quadword. 5 * CNOPTST4 CSECT 7 CNOPTST4 AMODE ANY R:C USING *,12 9 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 10 DC 3C' ABCDEF' Fill with x'30' bytes C1C1 11 DC C'AA' Plus another 2 bytes CNOP 2,4 Align on a fullword C2C2 13 DC C'BB' Demonstrate where we are CNOPTST5 CSECT 15 CNOPTST5 AMODE ANY R:C USING *,12 17 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 18 DC 3C' ABCDEF' Fill with x'30' bytes C1C1 19 DC C'AA' Plus another 2 bytes CNOP 6,8 Align on a doubleword C2C2 21 DC C'BB' Demonstrate where we are CNOPTST6 CSECT 23 CNOPTST6 AMODE ANY R:C USING *,12 25 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 26 DC 3C' ABCDEF' Fill with x'30' bytes C1C1 27 DC C'AA' Plus another 2 bytes CNOP 12,16 Align on a quadword C C2C2 29 DC C'BB' Demonstrate where we are LTORG 31 END Table C 2 * Code to demonstrate CNOP processing to align on various 3 * offsets from a fullword, doubleword and a quadword. 4 * 5 * Note that the offset may exist after the next 6 * boundary alignment. 7 * C 8 CNOPTST7 CSECT 9 CNOPTST7 AMODE ANY R:C USING *,12 1 Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 12 DC 3C' ABCDEF' Fill with x'30' bytes F1F2F3F4F5F6F7F8 13 DC C' ' Plus another 8 bytes CNOP 2,4 Align on a fullword A C2C2 15 DC C'BB' Demonstrate where we are CNOPTST8 CSECT 17 CNOPTST8 AMODE ANY R:C USING *,12 19 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 20 DC 3C' ABCDEF' Fill with x'30' bytes F1F2F3F4F5F6F7F8 21 DC C' ' Plus another 8 bytes CNOP 6,16 Align on a quadword E C2C2 23 DC C'BB' Demonstrate where we are CNOPTST9 CSECT 25 CNOPTST9 AMODE ANY R:C USING *,12 27 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 28 DC 3C' ABCDEF' Fill with x'30' bytes F1F2F3F4F5F6F7F8 29 DC C' ' Plus another 8 bytes CNOP 10,16 Align on a fullword A C2C2 31 DC C'BB' Demonstrate where we are LTORG 33 END Page 8 Copyright IBM (UK) Ltd 2014

9 Table D 2 * Code to demonstrate that op-codes generated by CNOP are 3 * equivalent to Branch Conditional mnemonics with a mask 4 * of 0 to cause the branch to never be taken, this being 5 * equivalent to a no-operation instruction. 6 * CNOPTSTA CSECT 8 CNOPTSTA AMODE ANY R:C USING *,12 10 * Demonstrate the mnemonics used BCR 0, BC 0,x'700'(0,0) 13 END Page 9 Copyright IBM (UK) Ltd 2014

10 CNOP Enhancements Now that we understand how the CNOP instruction operates we can look at the enhancements made to CNOP processing by APAR PI It should be noted that references to enhanced CNOP are only used to distinguish between CNOP processing prior to APAR PI17455 and post PI Enhanced CNOP is in no sense a new instruction. The the instruction format remains unchanged as: >> CNOP byte,boundary >< +--symbol--+ The primary reason for the enhancements was a requirement for HLASM to support larger boundary values than 16. The value accepted by the boundary operand must remain as a power of 2 but has been increased to allow a maximum value equal to that of SECTALGN. Where SECTALGN has its maximum permissible value of 4096, the value of boundary can therefore now be one of 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, We still need to be able to align to any halfword within the new boundary value so valid values for the byte operand are still from 0 up to 2 less than the new limit for the boundary value, i.e. a value of 4094 is the maximum permitted for byte when boundary is set to its maximum permitted value of We still need to fill any gap between the last instruction before the CNOP and the first instruction after the CNOP with no-operation instructions. Because this could now entail filling up to 4094 bytes, there have also been some enhancements to the instructions generated for this. The enhanced CNOP instruction now exploits relative branch instructions. To demonstrate how any gap is filled with instructions, the key points are each described below. The assembler listing extracts from example programs which demonstrate each of the logic points has also been included below. As we have already seen, it was previously the case that any gap caused by CNOP alignment would be filled by multiple instances of 2 byte BCR and / or 4 byte BC instruction. This is no longer necessarily the case. Prior to APAR PI17455, the maximum value for the byte operand was 14, so this would also be the maximum number of bytes which CNOP could generate to modify alignment. Therefore where 16 or more bytes are to be filled or the boundary value is 16 or greater, there can be no compatibility concerns. This will explain the references to 16 in many of the following logic points. Where the value of boundary is 16 or less, these bytes will be filled with exactly the same instructions as before APAR PI17455, so as to ensure code generated after the APAR is identical to code generated before. See Table E-New for the assembler listing generated with PI17455 and Table E-Old for the assembler listing generated prior to Page 10 Copyright IBM (UK) Ltd 2014

11 PI Where the value of boundary is greater than 16 it will be ensured that no instruction crosses a boundary. This can be seen in the following extract from table F F0F1F2F3F4F5F6F7 13 DC C' ABCD' Fill with x'e' bytes F8F9C1C2C3C E CNOP 18,32 Skip to offset A C2C2 15 DC C'BB' Demonstrate where we are Here, the CNOP instruction is 2 bytes before a boundary and 20 bytes are required to fill the gap. This could have been done by repeating the 4 byte no-operation instruction x' ' five times. However to avoid crossing the 32 bytes boundary specified in the CNOP instruction at x'20' with a 4 byte instruction, the 4 byte instruction is now changed to two 2 byte no-operation instruction of x'0700'. The first of these takes us up to the x'20' 32 byte boundary and the second of these follows it. Where the value of boundary is 16 or greater and the OPTABLE value specified is not one of DOS, 370 or XA, we can take advantage of what are in effect 6 byte nooperation instructions. Naturally, if the OPTABLE is one of DOS, 370 or XA then we have to restrict generated instructions to the supported 2 and 4 byte no-operation instructions available on these platforms. The 6 byte no-operation instruction is: x'c ' which is equivalent to a BRCL 0,offset instruction which with the mask of 0 will never branch, so is a no-operation instruction. By using 6 byte no-operation instructions in preference to 2 or 4 byte no-operation instructions we can reduce the number of instructions to be executed, and also reduce the amount of output produced by disassemblers. The fact that the BRCL instruction is not available with DOS, 370 or XA explains why it becomes vital what when CNOP is being used and may require 16 or more bytes of instruction to be generated, that an appropriate HLASM assembler option OPTABLE value is specified so as to prevent instructions being generated which may not be valid for the box on which the code is going to run. This can be seen in the following extract from Table G: F0F1F2F3F4F5F6F7 12 DC 2C' ABCDEF' Fill with x'20' bytes F8F9C1C2C3C4C5C F0F1F2F3F4F5F6F F8F9C1C2C3C4C5C A7F CNOP 16,32 Skip to offset C A C C2C2 14 DC C'BB' Demonstrate where we are Page 11 Copyright IBM (UK) Ltd 2014

12 Here we can see that the area to be filled includes 6 byte no-operation instruction of x'c '. Where the OPTABLE value is not one of DOS, 370 or XA, then we have the option to take advantage of the 4 byte BRC instruction and 6 byte BRCL instruction not only as no-operation instruction, but also to branch around the entire area filled with nooperation instructions, thereby potentially significantly reducing the number of instructions which require to be executed down to 1 (or 2 if the first two bytes are filled with x'0700' as per the logic point 2 above). The BRC and BRCL instructions are only used where 16 bytes or more need to be filled with no-operation instructions. This can be seen in the following extracts from Table H F0F1F2F3F4F5F6F7 12 DC 2C' ABCDEF' Fill with x'20' bytes F8F9C1C2C3C4C5C F0F1F2F3F4F5F6F F8F9C1C2C3C4C5C A7F CNOP 16,32 Skip to offset C A C C2C2 14 DC C'BB' Demonstrate where we are Above we can see at location x'20' the instruction is x'a7f40008' which is equivalent to a BRC unconditionally branching the 8 halfwords needed to take us to the next instruction after the CNOP. Below we can see that at location x'1020' the instruction is x'c0f ' which is equivalent to a BRCL unconditionally branching the 9 halfwords needed to take us to the next instruction after the CNOP F0F1F2F3F4F5F6F7 19 DC 2C' ABCDEF' Fill with x'20' bytes F8F9C1C2C3C4C5C F0F1F2F3F4F5F6F F8F9C1C2C3C4C5C C0F CNOP 18,32 Skip to offset C C C C2C2 21 DC C'BB' Demonstrate where we are Where the BRC or BRCL instructions are generated, the addr2 value will be printed in the assembler listing to make it easier to see where the code will continue execution, as can be seen above. Printing CNOP instructions Currently it is possible that the CNOP instruction may result in 1 or 2 lines of output in the assembler listing. As already mentioned, it is now possible for up to 4094 bytes to be required to achieve the desired alignment which could result in many hundreds of lines in the assembler listing from just a single CNOP instruction. To enable users to be able to control how much output is printed in the assembler listing, the PCONTROL(DATA/NODATA) or PRINT(DATA/NODATA)assembler options can be used. PCONTROL(DATA) and PRINT(DATA) will result in all generated instructions being Page 12 Copyright IBM (UK) Ltd 2014

13 printed, while PCONTROL(NODATA) and PRINT(NODATA) will only result in up to 2 lines being printed. PCONTROL(NODATA) and PRINT(NODATA) printing up to 2 lines was done again for compatibility reasons, the CNOP instruction without PI17455 printing up to 2 lines. This can be seen in the following extracts from Table G and Table I. Table I was created using identical input as table G, but with the PC(NODATA) option in effect F0F1F2F3F4F5F6F7 12 DC 2C' ABCDEF' Fill with x'20' bytes F8F9C1C2C3C4C5C F0F1F2F3F4F5F6F F8F9C1C2C3C4C5C A7F CNOP 16,32 Skip to offset C A C C2C2 14 DC C'BB' Demonstrate where we are With PC(DATA) on above we can see that the CNOP statement generates 3 lines of assembler listing at offsets x'20', x'24' and x'2a' F0F1F2F3F4F5F6F7 12 DC 2C' ABCDEF' Fill with x'20' bytes A7F CNOP 16,32 Skip to offset C C2C2 14 DC C'BB' Demonstrate where we are With PC(NODATA) above, the amount of data generated for the assembler listing by a CNOP instruction is limited to just 2 lines at offsets x'20' and x'24'. Summary It can therefore be seen from this technote how PI17455 has enhanced CNOP processing such that: The value of the CNOP boundary operand is now valid up to the value of SECTALGN and alignment can be achieved on any halfword within this range. Where the value of the boundary operand is greater than 16 it will be ensured that no instruction crosses a boundary. Where the value of the boundary operand is 16 or greater and the OPTABLE value specified is not one of DOS, 370 or XA we may use 6 byte no-operation instructions. Where the OPTABLE value is not one of DOS, 370 or XA, we may branch around CNOP generated no-operation instructions by using a BRC or BRCL instruction. We can control how much is printed in the listing as a result of a CNOP instruction by using the PRINT(DATA/NODATA) or PCONTROL(DATA/NODATA) options. Page 13 Copyright IBM (UK) Ltd 2014

14 Output from sample assemblies demonstrating enhanced CNOP Table E-New 2 * Code to demonstrate CNOP logic. 3 * Logic point 1. Where 14 or fewer bytes need to be filled with 4 * no-operation op-codes, they will be filled with exactly the 5 * same op-codes as before PI17455 to ensure code generated with 6 * the APAR is identical to code generated before it is applied. 7 * CNOPR1A CSECT 9 CNOPR1A AMODE ANY R:C USING *,12 11 ACONTROL OPTABLE(ZS6) Allow new op-codes 12 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 13 DC 3C' ABCDEF' Fill with x'30' bytes CNOP 14,16 Skip to offset E C2C2 15 DC C'BB' Demonstrate where we are 16 ACONTROL OPTABLE(UNI) Code must be compatible 17 * CNOP 14,16 Skip to offset E C2C2 19 DC C'BB' Demonstrate where we are LTORG 21 END Table E-Old 2 * Code to demonstrate CNOP logic. 3 * Logic point 1. Where 14 or fewer bytes need to be filled with 4 * no-operation op-codes, they will be filled with exactly the 5 * same op-codes as before PI17455 to ensure code generated with 6 * the APAR is identical to code generated before it is applied. 7 * CNOPR1A CSECT 9 CNOPR1A AMODE ANY R:C USING *,12 11 ACONTROL OPTABLE(ZS6) Allow new op-codes 12 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 13 DC 3C' ABCDEF' Fill with x'30' bytes CNOP 14,16 Skip to offset E C2C2 15 DC C'BB' Demonstrate where we are 16 ACONTROL OPTABLE(UNI) Code must be compatible 17 * CNOP 14,16 Skip to offset E C2C2 19 DC C'BB' Demonstrate where we are LTORG 21 END Page 14 Copyright IBM (UK) Ltd 2014

15 Table F 2 * Code to demonstrate CNOP logic. 3 * Logic point 2. Where 16 or more bytes need to be filled 4 * and the byte value is non zero, no op-code will cross a 5 * boundary. 6 * CNOPR2 CSECT 8 CNOPR2 AMODE ANY R:C USING *,12 10 ACONTROL OPTABLE(XA) 1 Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 12 DC C' ABCDEF' Fill with x'10' bytes F8F9C1C2C3C4C5C F0F1F2F3F4F5F6F7 13 DC C' ABCD' Fill with x'e' bytes F8F9C1C2C3C E CNOP 18,32 Skip to offset A C2C2 15 DC C'BB' Demonstrate where we are LTORG 17 END Table G 2 * Code to demonstrate CNOP logic. 3 * Logic point 3. Where 16 or more bytes need to be filled 4 * we may use BR and BRC op-codes. 5 * 6 * CNOPR3 CSECT 8 CNOPR3 AMODE ANY R:C USING *,12 10 ACONTROL OPTABLE(ESA) 1 Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 12 DC 2C' ABCDEF' Fill with x'20' bytes F8F9C1C2C3C4C5C F0F1F2F3F4F5F6F F8F9C1C2C3C4C5C A7F CNOP 16,32 Skip to offset C A C C2C2 14 DC C'BB' Demonstrate where we are LTORG 16 END Page 15 Copyright IBM (UK) Ltd 2014

16 Table H 2 * Code to demonstrate CNOP logic. 3 * Logic point 4. Where 16 or more bytes need to be filled 4 * we may use BRC and BRCL op-codes to branch around large 5 * amounts of code in a single instruction. 6 * CNOPR4A CSECT 8 CNOPR4A AMODE ANY R:C USING *,12 10 ACONTROL OPTABLE(ESA) 1 Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 12 DC 2C' ABCDEF' Fill with x'20' bytes F8F9C1C2C3C4C5C F0F1F2F3F4F5F6F F8F9C1C2C3C4C5C A7F CNOP 16,32 Skip to offset C A C C2C2 14 DC C'BB' Demonstrate where we are CNOPR4B CSECT 16 CNOPR4B AMODE ANY R:C USING *,12 18 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 19 DC 2C' ABCDEF' Fill with x'20' bytes F8F9C1C2C3C4C5C F0F1F2F3F4F5F6F F8F9C1C2C3C4C5C C0F CNOP 18,32 Skip to offset C C C C2C2 21 DC C'BB' Demonstrate where we are CNOPR4C CSECT 23 CNOPR4C AMODE ANY R:C USING *,12 25 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 26 DC 2C' ABCDEF' Fill with x'20' bytes F8F9C1C2C3C4C5C F0F1F2F3F4F5F6F F8F9C1C2C3C4C5C C0F A CNOP 20,32 Skip to offset C E C C2C2 28 DC C'BB' Demonstrate where we are CNOPR4D CSECT 30 CNOPR4D AMODE ANY R:C USING *,12 32 * Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 33 DC 2C' ABCDEF' Fill with x'20' bytes F8F9C1C2C3C4C5C F0F1F2F3F4F5F6F F8F9C1C2C3C4C5C A7F4000B CNOP 22,32 Skip to offset C A C C C2C2 35 DC C'BB' Demonstrate where we are LTORG 37 END Page 16 Copyright IBM (UK) Ltd 2014

17 Table I 2 * Code to demonstrate CNOP logic. 3 * Logic point 3. Where 16 or more bytes need to be filled 4 * we may use BR and BRC op-codes. 5 * 6 * CNOPR3 CSECT 8 CNOPR3 AMODE ANY R:C USING *,12 10 ACONTROL OPTABLE(ESA) 1 Fill with a little data to get us away from the start F0F1F2F3F4F5F6F7 12 DC 2C' ABCDEF' Fill with x'20' bytes A7F CNOP 16,32 Skip to offset C C2C2 14 DC C'BB' Demonstrate where we are LTORG 16 END Page 17 Copyright IBM (UK) Ltd 2014