Topic 6: Code Generation

Size: px
Start display at page:

Download "Topic 6: Code Generation"

Transcription

1 Compilers 2008 Topic 6: 6.4 Conditional Instructions Status Flags Conditionals A special register exists called the FLAGS register Consists of a sequence of bits, which are set (1) or unset (0). These flags are set as the result of various operations, e.g., the ZF (Zero Flag) is set when the last operation produced a zero value. The flags can be referenced in conditional jump operations, e.g., jz L100 jump to L100 if last op resulted in zero 2 1

2 Conditionals Integer Comparison Operation The CMP operation subtracts the second operand from the first Does not store the result of the subtraction anywhere. But affects the flags as if the subtraction had taken place, ZF is set if the subtraction produced zero, unset otherwise. SF (Sign Flag) is set if the subtraction was less than zero, 1 otherwise. Other operators exist for comparisons of floats, strings and booleans 3 If-then statement Conditionals How do we map an if-statement onto assembler code? Assume code like: if A == B then <stmt1> Firstly, we generate code for the comparison, e.g., CMP [A], [B] Then we generate code to jump over the code for <stmt1> if test fails JZ L1 jump if cmp result was zero Then we put the code for <stmt1>, e.g. ADD X, Y On the line following this, we put the label from above L1: 4 2

3 Conditionals The code together CMP [A], [B] JZ L1 ADD [X], [Y] L1: jump if ecx is zero 5 if statement: semantic actions <stmt> :- if <exp> then <instructions> : Generate code to jump if exp non-zero : Generate line with label <exp> jz end_then <instructions> end_then: 6 3

4 Conditionals If then-else statement How do we map an if-then-else statement onto assembler code? Assume code like: if A == B then <stmt1> else <stmt2> 7 if statement: semantic actions <stmt> :- if <exp> then <instruct1> else <instruct2> #A3 : Generate code to jump L1 if exp non-zero <exp> jz end_then <instruct1> end_then: jmp end_ifelse <instruct2> end_ifelse: 8 4

5 if statement: semantic actions <stmt> :- if <exp> then <instruct1> else <instruct2> #A3 : Generate code to jump if exp non-zero : At end of then code, generate jmp to end Also generate label for start_else <exp> jz start_else <instruct1> jmp end_ifelse start_else: <instruct2> end_ifelse: 9 if statement: semantic actions <stmt> :- if <exp> then <instruct1> else <instruct2> #A3 : Generate code to jump if exp non-zero : At end of then code, generate jmp to end Also generate label for start_else #A3: Generate label for end_ifelse <exp> jz start_else <instruct1> jmp end_ifelse start_else: <instruct2> #A3 end_ifelse: 10 5

6 if statement: sample code generated Code: CMP [A], [B] JZ L1 <stmt1 code> JMP L2 L1: <stmt2 code> L2: jump if cmp result was zero 11 Topic 6: 6.5 6

7 While statement While loops map onto assembler much as for an if-statement E.g., for while <exp> do <instructions> end while_start: <exp> jz while_end <instruccions> while_end: jmp while_start 13 While statement: semantic actions <loop> :- while <exp> do <instructions> end #A3 : Generate line with a unique label for loop start while_start: <exp> jz while_end <instruccions> while_end: jmp while_start 14 7

8 While statement: semantic actions <loop> :- while <exp> do <instructions> end #A3 : Generate line with a unique label for loop start : Generate line with jump to end if expr fails while_start: <exp> jz while_end <instruccions> while_end: jmp while_start 15 While statement: semantic actions <loop> :- while <exp> do <instructions> end #A3 : Generate line with a unique label for loop start : Generate line with jump to end if expr fails #A3: Generate jump back to start, and label for loop end while_start: <exp> jz while_end #A3 while_end: <instruccions> jmp while_start 16 8

9 While statement: A Real example topwhile: a label to mark the top of this WHILE loop mov eax, 3 planning to invoke function 3 read from a file mov ebx, [infileid] the file ID must be placed into register ebx mov ecx, mybyte the address of memory to receive file content must be placed into register ecx mov edx, 1 the number of bytes to read is placed in edx, int 80h invokes a kernel function according to the number in register eax cmp eax, 0 check whether a byte was read je dunwhile skip the body if no bytes were read xor byte [mybyte], b [] dereferences, thereby refers to the contents at mybytes mov eax, 4 planning to invoke function 4 write to a file mov ebx, [outfileid] the file ID must be placed into register ebx mov ecx, mybyte the address of memory to write from must be placed into register ecx mov edx, 1 the no. of bytes to write must be placed in edx int 80h invokes a kernel function according to no. in eax jmp topwhile go back to the top of the loop dunwhile: jump to here if no byte is read 17 Repeat statement: semantic actions <loop> :- repeat <instructions> until <exp> 18 9

10 Repeat statement: semantic actions <loop> :- repeat <instructions> until <exp> : Generate unique label for loop start repeat_start: 19 Repeat statement: semantic actions <loop> :- repeat <instructions> until <exp> : Generate unique label for loop start <instr> Code for <instr> generated by other productions <i> repeat_start: <instruccions> 20 10

11 Repeat statement: semantic actions <loop> :- repeat <instructions> until <exp> : Generate unique label for loop start <instr> Code for <instr> generated by other productions <exp>: Code for <exp> generated by other productions <i> <exp> repeat_start: <instruccions> <exp> 21 Repeat statement: semantic actions <loop> :- repeat <instructions> until <exp> : Generate unique label for loop start <instr> Code for <instr> generated by other productions <exp>: Code for <exp> generated by other productions : Generate jump to end if last result zero Generate unconditional jump back to beginning Generate label for loop end <i> repeat_start: <instruccions> <exp> <exp> jz repeat_end repeat_end: jmp repeat_start 22 11

Summary: Direct Code Generation

Summary: Direct Code Generation Summary: Direct Code Generation 1 Direct Code Generation Code generation involves the generation of the target representation (object code) from the annotated parse tree (or Abstract Syntactic Tree, AST)

More information

mith College Computer Science CSC231 Assembly Week #9 Spring 2017 Dominique Thiébaut

mith College Computer Science CSC231 Assembly Week #9 Spring 2017 Dominique Thiébaut mith College Computer Science CSC231 Assembly Week #9 Spring 2017 Dominique Thiébaut dthiebaut@smith.edu 2 Videos to Watch at a Later Time https://www.youtube.com/watch?v=fdmzngwchdk https://www.youtube.com/watch?v=k2iz1qsx4cm

More information

SOEN228, Winter Revision 1.2 Date: October 25,

SOEN228, Winter Revision 1.2 Date: October 25, SOEN228, Winter 2003 Revision 1.2 Date: October 25, 2003 1 Contents Flags Mnemonics Basic I/O Exercises Overview of sample programs 2 Flag Register The flag register stores the condition flags that retain

More information

mith College Computer Science CSC231 Assembly Week #10 Fall 2017 Dominique Thiébaut

mith College Computer Science CSC231 Assembly Week #10 Fall 2017 Dominique Thiébaut mith College Computer Science CSC231 Assembly Week #10 Fall 2017 Dominique Thiébaut dthiebaut@smith.edu 2 Videos to Start With https://www.youtube.com/watch?v=fdmzngwchdk https://www.youtube.com/watch?v=k2iz1qsx4cm

More information

EECE.3170: Microprocessor Systems Design I Summer 2017 Homework 4 Solution

EECE.3170: Microprocessor Systems Design I Summer 2017 Homework 4 Solution 1. (40 points) Write the following subroutine in x86 assembly: Recall that: int f(int v1, int v2, int v3) { int x = v1 + v2; urn (x + v3) * (x v3); Subroutine arguments are passed on the stack, and can

More information

Basic Assembly Instructions

Basic Assembly Instructions Basic Assembly Instructions Ned Nedialkov McMaster University Canada SE 3F03 January 2013 Outline Multiplication Division FLAGS register Branch Instructions If statements Loop instructions 2/21 Multiplication

More information

Computer Systems C S Cynthia Lee

Computer Systems C S Cynthia Lee Computer Systems C S 1 0 7 Cynthia Lee 2 Today s Topics LECTURE: More assembly code! NEXT TIME: More control flow Some misc. instructions you might see in your assign5 binary bomb Details of function call

More information

An Introduction to x86 ASM

An Introduction to x86 ASM An Introduction to x86 ASM Malware Analysis Seminar Meeting 1 Cody Cutler, Anton Burtsev Registers General purpose EAX, EBX, ECX, EDX ESI, EDI (index registers, but used as general in 32-bit protected

More information

Introduction to 8086 Assembly

Introduction to 8086 Assembly Introduction to 8086 Assembly Lecture 5 Jump, Conditional Jump, Looping, Compare instructions Labels and jumping (the jmp instruction) mov eax, 1 add eax, eax jmp label1 xor eax, eax label1: sub eax, 303

More information

Assembly Language LAB

Assembly Language LAB Assembly Language LAB Islamic University Gaza Engineering Faculty Department of Computer Engineering 2013 ECOM 2125: Assembly Language LAB Created by: Eng. Ahmed M. Ayash Modified and Presented By: Eihab

More information

Lecture 10 Return-oriented programming. Stephen Checkoway University of Illinois at Chicago Based on slides by Bailey, Brumley, and Miller

Lecture 10 Return-oriented programming. Stephen Checkoway University of Illinois at Chicago Based on slides by Bailey, Brumley, and Miller Lecture 10 Return-oriented programming Stephen Checkoway University of Illinois at Chicago Based on slides by Bailey, Brumley, and Miller ROP Overview Idea: We forge shellcode out of existing application

More information

Practical Malware Analysis

Practical Malware Analysis Practical Malware Analysis Ch 4: A Crash Course in x86 Disassembly Revised 1-16-7 Basic Techniques Basic static analysis Looks at malware from the outside Basic dynamic analysis Only shows you how the

More information

CSC 2400: Computer Systems. Towards the Hardware: Machine-Level Representation of Programs

CSC 2400: Computer Systems. Towards the Hardware: Machine-Level Representation of Programs CSC 2400: Computer Systems Towards the Hardware: Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32)

More information

CS61 Section Solutions 3

CS61 Section Solutions 3 CS61 Section Solutions 3 (Week of 10/1-10/5) 1. Assembly Operand Specifiers 2. Condition Codes 3. Jumps 4. Control Flow Loops 5. Procedure Calls 1. Assembly Operand Specifiers Q1 Operand Value %eax 0x104

More information

CSC 8400: Computer Systems. Machine-Level Representation of Programs

CSC 8400: Computer Systems. Machine-Level Representation of Programs CSC 8400: Computer Systems Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32) 1 Compilation Stages

More information

Program Exploitation Intro

Program Exploitation Intro Program Exploitation Intro x86 Assembly 04//2018 Security 1 Univeristà Ca Foscari, Venezia What is Program Exploitation "Making a program do something unexpected and not planned" The right bugs can be

More information

administrivia today start assembly probably won t finish all these slides Assignment 4 due tomorrow any questions?

administrivia today start assembly probably won t finish all these slides Assignment 4 due tomorrow any questions? administrivia today start assembly probably won t finish all these slides Assignment 4 due tomorrow any questions? exam on Wednesday today s material not on the exam 1 Assembly Assembly is programming

More information

CS412/CS413. Introduction to Compilers Tim Teitelbaum. Lecture 21: Generating Pentium Code 10 March 08

CS412/CS413. Introduction to Compilers Tim Teitelbaum. Lecture 21: Generating Pentium Code 10 March 08 CS412/CS413 Introduction to Compilers Tim Teitelbaum Lecture 21: Generating Pentium Code 10 March 08 CS 412/413 Spring 2008 Introduction to Compilers 1 Simple Code Generation Three-address code makes it

More information

CSE P 501 Exam 8/5/04 Sample Solution. 1. (10 points) Write a regular expression or regular expressions that generate the following sets of strings.

CSE P 501 Exam 8/5/04 Sample Solution. 1. (10 points) Write a regular expression or regular expressions that generate the following sets of strings. 1. (10 points) Write a regular ression or regular ressions that generate the following sets of strings. (a) (5 points) All strings containing a s, b s, and c s with at least one a and at least one b. [abc]*a[abc]*b[abc]*

More information

X86 Addressing Modes Chapter 3" Review: Instructions to Recognize"

X86 Addressing Modes Chapter 3 Review: Instructions to Recognize X86 Addressing Modes Chapter 3" Review: Instructions to Recognize" 1 Arithmetic Instructions (1)! Two Operand Instructions" ADD Dest, Src Dest = Dest + Src SUB Dest, Src Dest = Dest - Src MUL Dest, Src

More information

Branching and Looping

Branching and Looping Branching and Looping EECE416 uc Fall 2011 Unconditional Jumps jmp Like a goto in a high-level language Format: jmp StatementLabel The next statement executed will be the one at StatementLabel: jmp Encoding

More information

Branching and Looping

Branching and Looping Branching and Looping Ray Seyfarth August 10, 2011 Branching and looping So far we have only written straight line code Conditional moves helped spice things up In addition conditional moves kept the pipeline

More information

Conditional Processing

Conditional Processing ١ Conditional Processing Computer Organization & Assembly Language Programming Dr Adnan Gutub aagutub at uqu.edu.sa Presentation Outline [Adapted from slides of Dr. Kip Irvine: Assembly Language for Intel-Based

More information

Second Part of the Course

Second Part of the Course CSC 2400: Computer Systems Towards the Hardware 1 Second Part of the Course Toward the hardware High-level language (C) assembly language machine language (IA-32) 2 High-Level Language g Make programming

More information

mith College Computer Science CSC231 Assembly Week #11 Fall 2017 Dominique Thiébaut

mith College Computer Science CSC231 Assembly Week #11 Fall 2017 Dominique Thiébaut mith College Computer Science CSC231 Assembly Week #11 Fall 2017 Dominique Thiébaut dthiebaut@smith.edu Back to Conditional Jumps Review sub eax, 10 jz there xxx xxx there:yyy yyy Review cmp eax, 10 jz

More information

CPS104 Recitation: Assembly Programming

CPS104 Recitation: Assembly Programming CPS104 Recitation: Assembly Programming Alexandru Duțu 1 Facts OS kernel and embedded software engineers use assembly for some parts of their code some OSes had their entire GUIs written in assembly in

More information

The x86 Architecture

The x86 Architecture The x86 Architecture Lecture 24 Intel Manual, Vol. 1, Chapter 3 Robb T. Koether Hampden-Sydney College Fri, Mar 20, 2015 Robb T. Koether (Hampden-Sydney College) The x86 Architecture Fri, Mar 20, 2015

More information

Lecture 15 Intel Manual, Vol. 1, Chapter 3. Fri, Mar 6, Hampden-Sydney College. The x86 Architecture. Robb T. Koether. Overview of the x86

Lecture 15 Intel Manual, Vol. 1, Chapter 3. Fri, Mar 6, Hampden-Sydney College. The x86 Architecture. Robb T. Koether. Overview of the x86 Lecture 15 Intel Manual, Vol. 1, Chapter 3 Hampden-Sydney College Fri, Mar 6, 2009 Outline 1 2 Overview See the reference IA-32 Intel Software Developer s Manual Volume 1: Basic, Chapter 3. Instructions

More information

CS 31: Intro to Systems ISAs and Assembly. Kevin Webb Swarthmore College February 9, 2016

CS 31: Intro to Systems ISAs and Assembly. Kevin Webb Swarthmore College February 9, 2016 CS 31: Intro to Systems ISAs and Assembly Kevin Webb Swarthmore College February 9, 2016 Reading Quiz Overview How to directly interact with hardware Instruction set architecture (ISA) Interface between

More information

CS 31: Intro to Systems ISAs and Assembly. Kevin Webb Swarthmore College September 25, 2018

CS 31: Intro to Systems ISAs and Assembly. Kevin Webb Swarthmore College September 25, 2018 CS 31: Intro to Systems ISAs and Assembly Kevin Webb Swarthmore College September 25, 2018 Overview How to directly interact with hardware Instruction set architecture (ISA) Interface between programmer

More information

Review addressing modes

Review addressing modes Review addressing modes Op Src Dst Comments movl $0, %rax Register movl $0, 0x605428 Direct address movl $0, (%rcx) Indirect address movl $0, 20(%rsp) Indirect with displacement movl $0, -8(%rdi, %rax,

More information

Assembly Language: Part 2

Assembly Language: Part 2 Assembly Language: Part 2 1 Goals of this Lecture Help you learn: Intermediate aspects of IA-32 assembly language Control flow with signed integers Control flow with unsigned integers Arrays Structures

More information

CS Bootcamp x86-64 Autumn 2015

CS Bootcamp x86-64 Autumn 2015 The x86-64 instruction set architecture (ISA) is used by most laptop and desktop processors. We will be embedding assembly into some of our C++ code to explore programming in assembly language. Depending

More information

Assembly Language Lab # 6

Assembly Language Lab # 6 Faculty of Engineering Computer Engineering Department Islamic University of Gaza 2011 Assembly Language Lab # 6 Boolean Instructions and Conditional Structured Eng. Doaa Abu Jabal Objective: Assembly

More information

Intel x86 Jump Instructions. Part 5. JMP address. Operations: Program Flow Control. Operations: Program Flow Control.

Intel x86 Jump Instructions. Part 5. JMP address. Operations: Program Flow Control. Operations: Program Flow Control. Part 5 Intel x86 Jump Instructions Control Logic Fly over code Operations: Program Flow Control Operations: Program Flow Control Unlike high-level languages, processors don't have fancy expressions or

More information

CSE351 Autumn 2012 Midterm Exam (5 Nov 2012)

CSE351 Autumn 2012 Midterm Exam (5 Nov 2012) CSE351 Autumn 2012 Midterm Exam (5 Nov 2012) Please read through the entire examination first! We designed this exam so that it can be completed in 50 minutes and, hopefully, this estimate will prove to

More information

Intel x86 Jump Instructions. Part 5. JMP address. Operations: Program Flow Control. Operations: Program Flow Control.

Intel x86 Jump Instructions. Part 5. JMP address. Operations: Program Flow Control. Operations: Program Flow Control. Part 5 Intel x86 Jump Instructions Control Logic Fly over code Operations: Program Flow Control Operations: Program Flow Control Unlike high-level languages, processors don't have fancy expressions or

More information

Lab 3. The Art of Assembly Language (II)

Lab 3. The Art of Assembly Language (II) Lab. The Art of Assembly Language (II) Dan Bruce, David Clark and Héctor D. Menéndez Department of Computer Science University College London October 2, 2017 License Creative Commons Share Alike Modified

More information

CNIT 127: Exploit Development. Ch 1: Before you begin. Updated

CNIT 127: Exploit Development. Ch 1: Before you begin. Updated CNIT 127: Exploit Development Ch 1: Before you begin Updated 1-14-16 Basic Concepts Vulnerability A flaw in a system that allows an attacker to do something the designer did not intend, such as Denial

More information

Faculty of Engineering Student Number:

Faculty of Engineering Student Number: Philadelphia University Student Name: Faculty of Engineering Student Number: Dept. of Computer Engineering Final Exam, Second Semester: 2013/2014 Course Title: Microprocessors Date: 08/06/2014 Course No:

More information

Inline Assembler. Willi-Hans Steeb and Yorick Hardy. International School for Scientific Computing

Inline Assembler. Willi-Hans Steeb and Yorick Hardy. International School for Scientific Computing Inline Assembler Willi-Hans Steeb and Yorick Hardy International School for Scientific Computing e-mail: steebwilli@gmail.com Abstract We provide a collection of inline assembler programs. 1 Using the

More information

Towards the Hardware"

Towards the Hardware CSC 2400: Computer Systems Towards the Hardware Chapter 2 Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32) 1 High-Level Language Make programming

More information

Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB. Lab # 8. Conditional Processing

Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB. Lab # 8. Conditional Processing Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB Lab # 8 Conditional Processing April, 2014 1 Assembly Language LAB Unconditional Jump The

More information

Lab 6: Conditional Processing

Lab 6: Conditional Processing COE 205 Lab Manual Lab 6: Conditional Processing Page 56 Lab 6: Conditional Processing Contents 6.1. Unconditional Jump 6.2. The Compare Instruction 6.3. Conditional Jump Instructions 6.4. Finding the

More information

BAHAR DÖNEMİ MİKROİŞLEMCİLER LAB4 FÖYÜ

BAHAR DÖNEMİ MİKROİŞLEMCİLER LAB4 FÖYÜ LAB4 RELATED INSTRUCTIONS: Compare, division and jump instructions CMP REG, memory memory, REG REG, REG memory, immediate REG, immediate operand1 - operand2 Result is not stored anywhere, flags are set

More information

Ex: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans.

Ex: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans. INSTRUCTOR: ABDULMUTTALIB A H ALDOURI Conditional Jump Cond Unsigned Signed = JE : Jump Equal JE : Jump Equal ZF = 1 JZ : Jump Zero JZ : Jump Zero ZF = 1 JNZ : Jump Not Zero JNZ : Jump Not Zero ZF = 0

More information

Digital Forensics Lecture 3 - Reverse Engineering

Digital Forensics Lecture 3 - Reverse Engineering Digital Forensics Lecture 3 - Reverse Engineering Low-Level Software Akbar S. Namin Texas Tech University Spring 2017 Reverse Engineering High-Level Software Low-level aspects of software are often the

More information

4. Jump to *RA 4. StackGuard 5. Execute code 5. Instruction Set Randomization 6. Make system call 6. System call Randomization

4. Jump to *RA 4. StackGuard 5. Execute code 5. Instruction Set Randomization 6. Make system call 6. System call Randomization 04/04/06 Lecture Notes Untrusted Beili Wang Stages of Static Overflow Solution 1. Find bug in 1. Static Analysis 2. Send overflowing input 2. CCured 3. Overwrite return address 3. Address Space Randomization

More information

Language of x86 processor family

Language of x86 processor family Assembler lecture 2 S.Šimoňák, DCI FEEI TU of Košice Language of x86 processor family Assembler commands: instructions (processor, instructions of machine language) directives (compiler translation control,

More information

Branching and Looping

Branching and Looping X86 Assembly Language Programming: Branching and Looping EECE416 uc Charles Kim Howard University Fall 2013 www.mwftr.com Unconditional Jump: JMP jmp Like a goto in a high-level language Format: jmp StatementLabel

More information

Faculty of Engineering Computer Engineering Department Islamic University of Gaza Assembly Language Lab # 2 Assembly Language Fundamentals

Faculty of Engineering Computer Engineering Department Islamic University of Gaza Assembly Language Lab # 2 Assembly Language Fundamentals Faculty of Engineering Computer Engineering Department Islamic University of Gaza 2011 Assembly Language Lab # 2 Assembly Language Fundamentals Assembly Language Lab # 2 Assembly Language Fundamentals

More information

Process Layout and Function Calls

Process Layout and Function Calls Process Layout and Function Calls CS 6 Spring 07 / 8 Process Layout in Memory Stack grows towards decreasing addresses. is initialized at run-time. Heap grow towards increasing addresses. is initialized

More information

Assembly Language for Intel-Based Computers, 4 th Edition. Chapter 6: Conditional Processing

Assembly Language for Intel-Based Computers, 4 th Edition. Chapter 6: Conditional Processing Assembly Language for Intel-Based Computers, 4 th Edition Kip R. Irvine Chapter 6: Conditional Processing (c) Pearson Education, 2002. All rights reserved. Chapter Overview Boolean and Comparison Instructions

More information

Summer 2003 Lecture 11 06/25/03

Summer 2003 Lecture 11 06/25/03 Summer 2003 Lecture 11 06/25/03 Maskable Hardware Interrupt Process Sequence 1) CPU samples level of interrupt pin at end of last cycle of previous instruction. 2) If the interrupt pin is high, rather

More information

Function Calls COS 217. Reading: Chapter 4 of Programming From the Ground Up (available online from the course Web site)

Function Calls COS 217. Reading: Chapter 4 of Programming From the Ground Up (available online from the course Web site) Function Calls COS 217 Reading: Chapter 4 of Programming From the Ground Up (available online from the course Web site) 1 Goals of Today s Lecture Finishing introduction to assembly language o EFLAGS register

More information

Q1: Multiple choice / 20 Q2: Data transfers and memory addressing

Q1: Multiple choice / 20 Q2: Data transfers and memory addressing 16.317: Microprocessor Systems Design I Fall 2014 Exam 1 October 1, 2014 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,

More information

Assembler lecture 5 S.Šimoňák, DCI FEEI TU of Košice

Assembler lecture 5 S.Šimoňák, DCI FEEI TU of Košice Assembler lecture 5 S.Šimoňák, DCI FEEI TU of Košice Jumps and iterations conditional and unconditional jumps iterations (loop) implementation of HLL control structures Unconditional jump unconditional

More information

Assembly Language: Overview!

Assembly Language: Overview! Assembly Language: Overview! 1 Goals of this Lecture! Help you learn:" The basics of computer architecture" The relationship between C and assembly language" IA-32 assembly language, through an example"

More information

Assembly Language: IA-32 Instructions

Assembly Language: IA-32 Instructions Assembly Language: IA-32 Instructions 1 Goals of this Lecture Help you learn how to: Manipulate data of various sizes Leverage more sophisticated addressing modes Use condition codes and jumps to change

More information

Computer Architecture..Second Year (Sem.2).Lecture(4) مدرس المادة : م. سندس العزاوي... قسم / الحاسبات

Computer Architecture..Second Year (Sem.2).Lecture(4) مدرس المادة : م. سندس العزاوي... قسم / الحاسبات مدرس المادة : م. سندس العزاوي... قسم / الحاسبات... - 26 27 Assembly Level Machine Organization Usage of AND, OR, XOR, NOT AND : X Y X AND Y USE : to chick any bit by change ( to ) or ( to ) EX : AX = FF5

More information

complement) Multiply Unsigned: MUL (all operands are nonnegative) AX = BH * AL IMUL BH IMUL CX (DX,AX) = CX * AX Arithmetic MUL DWORD PTR [0x10]

complement) Multiply Unsigned: MUL (all operands are nonnegative) AX = BH * AL IMUL BH IMUL CX (DX,AX) = CX * AX Arithmetic MUL DWORD PTR [0x10] The following pages contain references for use during the exam: tables containing the x86 instruction set (covered so far) and condition codes. You do not need to submit these pages when you finish your

More information

Marking Scheme. Examination Paper. Module: Microprocessors (630313)

Marking Scheme. Examination Paper. Module: Microprocessors (630313) Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 12/06/2017 Section 1 Weighting 40% of

More information

16.317: Microprocessor Systems Design I Fall 2014

16.317: Microprocessor Systems Design I Fall 2014 16.317: Microprocessor Systems Design I Fall 2014 Exam 2 Solution 1. (16 points, 4 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response by circling

More information

Introduction. Following are the types of operators: Unary requires a single operand Binary requires two operands Ternary requires three operands

Introduction. Following are the types of operators: Unary requires a single operand Binary requires two operands Ternary requires three operands Introduction Operators are the symbols which operates on value or a variable. It tells the compiler to perform certain mathematical or logical manipulations. Can be of following categories: Unary requires

More information

X86-NASM STANDARD COMMANDS. Comment your code with a semicolon (;)! The assembler won t read anything after it.

X86-NASM STANDARD COMMANDS. Comment your code with a semicolon (;)! The assembler won t read anything after it. X86-NASM STANDARD COMMANDS Comment your code with a semicolon (;)! The assembler won t read anything after it. Move mov ax,bx ; ax = bx Use this command when you want to move a value around. You can also

More information

Module 3 Instruction Set Architecture (ISA)

Module 3 Instruction Set Architecture (ISA) Module 3 Instruction Set Architecture (ISA) I S A L E V E L E L E M E N T S O F I N S T R U C T I O N S I N S T R U C T I O N S T Y P E S N U M B E R O F A D D R E S S E S R E G I S T E R S T Y P E S O

More information

CSE351 Spring 2018, Midterm Exam April 27, 2018

CSE351 Spring 2018, Midterm Exam April 27, 2018 CSE351 Spring 2018, Midterm Exam April 27, 2018 Please do not turn the page until 11:30. Last Name: First Name: Student ID Number: Name of person to your left: Name of person to your right: Signature indicating:

More information

The Hardware/Software Interface CSE351 Spring 2013

The Hardware/Software Interface CSE351 Spring 2013 The Hardware/Software Interface CSE351 Spring 2013 x86 Programming II 2 Today s Topics: control flow Condition codes Conditional and unconditional branches Loops 3 Conditionals and Control Flow A conditional

More information

CSE P 501 Compilers. x86 Lite for Compiler Writers Hal Perkins Autumn /25/ Hal Perkins & UW CSE J-1

CSE P 501 Compilers. x86 Lite for Compiler Writers Hal Perkins Autumn /25/ Hal Perkins & UW CSE J-1 CSE P 501 Compilers x86 Lite for Compiler Writers Hal Perkins Autumn 2011 10/25/2011 2002-11 Hal Perkins & UW CSE J-1 Agenda Learn/review x86 architecture Core 32-bit part only for now Ignore crufty, backward-compatible

More information

CS 31: Intro to Systems ISAs and Assembly. Martin Gagné Swarthmore College February 7, 2017

CS 31: Intro to Systems ISAs and Assembly. Martin Gagné Swarthmore College February 7, 2017 CS 31: Intro to Systems ISAs and Assembly Martin Gagné Swarthmore College February 7, 2017 ANNOUNCEMENT All labs will meet in SCI 252 (the robot lab) tomorrow. Overview How to directly interact with hardware

More information

Compiler construction. x86 architecture. This lecture. Lecture 6: Code generation for x86. x86: assembly for a real machine.

Compiler construction. x86 architecture. This lecture. Lecture 6: Code generation for x86. x86: assembly for a real machine. This lecture Compiler construction Lecture 6: Code generation for x86 Magnus Myreen Spring 2018 Chalmers University of Technology Gothenburg University x86 architecture s Some x86 instructions From LLVM

More information

Overview of Compiler. A. Introduction

Overview of Compiler. A. Introduction CMPSC 470 Lecture 01 Topics: Overview of compiler Compiling process Structure of compiler Programming language basics Overview of Compiler A. Introduction What is compiler? What is interpreter? A very

More information

16.317: Microprocessor Systems Design I Fall 2015

16.317: Microprocessor Systems Design I Fall 2015 16.317: Microprocessor Systems Design I Fall 2015 Exam 2 Solution 1. (16 points, 4 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response by circling

More information

Complex Instruction Set Computer (CISC)

Complex Instruction Set Computer (CISC) Introduction ti to IA-32 IA-32 Processors Evolutionary design Starting in 1978 with 886 Added more features as time goes on Still support old features, although obsolete Totally dominate computer market

More information

Assembly Language for Intel-Based Computers, 5 th Edition. Kip R. Irvine. Chapter 6: Conditional Processing

Assembly Language for Intel-Based Computers, 5 th Edition. Kip R. Irvine. Chapter 6: Conditional Processing Assembly Language for Intel-Based Computers, 5 th Edition Kip R. Irvine Chapter 6: Conditional Processing Chapter Overview Boolean and Comparison Instructions Conditional Jumps Conditional Loop Instructions

More information

Basic Assembly SYSC-3006

Basic Assembly SYSC-3006 Basic Assembly Program Development Problem: convert ideas into executing program (binary image in memory) Program Development Process: tools to provide people-friendly way to do it. Tool chain: 1. Programming

More information

Basic Pentium Instructions. October 18

Basic Pentium Instructions. October 18 Basic Pentium Instructions October 18 CSC201 Section 002 Fall, 2000 The EFLAGS Register Bit 11 = Overflow Flag Bit 7 = Sign Flag Bit 6 = Zero Flag Bit 0 = Carry Flag "Sets the flags" means sets OF, ZF,

More information

Computer Systems Organization V Fall 2009

Computer Systems Organization V Fall 2009 Computer Systems Organization V22.0201 Fall 2009 Sample Midterm Exam ANSWERS 1. True/False. Circle the appropriate choice. (a) T (b) F At most one operand of an x86 assembly instruction can be an memory

More information

Marking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313)

Marking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313) Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 02/06/2018 Section 1 Weighting 40% of

More information

Machine-Level Programming II: Control Flow

Machine-Level Programming II: Control Flow Machine-Level Programming II: Control Flow Today Condition codes Control flow structures Next time Procedures Fabián E. Bustamante, Spring 2010 Processor state (ia32, partial) Information about currently

More information

Introduction to Reverse Engineering. Alan Padilla, Ricardo Alanis, Stephen Ballenger, Luke Castro, Jake Rawlins

Introduction to Reverse Engineering. Alan Padilla, Ricardo Alanis, Stephen Ballenger, Luke Castro, Jake Rawlins Introduction to Reverse Engineering Alan Padilla, Ricardo Alanis, Stephen Ballenger, Luke Castro, Jake Rawlins Reverse Engineering (of Software) What is it? What is it for? Binary exploitation (the cool

More information

Low-Level Essentials for Understanding Security Problems Aurélien Francillon

Low-Level Essentials for Understanding Security Problems Aurélien Francillon Low-Level Essentials for Understanding Security Problems Aurélien Francillon francill@eurecom.fr Computer Architecture The modern computer architecture is based on Von Neumann Two main parts: CPU (Central

More information

CSCI 334: Principles of Programming Languages. Computer Architecture (a really really fast introduction) Lecture 11: Control Structures II

CSCI 334: Principles of Programming Languages. Computer Architecture (a really really fast introduction) Lecture 11: Control Structures II 1 byte{ 1 byte{ CSCI 334: Principles of Programming Languages Lecture 11: Control Structures II Computer Architecture (a really really fast introduction) Instructor: Dan Barowy Memory Instructions main

More information

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY BACKGROUND 8086 CPU has 8 general purpose registers listed below: AX - the accumulator register (divided into AH / AL): 1. Generates shortest machine code 2. Arithmetic, logic and data transfer 3. One

More information

Chapter 6 (Part a) Conditional Processing

Chapter 6 (Part a) Conditional Processing Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2025: Assembly Language Discussion Chapter 6 (Part a) Conditional Processing Eng. Eman R. Habib April, 2014 2 Assembly

More information

Compiler Construction D7011E

Compiler Construction D7011E Compiler Construction D7011E Lecture 8: Introduction to code generation Viktor Leijon Slides largely by Johan Nordlander with material generously provided by Mark P. Jones. 1 What is a Compiler? Compilers

More information

Chapter 4 Processor Architecture: Y86 (Sections 4.1 & 4.3) with material from Dr. Bin Ren, College of William & Mary

Chapter 4 Processor Architecture: Y86 (Sections 4.1 & 4.3) with material from Dr. Bin Ren, College of William & Mary Chapter 4 Processor Architecture: Y86 (Sections 4.1 & 4.3) with material from Dr. Bin Ren, College of William & Mary 1 Outline Introduction to assembly programing Introduction to Y86 Y86 instructions,

More information

Real instruction set architectures. Part 2: a representative sample

Real instruction set architectures. Part 2: a representative sample Real instruction set architectures Part 2: a representative sample Some historical architectures VAX: Digital s line of midsize computers, dominant in academia in the 70s and 80s Characteristics: Variable-length

More information

It is possible to define a number using a character or multiple numbers (see instruction DB) by using a string.

It is possible to define a number using a character or multiple numbers (see instruction DB) by using a string. 1 od 5 17. 12. 2017 23:53 (https://github.com/schweigi/assembler-simulator) Introduction This simulator provides a simplified assembler syntax (based on NASM (http://www.nasm.us)) and is simulating a x86

More information

EECE.3170: Microprocessor Systems Design I Summer 2017

EECE.3170: Microprocessor Systems Design I Summer 2017 EECE.3170: Microprocessor Systems Design I Summer 2017 Lecture 8: Key Questions June 5, 2017 1. (Review) Describe the structure of a typical x86 stack frame. EECE.3170: Microprocessor Systems Design I

More information

Assignment 11: functions, calling conventions, and the stack

Assignment 11: functions, calling conventions, and the stack Assignment 11: functions, calling conventions, and the stack ECEN 4553 & 5013, CSCI 4555 & 5525 Prof. Jeremy G. Siek December 5, 2008 The goal of this week s assignment is to remove function definitions

More information

CNIT 127: Exploit Development. Ch 3: Shellcode. Updated

CNIT 127: Exploit Development. Ch 3: Shellcode. Updated CNIT 127: Exploit Development Ch 3: Shellcode Updated 1-30-17 Topics Protection rings Syscalls Shellcode nasm Assembler ld GNU Linker objdump to see contents of object files strace System Call Tracer Removing

More information

Assembly Language. Assembly language for x86 compatible processors using GNU/Linux operating system

Assembly Language. Assembly language for x86 compatible processors using GNU/Linux operating system Assembly Language Assembly language for x86 compatible processors using GNU/Linux operating system x86 refers to the instruction set architecture in most personal computers Derives from model numbers ending

More information

SOFTWARE ARCHITECTURE 5. COMPILER

SOFTWARE ARCHITECTURE 5. COMPILER 1 SOFTWARE ARCHITECTURE 5. COMPILER Tatsuya Hagino hagino@sfc.keio.ac.jp slides URL https://vu5.sfc.keio.ac.jp/sa/ 2 Programming Language Programming Language Artificial language to express instructions

More information

x86-64 Programming II

x86-64 Programming II x86-64 Programming II CSE 351 Winter 2018 Instructor: Mark Wyse Teaching Assistants: Kevin Bi Parker DeWilde Emily Furst Sarah House Waylon Huang Vinny Palaniappan http://xkcd.com/409/ Administrative Homework

More information

Static Analysis I PAOLO PALUMBO, F-SECURE CORPORATION

Static Analysis I PAOLO PALUMBO, F-SECURE CORPORATION Static Analysis I PAOLO PALUMBO, F-SECURE CORPORATION Representing Data Binary numbers 1 0 1 1 NIBBLE 0xB 1 0 1 1 1 1 0 1 0xBD 1 0 1 1 1 1 0 1 0 0 1 1 1 0 0 1 BYTE WORD 0xBD 0x39 Endianness c9 33 41 03

More information

Computer Science 104:! Y86 & Single Cycle Processor Design!

Computer Science 104:! Y86 & Single Cycle Processor Design! Computer Science 104: Y86 & Single Cycle Processor Design Alvin R. Lebeck Slides based on those from Randy Bryant 1 CS:APP Administrative Homework #4 My office hours today 11:30-12:30 Reading: text 4.3

More information

System Programming and Computer Architecture (Fall 2009)

System Programming and Computer Architecture (Fall 2009) System Programming and Computer Architecture (Fall 2009) Recitation 2 October 8 th, 2009 Zaheer Chothia Email: zchothia@student.ethz.ch Web: http://n.ethz.ch/~zchothia/ Topics for Today Classroom Exercise

More information

COMP211 ASSEMBLY PROGRAMMING

COMP211 ASSEMBLY PROGRAMMING COMP211 ASSEMBLY PROGRAMMING Chapter 6: Conditional Processing Cristina G. Rivera 2 Chapter Overview Boolean and Comparison Instructions Conditional Jumps Conditional Loop Instructions Conditional Structures

More information

Digital Forensics Lecture 4 - Reverse Engineering

Digital Forensics Lecture 4 - Reverse Engineering Digital Forensics Lecture 4 - Reverse Engineering Deciphering Code Structures Akbar S. Namin Texas Tech University Spring 2017 Goal: Learn about the most common logical and control flow constructs used

More information