BEng (Hons.) Telecommunications. BSc (Hons.) Computer Science with Network Security

Transcription

1 BEng (Hons.) Telecommunications BSc (Hons.) Computer Science with Network Security Cohorts: BTEL/15B/FT BCNS/16B/FT Examinations for / Semester 2 Resit Examinations for BTEL/13B/FT & BTEL/15B/FT MODULE: COMPUTER & MICROPROCESSOR ARCHITECTURE & PROGRAMMING MODULE CODE: HCA1109C Duration: 2 ½ Hours Reading Time: None Instructions to Candidates: 1. Attempt FULLY EITHER SECTION A OR SECTION B 2. Start your answer to each question on a fresh page 3. Questions carry equal marks 4. Total Marks = ASCII Reference sheet and Jump Table sheets are provided 6. Electronic Calculators are allowed in the Examination Room This question paper contains 2 sections with 8 questions and 9 pages. Page 1 of 9

2 QUESTION 1: (25 MARKS) SECTION A ATTEMPT ALL FOUR QUESTIONS a) Describe Computer architecture and Computer organization. Give one example of each. (4 Marks) b) What is CISC architecture and give two advantages of this approach? (3 marks) c) Describe the pipelining process? (3 marks) d) The five stages of a processor have the following latencies: Fetch Decode Execute Memory Writeback A 123ps 178ps 439ps 652ps 67ps Assume that when pipelining, each pipeline stage costs 18ps extra for the registers between pipeline stages. i. Calculate the cycle time, latency of an instruction and throughput for the Nonpipelined processor A. (Show all your calculations) ii. Calculate the cycle time, latency of an instruction and throughput for the pipelined processor A. (Show all your calculations) e) What is a Superscalar architecture? (2 Marks) f) What are the five consequences of Moore s Law? (5 Marks) g) Branch Prediction is one among the techniques built in into contemporary processors to increase speed. Describe this technique of Branch Prediction. (2 Marks) Page 2 of 9

3 QUESTION 2: (25 MARKS) a) Explain the three types of Assembly language statements. b) Translate the following High Level Language to Assembly Language : i. Z = (Y + 6) (X - D) ii. W = D 2 X H (2 Marks) c) A student carries out some mathematical conditions in a programming code where he has to replace the value of VX to a negative value of VX if the value of VX is greater than 0. Compute this scenario into assembly codes. d) Exchange the 12 th and 29 th elements in a word Z using assembly codes. e) Write some assembly codes to close a file. Suppose variable Mandle contains the file handle. (4 Marks) f) Write some assembly codes using function 40h to display a message GOOD LUCK on the screen. (7 Marks) Page 3 of 9

4 QUESTION 3: (25 MARKS) a) Explain the term locality of reference in the context of cache? (2 Marks) b) Describe the Direct Mapping function and give two advantages of using it. c) Differentiate between the Write through policy and Write back policy. (4 Marks) d) i. With regards to cache memory and main memory, write down the formula for average access time for small computer systems and large computer system. (2 Marks) ii. For a small computer system, the cache access time is 35ns, main memory access time is 200 ns and the number of reference made is 10. Calculate the average access time? What would happen if the number of references is increased? e) A computer has one 2-level cache. Suppose that 60% of the memory references hit on the first level cache, 35% hit on the second level and 5% miss. The access times are 5ns, 17ns and 50 ns respectively. What is the average access time? f) A computer uses RAM chips 1024 x 1 capacity. How many chips are needed to provide a memory capacity of 52 K bytes? g) Compute even parity bit as XOR of 3 bits in each circle. (5 Marks) Page 4 of 9

5 QUESTION 4: (25 MARKS) a) Differentiate between Base addressing mode and Relative addressing mode. (4 Marks) b) An instruction format defines the layout of bits and instruction in terms of its constituent parts. List and explain the three fields for the instruction format. (6 Marks) c) What is the difference between Zero-address instruction and Three-address instruction? (2 Marks) d) How are higher priority interrupts handled? e) How does the 8086 execute an INT instruction? (6 Marks) f) Describe the Tri State buffer gate with the aid of a diagram. (4 Marks) Page 5 of 9

6 SECTION B ATTEMPT ALL FOUR QUESTIONS QUESTION 5 (25 Marks) a) Illustrate, with the aid of diagrams, the differences between the Princeton and Harvard microprocessor architectures. (5 marks) b) Illustrate the difference between pipelined and superscalar architectures by showing how both can increase a microprocessor throughput. (6 marks) c) Draw two diagrams to differentiate between a Memory and CPU connections. (6 marks) d) Describe the four main data access methods and give one example of one entity which accesses data in each method. (8 marks) Page 6 of 9

7 QUESTION 6 (25 Marks) a) Create a loop program in assembly which will produce the following pattern: AAAAAA AAAAAA AAAAAA AAAAAA (Note: You must use the cx register as a counter) (9 marks) b) Translate the following pseudo-code into optimized assembly code: IF ((A >= 1) AND (B == 6)) OR (C > 5) THEN X = 2 ELSE X = 1 (8 marks) c) Prototype a macro called AP which takes four integer parameters n (number of terms), a (first term), L (last term) and Sum (sum of n terms) of an arithmetic progression, given that: Sum = (a+l)*n/2 (8 marks) Page 7 of 9

8 QUESTION 7 (25 Marks) a) Provide eight properties for each of static RAM and dynamic RAM and give the low-level structure of each type. (10 marks) b) Consider a system with 256 megabytes of main memory and a microprocessor that has an on-chip 128 kilobyte, 8-way, set-associative cache. Assume that the cache has a line size of 16 bytes. (i) Draw a block diagram of this cache showing its organization and how the different address fields are used to determine a cache hit/miss. (ii) Where in the cache can the byte from memory location DEAD440 be mapped? (10+5 marks) Page 8 of 9

9 QUESTION 8 (25 Marks) a) Give the hexadecimal contents of the register shown after each of the following instructions:.data foo DW 65.CODE MOV AX, foo AL = SHL AX, 2 AL = MOV CX, 3 MUL CX AL = ROR AX, 3 AL = MOV AL, AH AL = NEG AX AH = ( marks) b) Suppose you made the following declarations: D DB -17, 24, 22 E DW 334, -8, 27 Give the hexadecimal contents of the destination register in each case: mov al, D + 3 mov ax, E + 4 mov ax, E - 3 mov al, BYTE PTR E + 3 mov ax, WORD PTR D + 2 ( marks) *** End of Exam Paper *** Page 9 of 9