Errata Sheet. May 6, 1996 / Release 1.3. Marking :

Transcription

1 Microcomputer Components Technical Support Group Munich HL MCB PD 8 Errata Sheet May 6, 1996 / Release 1.3 Device : SAB-C513A-H SAF-C513A-H Marking : BA These parts of the SAB-C513A-H are the EEPROM version of the C511/C513 family of components and can be identified by the letters "BA" below the part number. The SAB-C513A-H is mounted in a Plastic Leaded Chip Carrier (P-LCC- 44) package. This errata sheet describes both the functional problems (see part 1) and the deviations from the electrical and timing specifications (see part 2) known in this step. If a problem was already introduced with an errata sheet of an earlier step, its initial number is still retained in this errata sheet. Thus, the numerical order of the problems described in the following may contain gaps. At the end of this document, you will find two tables showing the problems found up to now. Errata Sheet SAB-C513A-H, BA, 1.3-1/5-

2 1) Functional Problems The following malfunctions are known in this step: Problem 1: XRAM Area FF00H to FF7FH is not accessible using DPTR When trying to access the internal XRAM located in the memory map at locations FF00H to FFFFH with MOVX instructions which use the datapointer DPTR (MOVX or the access fails at locations FF00H to FF7FH. Instead of an internal XRAM access an external access is generated (Pins of Port 0, Port 2 and Port 3 may change their state). The total XRAM located in FF00H to FFFFH can be accessed using MOVX instruction with Ri or MOVX a,@ri). Instead of using MOVX instructions with DPTR for accessing the XRAM locations FF00H to FF7FH, MOVX instructions with Ri should be used for accessing this XRAM area. Problem 2: Port 0 disturbed during XRAM accesses The problem occurs if internal program execution is selected (EA#=high). When the internal XRAM is enabled and accessed via MOVX instructions (with datapointer the port 0 latch is overwritten with FFH. Therefore, a low level previously written to a port 0 line will be disturbed and port 0 is switched to input (high level with external pullup resistor) after the XRAM has been accessed. If XRAM and MOVX instructions are not used, the problem at port 0 does not occur. No workaround possible. If an application uses internal program execution, port 0 as output, and XRAM, port 0 should be only used as input port. Errata Sheet SAB-C513A-H, BA, 1.3-2/5-

3 Problem 3: Wrong destination address at AJMP and ACALL instructions If an opcode byte of an AJMP or ACALL instruction is located at the last but one address location of a 2K code memory page, a wrong destination address is calculated and the program execution will continue at a wrong address, which is 2K (800H) below the correct destination address. There are 32 2K code memory pages available with critical address locations where an AJMP or ACALL instruction can be located: 7FEH, FFEH, 17FEH, 1FFE, 27FEH,... F7FEH, and FFFEH. At all of these 32 address locations AJMP or ACALL instructions show a malfunction. There are only software workarounds possible: - Avoiding ACALL and AJMP instructions in the program code and using LCALL and LJMP instructions only. Typically, compilers have built-in switches which disable the usage of ACALL and AJMP instructions and force the usage of LCALL and LJMP instructions. - Existing programs (HEX-files) must be checked whether the opcode of an AJMP or ACALL instruction is located at a critical address location. If yes, the instruction has to be moved to an uncritical address location or it has to be replaced by a LJMP or LCALL instruction. Errata Sheet SAB-C513A-H, BA, 1.3-3/5-

4 2) Electrical- and Timing-Spec. Deviations The following deviations of electrical and timing parameters from the specification are known in this step: Problem 1: Increased Power Down Mode Current Description : In power down mode the supply current is 700µA instead of the 50µA stated in the spec. Workaround : The increased I PD condition appears directly after a reset operation: I PD decreases some milliseconds after the reset operation to a value close to 50µA. The increased I PD phase directly after reset can be shortened by reading once a SSC register before entering the power-down mode. After this SSC register access operation the power-down current will be reduced to a value close to 50µA. Problem 2: P1.2 / P1.4 Pullup Transistor Resistance The value for the pull-up transisitor at P1.2 and P1.4 (when used as SSC clock/data output in push-pull mode) is increased to 170 Ω. Problem 3: Additional I PL DC Specification The following specification item will be added to the DC characteristics : Maximum output low current per port : max. 30 ma Problem 4: Supply Voltage and Ambient Temperature for AC Characteristics of the Programming Interface The test conditions of the supply voltage and the ambient temperature for the programming interface characteristics are restricted to the following values : V CC = 5V ± 10% ; T A = 25 C ± 10 C Errata Sheet SAB-C513A-H, BA, 1.3-4/5-

5 Functional Problem No. Marking Description Remarks 1 ES-BA XRAM area FF00H to FF7FH is not accessible using DPTR 2 ES-BA Port 0 disturbed during XRAM accesses 3 ES-BA Wrong destination address at AJMP and ACALL instructions Table 1: History of Functional Problems Electrical- / Timing- Problem No. Marking Description Remarks 1 ES-BA Inreased power down mode current 2 ES-BA P1.2 / P1.4 Pullup Transistor Resistance 3 ES-BA Additional I PL DC Specification 4 ES-BA Supply Voltage and Ambient Temperature for AC Characteristics of the Programming Interface Table 2: History of Electrical- and Timing-Spec. Deviations Errata Sheet SAB-C513A-H, BA, 1.3-5/5-