TRS2001EN-0001 / TRS2001EM Gigabit/s SFP+ Transceiver

Transcription

1 Technical Data (May 21 st, 2010) TRS2001EN-0001 / TRS2001EM Gigabit/s SFP+ Transceiver TRS2001Ex-0001: 10GBASE-SR&SW Transceiver in 10 Gigabit Ethernet FEATURES SFF-8431 Compliant SFI Electrical Interface Hot Z-Pluggable LC-Duplex Optical Receptacle I2C Support PIN Photo-detector Two R Transceiver: Reamplify and Reshape Operating Case Temperature: TRS2001EN-0001: 0 to 70 C TRS2001EM-0001: -5 to 85 C Maximum Power Dissipation 1W under all operating conditions Compliant to pertinent IEEE 802.3ae 10GBASE-SR&SW 10GbE transmission rate RoHS 6 compliant SFF-8432 Compliant Technique #2 Latch Mechanism REFERENCE The following interface standards are relevant to SFP+ Specifications. 1) SFF-8431 Enhanced 8.5 and 10 Gigabit Small Form Factor Pluggable Module (SFP+) 2) SFF Improved Pluggable Form factor 3) SFF mm SFP+ Card Edge Connector Dimensioning 4) SFF Diagnostic Monitoring Interface for Optical Xcvrs (Rev. 9.6) 5) INF-8074i - SFP (Small Form Factor) Transceiver 6) IEEE802.3ae CL 52 - IEEE Standard (10Gigabit Ethernet Clause) 7) MIL-STD-883, Method ) JESD22-A114-A (HBM) 9) IEC (Air Discharge) DESCRIPTION General Opnext s Enhanced 10Gigabit Small Form Factor Pluggable Module SFP+ TRS2001Ex-0001 is a hot pluggable transceiver module in the Z-direction that is usable in typical router line card applications, Storage, IP network and LAN and compliant to SFP+ MSA. The maximum transmission length of TRS2001Ex-0001 is defined from 26m to 300m, depending on multimode fiber types. The TRS2001Ex-0001 is an integrated 10 Gigabit Ethernet (10GbE) optical transceiver module that consists of a 850 nm wavelength VCSEL optical transmitter and receiver. Mechanical dimensions, connecters and footprint of TRS2001Ex-0001 conform to SFP+ MSA. The module size is 56.5mm L x 13.9mm W x 11.85mm H with 20-pin electrical connector. The maximum power consumption is 1.0 W and power supply voltage is +3.3 V. This document may contain technologies regulated by law [ECCN: 5E001.c.1, 5E001.c.2.d, 5E991 as of April 2005]. In the case of the export of product(s) and/or technologies described in this document, please take the appropriate procedure in conforming to all regulations related to the export.

2 Block Diagram VccT/VccR VeeT/VeeR 3.3V Hot Swap Control Signal GND RD+/RD- TD+/TD- Limiting Amp. Driver PDM LDM LC-Duplex Connector TX_Disable 10kΩ APC TX_Fault RX_LOS SDA SCL Mod_ABS RS0 RS1 30kΩ 30kΩ DOM Address : A2 NVR Address: Transceiver Managem ent Temp sensor Electrical I/F (20 pin) Functional Description (1) SFI Data Interface Case (Frame GND) * Signal ground is isolated from module case. Figure 1: Schematic diagram of the transceiver O ptical I/F ASIC / Host SerDes SFP+ Module 100Ω D C' C 100nF 100nF 50Ω Amp / ROSA 50Ω Connector A B' B 100nF 100nF 50Ω 100Ω LD Driver / TOSA 50Ω Figure 2: Interface to Host 1

3 Table 1: SFP+ Module Transmitter Electrical Characteristics at B' B Symbol Conditions Min. Typ. Max. Units Eye Mask X UI Eye Mask X UI Eye Mask Y mv Eye Mask Y mv Figure 3: Eye Mask at B' Table 2: SFP+ Module Receiver Electrical Characteristics at C C Symbol Conditions Min. Typ. Max. Units Eye Mask X UI Eye Mask Y mv Eye Mask Y mv Figure 4: SFP+ Eye Mask at C' 2

4 (2) Low Speed Control Pins TX_Fault TX_Disable Mod_ABS RX_LOS Table 3: Low Speed Control Pin Logic Levels Parameter Symbol Min. Max. Unit Conditions Host VCC Range Host_VCC V with ± 5% variation TX_Fault, VOL V Note 1 RX_LOS VIL Host_VCC 0.5 Host_VCC V Note 1 TX_Disable VIL V Pulled up with 10k VIH 2.0 VCCT V ohms to VccT in the module. Note1. Rpullup (R p) is the pull up resistor. Active bus termination may be used by the host in place of a pullup resistor. Pull ups can be connected to multiple power supplies, however the host board design shall ensure that no module pin has voltage exceeding module. Measured at the Host side of the connector. TX_Fault is a module output pin that when High, indicates that the module transmitter has detected a fault condition related to laser operation or safety. The TX_Fault output pin is an open drain/collector and must be pulled up to the Host_Vcc with 4.7k-10kΩ on the host board TX_Disable is a module input pin. When TX_Disable is asserted High or left open, the SFP+ module transmitter output must be turned off. The TX_Disable pin is pulled up to VccT with 10kΩ in the SFP+ module. Mod_ABS is pulled up to Host_Vcc with 4.7k-10kΩ on the host board and connected to VeeT or VeeR in the SFP+ module. Mod_ABS is then asserted High when the SFP+ module is physically absent from a host slot. In the SFP MSA (INF8074i) this pin had the same function but is called MOD_DEF0. RX_LOS when high indicates an optical signal level below that specified in the relevant standard. The RX_LOS pin is an open drain/collector output and must be pulled up to host Vcc with a 4.7k-10kΩ on the host board. RX_LOS assert min and de-assert max are defined in the relevant standard. (3) 2 Wire Interface I2C: SDA & SCL SCL is the 2-wire interface clock and SDA is the 2-wire interface data line. SCL and SDA are pulled up with a voltage in the range of 3.14 V to 3.47 V on the host. SFP+ low speed interface is based on 2-wire interface. SFP+ 2-Wire interface is based on Low Voltage TTL (LVTTL) operating with a supply of 3.3V ±5% and are given in Table 4. This specification ensures compatibility between host masters and SFP+ SCL/SDA lines and compatibility with I2C. All voltages are referenced to VeeT. Note: After an interruption in protocol, power loss or system reset, the 2 wire part can be reset by following these steps: 1. Clock up to 9 cycles. 2. Look for SDA high in each cycle while SCL is high. 3. Create a start condition. 3

5 Table 4: 2 Wire Interface Physical Interface Parameter Symbol Min. Max. Unit Conditions Host VCC Range Host_VCC V SCL and SDA SCL and SDA Input Current on SCL and SDA pins Capacitance on SCL and SDA pins Total bus capacitance for SCL and SDA VOL V VOH Host_VCC 0.5 Host_VCC V VIL -0.3 VCCT * 0.3 V VIH VCCT * 0.7 VCCT V IL µa Ci 2-14 pf Cb pf pf Rpullup 1 pulled to Host_VCC. IOL(max) = 3mA Rpullup 1 pulled to Host_VCC. At 400 khz, Rp (max) = 3.0 kω At 100 khz, Rp (max) = 8.0 kω At 400 khz, Rp (max) = 1.1 kω At 100 khz, Rp (max) = 2.75 kω 1. Rpullup (Rp) is the pull up resistor. Active bus termination may be used by the host in place of a pullup resistor. Pull ups can be connected to multiple power supplies, however the host board design shall ensure that no module pin has voltage exceeding module. Measured at the Host side of the connector. VccT/R V nor requires the module to sink more than 3.0mA current. 2. C i is the capacitance looking into the module SCL and SDA pins 3. C b is the total bus capacitance on the SCL or SDA bus. Host Host_Vcc Rp SDA SFP+ Module Cb Ci Host_Vcc Rp SCL Cb Ci Figure 5: 2 Wire Interface Physical Interface 4

6 Table 5: SFP+ 2 Wire Interface Timing Requirements Parameter Symbol Min. Max. Unit Conditions Clock Frequency fscl khz Clock Pulse Width Low tlow µs Clock Pulse Width High thigh µs Time bus free before new tbuf 20 - µs Between STOP and START transaction can start START Hold time thd,sta µs START Set-Up time tsu,sta µs Data in Hold time thd,dat 0 - µs Data in Set-Up time tsu,dat µs Input Rise time (100 khz) tr, ns Note 1 Input Rise time (400 khz) tr, ns Note 1 Input Fall time (100 khz) tf, ns Note 1 Input Fall time (400 khz) tf, ns Note 1 STOP Set-Up time tsu,sto µs Serial Interface Clock T_clock_ µs Maximum time the SFP+ may Holdoff Clock Stretching hold hold the SCL line low before continuing R or W operation Complete Single or twr - 40 ms Complete (up to) 8 Byte Write Sequential Write Endurance (Write Cycles) 10 k - Max Operating Temperature Note1: From (VIL,MAX 0.15) to (VIH,MIN ) t HIGH t R t F SCL t Low SDA In t HD,STA t SU,STA t HD,DAT t R t SU,DAT t SU,STO t F START ReSTART STOP SDA Out Figure 6: SFP+ Timing Diagram 5

7 (4) SFP+ Module Timing In the below figures are shown the required timing for TX_Fault and TX_Disable in various conditions. For more detail, please refer to SFF Table 6: SFP+ Timing Requirements Parameter Symbol Min Max Unit Conditions TX_Disable assert time t_off - 10 µs Rising edge of TX_Disable to fall of output signal below 10% of nominal. TX_Disable negate time t_on - 2 ms Falling edge of TX_Disable to rise of output signal above 90% of nominal. This only applies in normal operation, not during start up or fault recovery. Time to initialize t_start_up ms From power supplies meeting table9 or hot plug or TX_Disable negated during power up, or TX_fault recovery, until the SFP+ is fully operational. TX_fault assert TX_fault_on - 1 ms From occurrence of fault to assertion of TX_Fault TX_fault_Reset t_reset 10 - µs Time TX_Disable must be held high to reset TX_Fault. RX_LOS assert delay t_los_on µs From occurrence of loss of signal to assertion of RX_LOS. RX_LOS negate delay t_los_off µs From occurrence of presence of signal to negation of RX_LOS. t_start_up Figure 7: Initialization with TX-Disable Negated Figure 8: Initialization with TX-Disable Asserted 6

8 t_start_up Figure 9: Hot Plug Insertion with TX-Disable Negated Figure 10: SFP+ Response to TX_Disable TX_fault_on Figure 11: SFP+ Response to Transmitter Safety Fault 7

9 t_start_up Figure 12: Successful recovery from transient safety fault condition TX fault on t_start_up Figure 13: Unsuccessful recovery from safety fault condition LVTTL-High LVTTL-Low - 30 dbm ave. LOS assert min. 0.5dB Hysteresis min dbm ave. LOS De-assert max. Optical input power (dbm ave.) Figure 14: Rx LOS assert and De-assert 8

10 (5) Reset Function No reset function in the SFP+ module. (6) Maximum Current Ramp on Power supply In the below figure and table are shown the required inrush current characteristics for the module power pins. Table 7: Inrush Current Parameter Symbol Min. Max. Unit Remarks Icc peak Icc_peak ma V CC T, V CC R Icc ramp rate Icc/ t - 50 ma/ms V CC T, V CC R this slope cannot be exceeded Icc_peak(330 m A ) Icc Icc/ t T=0(Initial C urrent D raw ) Figure 15: Inrush current transitional characteristics 9

11 PERFORMANCE SPECIFICATIONS Absolute Maximum Ratings Stresses in excess of the Absolute Maximum Ratings can cause permanent damage to the transceiver. Table 8: Absolute Maximum Ratings No. Parameter Symbol Min. Max. Unit Remarks 1 Supply Voltage V CC T V +3.3V 2 Supply Voltage V CC R V +3.3V 3 Optical Receiver Input P IMAX - 0 dbm Average 4 Operating Case Temperature Tc C TRS2001EN C TRS2001EM Storage Temperature T STR C 6 ESD SFI pins ESD1-1 kv HBM 7 ESD except for SFI pins ESD2-2 kv HBM Operating Environment Electrical and optical characteristics below are defined under this operating environment, unless otherwise specified. Table 9: Operating Environment No. Parameter Symbol Min. Typ Max Unit Remarks 1 Supply Voltage V CC T V +3.3V 2 Supply Voltage V CC R V +3.3V 3 Operating Case C TRS2001EN-0001 T Temperature C C TRS2001EM-0001 Electrical Performance Table 10: Power Supply Characteristics No. Parameter Symbol Min. Typ. Max. Unit Remarks 1 Supply Voltage V CCT V 2 Supply Voltage V CCR V 3 Supply Current I CC ma Note 1 4 Power Consumption P DS W Note 1 Note1: Over all operating conditions. 10

12 Optical Interface Characteristics Table 11.1 Optical Characteristics (Note1) No. Parameter Symbol Min. Typ. Max. Unit Remarks 1 Signaling speed (nominal) f D Gbit/s 2 Signal speed variation from nominal f D ppm 3 Center Wavelength λ C nm 4 Maximum RMS spectral width λ rms Table Average launch power Po Note 3 dbm min. is informative 6 Minimum Launch power in OMA OMA Table 11.2 Note 2 7 Off Transmit Power P off dbm Average 8 Extinction Ratio E r db 9 RIN 12 OMA RIN db/hz Note 2 10 Optical Return Loss Tolerance R Ltol db 11 Transmitter eye mask Figure Transmitter and dispersion penalty db 13 Receiver Overload P ro dbm Average 14 Receiver Sensitivity in OMA P rav dbm Informative 15 Stressed Receiver OMA rmin dbm Note 2 Sensitivity in OMA 16 Receiver Reflectance R L db Note 1: Data Rate; NRZ at Gbit/s (10GBASE-SR), Mark Ratio 50%, PRBS=2 31-1, 1x10-12 BER Note 2: OMA=10log 10 [2P{(A-1)/(A+1)}], A = 10 (Er/10), P = 10 (Pf/10) Note 3: Maximum average power: within Laser Class1 power limit (depending on VCSEL wavelength with a maximum -1.0dBm) Table 11.2 Minimum OMA (dbm) as function of center wavelength and RMS spectral width Center wavelength RMS Spectral width (nm) (nm) Up to to to to to to to to to to to to to to to to to to to

13 Table 11.3 Operating Range According to Fiber Type Fiber Type Minimum modal 850 nm (MHz km) Operating Range (meters) 62.5 µm MMF 50 µm MMF to to to to to Logic 1 Level Normalized Amplitude Logic 0 Level Time (U.I.) Figure 16: Transmitter eye mask 12

14 Table 12: Pin Description Power Pin Logic Symbol Sequence Name/Description Notes Order 1 VeeT 1 st Module Transmitter Ground 1 2 LVTTL-O TX_Fault 3 rd Module Transmitter Fault 2 3 LVTTL-I TX_Disable 3 rd Transmitter Disable; Turn off laser output 3 4 LVTTL-I/O SDA 3 rd 2-Wire Serial Interface Data Line 4 5 LVTTL-I/O SCL 3 rd 2-Wire Serial Interface Clock 4 Module Absent, connected to VeeT or VeeR 6 Mod_ABS 3 rd in the module 5 7 LVTTL-I RS0 3 rd NA. 8 LVTTL-O RX_LOS 3 rd Receiver Loss of Signal Indicator 2 9 LVTTL-I RS1 3 rd NA. 10 VeeR 1 st Module Receiver Ground 1 11 VeeR 1 st Module Receiver Ground 1 12 CML-O RD- 3 rd Receiver Inverted Data Output (SFI) 13 CML-O RD+ 3 rd Receiver Non-Inverted Data Output (SFI) 14 VeeR 1 st Module Receiver Ground 1 15 VccR 2 nd Module Receiver 3.3V Supply 6 16 VccT 2 nd Module Transmitter 3.3V Supply 6 17 VeeT 1 st Module Transmitter Ground 1 18 CML-I TD+ 3 rd Transmitter Non-Inverted Data Output (SFI) 19 CML-I TD- 3 rd Transmitter Inverted Data Output (SFI) 20 VeeT 1 st Module Transmitter Ground 1 1. The module signal ground pins, VeeR and VeeT, are isolated from the module case. 2. This pin is an open drain output pin and shall be pulled up with 4.7k-10kohms to Host_Vcc (Table3) on the host board. Pull ups can be connected to multiple power supplies, however the host board design shall ensure that no module pin has voltage exceeding module VccT/R V. 3. This pin is an open drain input pin and is pulled up with 10kohms to VccT in the module. 4. See Wire Electrical Specifications. 5. This pin shall be pulled up with 4.7k-10kohms to Host_Vcc on the host board. 6. VccT and VccR are tied together inside the module. 13

15 Mechanical Comply to SFF-8432, the improved Pluggable form factor specification, with technique #2 latch. Comply to optional operational mechanical shock test in issue 2 of GR468. Optical Connector LC connector Laser Safety This is a Class 1 Laser Product according to IEC :1993:+A1:1997+A2:2001. This product complies with 21 CFR and except for deviations pursuant to Laser Notice No. 50, dated (July 26, 2001) RoHS RoHS-6 compliant. 14

16 Mechanical Dimensions and label location Side view Color code: Beige (SR) Top view Side view Bottom view Label design (Product label) 15

17 Memory map NVR: Address SFP+ Serial ID Configuration Data Product name: n00 Serial ID EEPROM Table Verification result: PASS Byte Address Serial ID Section ($) Content Content (Dec) (Hex) I2C Addr (Hex) (Dec/Bin) Item Description Identifier SFP Extended identifier Serial ID defined Connector type LC Transceiver application supported A B 6 6 Encoding 64B66B Nominal bit rate (unit: 12 0C M bps) Mbps Rate selection 13 0D 0 0 functioanality (SFP+) None 14 0E F E F E A 2C B C Link length supported for 9/125um fiber in Km Link length supported for 9/125um fiber in 100m Link length supported for 50/125um fiber in 10m Link length supported for 62.5/125um fiber in 10m Link length supported for copper in meters Link length supproted for OM3 50um in in 10m Vendor name 9/125 SM fiber not supported 9/125 SM fiber not supported 82m 33m Copper not supported 300 m OPNEXT, INC.

18 29 1D 4E E F 2E Undefined B A B C D E F E D D Vendor IEEE company ID Vendor part number 000B40 TRS2001EN-0001-W D Revision number M1 58 3A B C D Wavelength 850nm 62 3E 0 0 Reserved Reserved 63 3F Checksum Verified ok A A B C D E Implemented options Maximum bit rate margin Minimum bit rate margin Vendor serial number TX_DISABLE; TX_FAULT implemented; LOS implemented; % %

19 79 4F A B Date code / / Lot number 92 5C DD monitoring type Enhanced software options Diagnostic implemented: Int calibration; RX power in Average; Alm/Warn thresholds; Tx-Fault monitoring; LOS monitoring; 93 5D B0 176 SFF E 3 3 Compliant to Ver9.6 compliance 95 5F Checksum Verified ok 18

20 Document number: OPP-DST Document Category: Product Specifications (Data Sheet) Serial number OPP-DST-1001 Revision: 1.2 (May 21, 2010) Product Name: SFP+ Transceiver: TRS2001Ex-0001 USER INFORMATION Handling Precaution CAUTION: Take proper electrostatic-discharge (ESD) precautions which handling these device. These devices are sensitive to ESD Laser Safety This product complies with IEC Class 1. Because of size constraints, laser safety labeling is not affixed to the module but is attached to the outside of the shipping box ORDERING INFORMATION TRS E x - x x x x - x Item Parameter Symbol (1) (2) (3) (4) (5) Product Name (6) Product Code (Function) E: 10GbE data rate (7) Temperature Range N: 0 to 70 C M: -5 to 85 C (8) Hardware customized code S: Standard (9) Customer code1 0: General (10) Customer code2 0: Standard (11) Revision n: Revision number (12) Product Code (1) (2) (3) (4) (5) (6) (7) (8) (9) (10)(11) (12) TRS2001: 850 nm direct modulation VCSEL (uncooled) / PIN transceiver for 10Gigabit Ethernet 10GBASE-SR&SW application W: Working Sample Null: Mass Production Product Sample Categories and Disclaimer There are 2 categories of samples. However, an executed CAS (Customer Approved Specifications) can always override conformance as defined below. Functional sample that has the suffix of -F or -Fn to the product number is a sample that is designed according to the customer s request. The purpose of this sample is to check and confirm the product feasibility. Thus the sample may be an R&D prototype or may be a modified current product. This sample may not be manufactured in qualified production lines nor using qualified parts. Basically Opnext guarantees the requested performance of BOL (Beginning Of Life). Any qualification will not be applied. Working sample that has the suffix of -W or -Wn to the product number is a sample to evaluate, confirm and finalize the product specifications. Basically Opnext guarantees the performance of BOL (Beginning Of Life). Not all qualifications may be completed. This sample may not be manufactured in qualified production lines nor be using qualified components. Until Opnext Inc. releases the products for general sales, Opnext Inc. reserves the right to change prices, features, functions, specifications, capabilities and release schedule. 19

21 Revision History Rev. Date Page/Fig/Table Modification Note 1.0 Feb 04th, 10 - New release for 2 nd generation product 1.1 Mar 30 th, 10 Ordering Info. Corrected PN to TRS2001* 1.2 May 21 st, 10 Grammatical fixes 20