Real Time Clock Module with I2C Bus

Transcription

1 Moisture Seitivity Level: MSL=1 FEATURES: APPLICATIONS: With state-of-the-art RTC Technology by Micro Crystal AG Wide range in communication & measuring equipment RTC module with built-in crystal oscillating at khz Commercial & Industrial applicatio 1 MHz Fast-mode Plus (Fm+) two-wire I2C interface Automotive electronics applicatio Wide Interface operating voltage: 1.6 Wireless communicatio Wide clock operating voltage: 1.2 PDA and Palm Pilots Ultra low power coumption: / 25 Credit Cards with Security Technology Provides year, month, day, weekday, hours, minutes, seconds Freely programmable Alarm and Timer functio with interrupt capability Low voltage detector, internal power on reset Battery backup input pin and switch-over circuit INT_1 can be programmed either as interrupt or clock output (open-drain) Programmable clock output for peripheral devices ( khz, khz, 8192 Hz, 496 Hz, 124 Hz, 32 Hz and 1 Hz) Programmable offset register for frequency adjustment I2C slave address: read D1h, write Dh Small and compact package size:. RoHS-compliant and 1% leadfree STANDARD SPECIFICATIONS: Absolute Maximum Ratings Supply oltage (DD) Battery Supply voltage (BACKUP) Input oltage (I) Output oltage (O) Supply (IDD) - + DC Input (II) DC Output (IO) Operating Temperature Range (T OPR) ºC Storage Temperature (T STO) ºC Frequency Accuracy ( F/F) ±1 ±2 ppm Frequency vs oltage ( F/) ±.8 ±1.5 ppm/ TAMB=+25; DD=3. TAMB=+25; DD=1.8~ TREF=+25; DD=3. Stored as bare product Frequency Characteristics Frequency vs Temperature ( F/TOPR) Turnover Temperature (T O) -.35ppm/2 (TOPR-TO)2 ±1% Aging (first year) Oscillator Start-up Time (TSTART) -3 CLKOUT duty cycle 4 ppm 3 +3 ppm ms 6 % TAMB=+25 TAMB=+25 TAMB=+25 isit for Terms & Conditio of Sale

2 Static Characteristics DD = 1.2 to ; SS = ; TAMB = -4 to +85; fosc = khz; unless otherwise specified Supply oltage (DD) Slew Rate (SR) Battery Supply oltage (BACKUP) Coumption (IDD) I2C bus active Coumption (IDDO) 1) Coumption (IDDO) 1) Coumption (IDD32k) 2) For clock data integrity I2C bus inactive I2C bus active Power management function active Of DD Power management function active fscl=1khz DD = 3. fscl=1khz DD = ±.5 /ms DD = DD = 2. to 5. BACKUP or DD = 3. BACKUP or DD = 2. to 5. Battery Leakage (IL(bat)) DD active; BACKUP =3. 12 DD = 3. Coumption (IDD32k) 2) 36 1 I2C bus inactive (fscl=hz) CLKOUT disabled Power management fct. disabled (PM[2:] = 111) Tamb= +25 I2C bus inactive (fscl=hz) CLKOUT disabled Power management fct. disabled (PM[2:] = 111) Tamb= -4 ~ +85 I2C bus inactive (fscl=hz) CLKOUT enabled (32.768kHz) Power management fct. enabled (PM[2:] = ) Tamb= +25 I2C bus inactive (fscl=hz) CLKOUT enabled (32.768kHz) Power management fct. enabled (PM[2:] = ) Tamb= -4 ~ +85 isit for Terms & Conditio of Sale

3 (Continued) DD = 1.2 to ; SS = ; TAMB = -4 to +85; fosc = khz; unless otherwise specified %DD Power Management Battery Switch Threshold oltage (th(sw)bat) 3) Inputs LOW Level Input oltage (IL) HIGH Level Input oltage (IH) Input oltage (I) Input Leakage (IL) Input Capacitance (CI) 7%DD I = DD or SS Post ESD Event DD pf + SS.4 4) Outputs Output oltage (O) On pin INT_1, INT_2, CLKOUT, SDA (refers to ext. pull-up voltage) LOW Level Output oltage (OL) Output sink current; LOW Level Output (IOL) 5) Output Leakage (ILO) On pin INT_1, INT_2, CLKOUT OL=.4; DD=5. On pin SDA OL=.4; DD=3. O = DD or SS Post ESD Event ) Timer source clock = 1/36 Hz, level of pi SCL and SDA is SS or DD. 2) When the device is supplied via the BACKUP pin itead of the DD pin, the current values for IBACKUP will be as specified for IDD under the same conditio. 3) The I2C bus is 5 tolerant. 4) Implicit by design. 5) Tested on sample basis. isit for Terms & Conditio of Sale

4 I2C Interface Dynamic Characteristics Symbol Standard Mode Fast Mode (FM) Fast Mode Plus (FM+) 1) Pin SCL SCL clock frequency 2) fscl khz LOW period of SCL clock tlow HIGH period of SCL clock thigh Data setup time tsu;dat 2 1 Data hold time thd;dat tbuf Setup time for STOP condition tsu;sto Hold time (repeated) START condition thd;sta tsu;sta Pin SDA Pin SCL and SDA Bus free time between STOP and START condition Setup time for repeated START condition Rise time of both SDA and SCL signals Fall time of both SDA and SCL signals 3) 4) 3) 4) Capacitive load for each bus line Data valid acknowledge time Data valid time 5) 6) Pulse width of spikes that must be suppressed by the input filter 7) tr Cb 3 12 tf Cb 3 12 Cb pf td;ack td;dat tsp 1) Fast mode plus guaranteed at 3. < DD <. 2) The minimum SCL clock frequency is limited by the bus time-out feature, which resets the serial bus interface if either the SDA or SCL is held LOW for a minimum of 25 ms. The bus time-out feature must be disabled for DC operation. 3) A master device must internally provide a hold time of at least 3 for the SDA signal (refer to the IL of the SCL signal) in order to bridge the undefined region of the falling edge of SCL. 4) The maximum tf for the SDA and SCL bus lines is 3. The maximum fall time for the SDA output stage, tf is 2. This allows series protection resistors to be connected between the SDA pin, the SCL pin and the SDA/SCL bus lines without exceeding the maximum t f. 5) td;ack = time for acknowledgement signal from SCL LOW to SDA output LOW. 6) td;dat = minimum time for valid SDA output following SCL LOW. 7) Input filters on the SDA and SCL inputs suppress noise spikes of less than. I2C Interface Timing Characteristics isit for Terms & Conditio of Sale

5 PART IDENTIFICATIONS: AB-RTCMC khz-b5ze-s3packaging Blank: Bulk T: 1pcs/reel OUTLINE DIMENSIONS: Recommended Land Pattern Dimeio: mm PIN DESCRIPTIONS: Pin No. Pin Name 1 DD Power Supply oltage 2 INT_1 Interrupt _1 Output pin 3 SCL Serial Clock Input pin 4 SDA Serial Data Input-Output pin 5 CLKOUT Clock Output pin; push-pull 6 INT_2 7 SS 8 BACKUP 9 N.C. Not Connected 1 N.C. Not Connected Function Interrupt _2 Output pin Ground Backup Supply oltage isit for Terms & Conditio of Sale

6 BLOCK DIAGRAM: RECOMMENDED REFLOW PROFILE: Maximum Reflow Conditio in accordance with IPC/JEDEC J-STD-2C -free Temperature Conditio Average Ramp-up Rate (TSmax to TP) 3/second max /s Ramp Down Rate (Tcool) 6/second max /s 8 minutes max m Temperature Min (TSmin) 1 Temperature Max (TSmax) 2 Time Tsmin to Tsmax (ts) 6 ~ 18 sec Time 25 to Peak Temperature (T to-peak) Preheat Time Above Liquidus Temperature Liquidus (TL) Time above Liquidus (tl) ~1 sec Peak Temperature Peak Temperature (TP) Time within 5 of Peak Temperature (tp) 26 2 ~ 4 sec isit for Terms & Conditio of Sale

7 TAPE & REEL: T = 1pcs/reel Dimeion : mm Dimeion: mm ATTENTION: Abracon Corporation s products are COTS Commercial-Off-The-Shelf products; suitable for Commercial, Industrial and, where designated, Automotive Applicatio. Abracon s products are not specifically designed for Military, Aviation, Aerospace, Life-dependant Medical applicatio or any application requiring high reliability where component failure could result in loss of life and/or property. For applicatio requiring high reliability and/or presenting an extreme operating environment, written coent and authorization from Abracon Corporation is required. Please contact Abracon Corporation for more information. isit for Terms & Conditio of Sale