series FUJI PROGRAMMABLE CONTROLLER USER S MANUAL BUILT-IN HIGH-SPEED COUNTER FEH404

Transcription

1 series FUJI PROGRAMMABLE CONTROLLER USER S MANUAL BUILT-IN HIGH-SPEED COUNTER FEH404

2 Preface Thank you very much for purchasing the Fuji MICREX-SX SPB Series Programmable Controller. To ensure correct operation, please carefully read and fully understand this manual before using the product. This manual explains the built-in high-speed counter of the MICREX-SX SPB series programmable controller. In addition to this manual, the following manuals on programming tool are available. Please ask a nearest dealer for the appropriate manuals and read them as required. Title User s Manual <Instruction>, MICREX- SX Series SPB User s Manual <Hardware>, MICREX-SX Series SPB User s Manual <Handy Program Loader>, MICREX-SX Series SPB User s Manual <Personal Computer Loader>, MICREX-SX Series SPB T ype Manual No. Contents FEH400 Describes the instructions available with the SPB. FEH401 Describes the MICREX-SX SPB Series hardware. NW0H-N FEH402 Describes how to use the handy program loader. NN4NWN-SS3E FEH403 Describes how to use the personal computer loader. Notes 1. This manual may not be reproduced in whole or part in any form without prior written approval by the manufacturer. 2. The contents of this manual (including specifications) are subject to change without prior notice. 3. If you find any ambiguous or incorrect descriptions in this manual, please write them down (along with the manual No. shown on the cover) and contact FUJI.

3 Safety Precautions Before mounting, wiring, operation, maintenance and inspection of the device, be sure to read the operating instructions carefully to ensure operation. Here, the safety precaution items are classified into Warning and Caution : Warning : Incorrect handling of the device may result in death or injury. Caution : Incorrect handling of the device may result in minor injury or physical damage. Even some items indicated by Caution may also result in a serious accident. The general safety precautions are described below. Individual precautions are given where necessary, with the above symbols. Caution Never touch any part of charged circuits as terminals and exposed metal portion while the power is turned ON. It may result in an electric shock to the operator. Turn OFF the power before mounting, dismounting, wiring, maintaining or checking, otherwise, electric shock, erratic operation or troubles might occur. Place the emergency stop circuit, interlock circuit or the like for safety outside the PC. A failure of PC might break or cause problems to the machine. Do not connect in reverse polarity, charge (except rechargeable ones), disassemble, heat, throw in fire or short-circuit the batteries, otherwise, they might burst or take fire. If batteries have any deformation, spilled fluids, or other abnormality, do not use them. The use of such batteries might cause explosion or firing.

4 Safety Precautions Caution Do not use one found damaged or deformed when unpacked, otherwise, failure or erratic operation might be caused. Do not shock the product by dropping or tipping it over, otherwise, it might be damaged or troubled. Follow the directions of the operating instructions when mounting the product. If mounting is improper, the product might drop or develop problems or erratic operations. Use the rated voltage and current mentioned in the operating instructions and manual. Use beyond the rated values might cause fire, erratic operation or failure. Operate (keep) in the environment specified in the operating instructions and manual. High temperature, high humidity, condensation, dust, corrosive gases, oil, organic solvents, excessive vibration or shock might cause electric shock, fire, erratic operation or failure. Select a wire size to suit the applied voltage and carrying current. Tighten the wire terminals to the specified torque. Inappropriate wiring or tightening might cause fire, malfunction, failure, or might cause the product to drop from its mounting. Contaminants, wiring chips, iron powder or other foreign matter must not enter the device when installing it, otherwise, erratic operation or failure might occur. Remove the dust-cover seals of units after wiring, otherwise, fire, accidents, failure or fault might occur. Connect the ground terminal to the ground, otherwise, an erratic operation might occur. Periodically make sure the terminal screws and mounting screws are securely tightened. Operation at a loosened status might cause fire or erratic operation. Put the furnished connector covers on unused connectors, otherwise, failure or erratic operation might occur. Sufficiently make sure of safety before program change, forced output, starting, stopping or anything else during a run. The wrong operation might break or cause machine problems. Engage the loader connector in a correct orientation, otherwise, an erratic operation might occur. Before touching the PC, discharge any static electricity that may have been collected on your body. To discharge it, touch a grounded metallic object. Static electricity might cause erratic operation or failure of the module. Be sure to install the electrical wiring correctly and securely, observing the operating instructions and manual. Wrong or loose wiring might cause fire, accidents, or failure. Do not attempt to change system configurations (such as installing or removing expansion block) while the power is ON, otherwise, failure or erratic operation might occur. Do not attempt to repair the module by yourself -- contact your Fuji Electric agent. When replacing the batteries, correctly and securely connect the battery connectors, otherwise, fire, accidents or failure might occur. To clean the module, turn power off and wipe the module with a cloth moistened with warm water. Do not use thinner or other organic solvents, as the module surface might become deformed or discolored. Do not remodel or disassemble the product, otherwise, a failure might occur. Follow the regulations of industrial wastes when the device is to be discarded. The modules covered in these operating instructions have not been designed or manufactured for use in equipment or systems which, in the event of failure, can lead to loss of human life. If you intend to use the modules covered in these operating instructions for special applications, such as for nuclear energy control, aerospace, medical, or transportation, please consult your Fuji Electric agent. Be sure to provide protective measures when using the module covered in these operating instructions in equipment which, in the event of failure, may lead to loss of human life or other grave results. External power supply (such as 24V DC power supply) which is connected to DC I/O should be strongly isolated from AC Power supply.

5 Revision * Manual No. is shown at lower right on the cover. P rinted on * Manual No. Revision contents July 2001 FEH404 First edition

6 Contents Preface Safety Precautions Revision Contents Page Section 1 Overview Overview Notes on use Section 2 Specifications High-speed counter input specifications Operation of the High-speed Counter Single-phase mode Two-phase mode Auto reset function Resetting the current value Presetting the current counter value Setting comparison value Match interrupt Timing chart Single-phase mode Two-phase mode Section 3 Internal Register Specifications Address map Status of internal registers at power failure or after stop/start Detail explanation of the registers Parameter area Internal register area Internal block diagram Section 4 External Connection Diagram External connection diagram Section 5 Example of Program Example of single-phase counter Example of two-phase counter

7 Section 1 Overview Page 1-1 Overview (1) Number of counters that can be incorporated (2) Counting speed (3) Count range (4) Resetting (5) Presetting (6) Automatic resetting (7) Interrupt (8) Multiplication Notes on use

8 Overview Section 1 Overview 1-1 Overview The basic unit of the Fuji MICREX-SX Programmable Controller SPB Series is equipped with a built-in high-speed counter as a standard feature. The SPB Series programmable controller boasts the following functions and performance characteristics: (1) Number of counters that can be incorporated The counter can have two channels for single-phase pulse inputs or one channel for two-phase pulse inputs. In which mode to use the counter is set by parameter. (2) Counting speed Counting speed is maximum 100 khz in single-phase mode; maximum 50 khz in two-phase mode. The counter always operates without filtering (at highest speed), ignoring the input filtering time that is set by parameter. (3) Count range Single-phase mode: Unsigned 16-bit binary incremental counter (H0000 to HFFFF) Two-phase mode: Signed 32-bit binary incremental/decremental counter (H to H7FFFFFFF) Counter value is updated at program scan end. (4) Resetting The current counter value can be cleared to zero by external signal or by internal register. (5) Presetting The current counter value can be preset by user program before counting is started. (6) Automatic resetting This function is enabled only in single-phase mode. This function is used to set an arbitrary upper limit on counter value. (7) Interrupt For each channel, one interrupt program can be started when the current counter value becomes equal to the comparison register value. This enables high-speed response. (8) Multiplication This function determines how many times to count during a single pulse cycle. Single-phase mode: x1, x2 Two-phase mode: x2, x4 1-2 Notes on use (1) The initial value (default) of the parameter is Not use the high-speed counter. (2) When the parameter is set to Not use the high-speed counter, the setting of related internal registers does not take effect. (3) Since the input circuit of the high-speed counter is designed for fast response and is susceptible to external noise that rides through the input cable, take particular care with wiring for inputs to the counter, for example, making the cable length as short as possible or keeping the cable away from noise sources. 1-1

9 Section 2 Specifications Page 2-1 High-speed counter input specifications (1) Input specifications (2) Functions of input terminals (3) Internal input circuit Operation of the High-speed Counter Single-phase mode (1) Single-phase, single multiplication (x1) counting (2) Single-phase double multiplication (x2) counting Two-phase mode (1) Pulse + direction signal (2) Two-phase double multiplication (x2) counting (3) Two-phase quadruple multiplication (x4) counting Auto reset function Resetting the current value (1) Internal reset (2) External reset Presetting the current counter value Setting comparison value Match interrupt Timing chart Single-phase mode (1) Single-phase single multiplication (x1) (2) Single-phase double multiplication (x2) Two-phase mode (1) Two-phase (pulse + direction signal) (2) Two-phase double multiplication (x2) (3) Two-phase quadruple multiplication (x4)

10 Input specification Section 2 Specifications 2-1 High-speed counter input specifications (1) Input specifications Input terminals available for the built-in high-speed counter are X0 to X3. Their input specifications are shown below: Item No. Max. of input channels input frequency Accuracy of input phase difference (two-phase mode) Input signal conditions Characteristics of input circuit External Input Isolation Dielectric Insulation Derating Rated voltage Specification for the built-in high-speed counter 2 channels in single-phase mode, 1 channel in two-phase mode 100 khz in single-phase mode, 50 khz in two-phase mode 90 ± 45 DC24V V oltage (tolerance) DC24V ± 10% R ipple factor tolerance 5% I nput method Common source & sink (bi-directional) Rated Input Standard operating range current impedance OFF ON ON OFF Approx. 5 ma Approx V 0 5V Input type DC type1 Input connection signal indication method strength resistance condition delay time 4.7kΩ Lead delay time: 10 µ s Software filtering time: The high-speed counter operates without filtering. M3 screw LED lights (green) when ON for each point, logical side Photocoupler 1500 V AC, 1 minute between input terminals and frame ground 10 MΩ or more with 500 V DC megger (between input terminals and frame ground) None (2) Functions of input terminals The input terminals of the high-speed counter have the following functions: I nput terminal Mode selection (by parameter setting) X0 X1 X2 X3 Single-phase mode Single or double multiplication CH0 pulse input CH1 pulse input CH0 reset signal input C H1 reset signal input Two-phase mode Pulse + direction signal CH0 pulse input CH0 direction signal input CH0 reset signal input Double or quadruple multiplication CH0 A-phase input CH0 B-phase input CH0 reset signal input 2-1

11 2-1 High-speed counter input specifications Input specification (3) Internal input circuit + + COM PC Photocoupler External input (X0 to X3) 2-2

12 Phase mode 2-2 Operation of the High-speed Counter The high-speed counter has the following operation modes: Single-phase mode In this mode, the high-speed counter counts the pulses that are input through the input terminal (X0 for CH0, X1 for CH1). Unsigned 16-bit data is used in the counter. The data of CH0 is stored in D8040; that of CH1, in D8041. D8040 D8041 FFFF (65,535) FFFE (65,534) 0002 (2) 0001 (1) 0000 (0) Hexadecimal representation Decimal representation The following types of counting are available: (1) Single-phase, single multiplication (x1) counting This mode counts up only at the leading edge of input pulse. One is counted per cycle. Current counter value (D8040, D8041) Input pulse (X0, X1) (2) Single-phase double multiplication (x2) counting This mode counts up at the leading and trailing edges of input pulse. Two is counted per cycle. Current counter value (D8040, D8041) Input pulse (X0, X1)

13 2-2 Operation of the High-speed Counter Phase mode Two-phase mode In this mode, the pulses that are input through the input terminal (X0, X1) are counted up or down. In this mode, signed 32-bit data (expressed by two s complement) is used in the high-speed counter, and high-order data is stored in D8040 while low-order data in D8041. D8041 D8040 7FFFFFFF (2,147,483,647) 7FFFFFFE (2,147,483,646) (1) (0) FFFFFFFF ( 1) FFFFFFFE ( 2) ( 2,147,483,647) ( 2,147,483,648) Hexadecimal representation Decimal representation To express a negative numeric value by two s complement, individual bit of the numeric part is reversed and then 1 (one) is added. The following types of counting are available: (1) Pulse + direction signal This mode counts at the trailing edge of the pulses that are input to the input terminal (X0). Counting is performed increasingly when direction signal (X1) is L while decreasingly when H. One is counted per cycle. Current counter value (D8040, D8041) Input pulse (X0) Direction signal (X1) 2-4

14 Phase mode 2-2 Operation of the High-speed Counter (2) Two-phase double multiplication (x2) counting This mode counts at the leading and trailing edges of B-phase (X1 terminal) pulses. Two is counted per cycle. Timing of incremental or decremental counting 1) Timing of incremental counting At the leading edge of B-phase pulse while A-phase is H At the trailing edge of B-phase pulse while A-phase is L 2) Timing of decremental counting At the leading edge of B-phase pulse while A-phase is L At the trailing edge of B-phase pulse while A-phase is H Current counter value (D8040, D8041) A-phase (X0) B-phase (X1) (3) Two-phase quadruple multiplication (x4) counting This mode counts at the leading and trailing edges of A-phase (X0 terminal) and B-phase (X1 terminal) pulses. Four is counted per cycle. Timing of incremental or decremental counting 1) Timing of incremental counting At the leading edge of B-phase pulse while A-phase is H At the trailing edge of B-phase pulse while A-phase is L At the trailing edge of A-phase pulse while B-phase is H At the leading edge of A-phase pulse while B-phase is L 2) Timing of decremental counting At the trailing edge of B-phase pulse while A-phase is H At the leading edge of B-phase pulse while A-phase is L At the leading edge of A-phase pulse while B-phase is H At the trailing edge of A-phase pulse while B-phase is L Current counter value (D8040, D8041) A-phase (X0) B-phase (X1) 2-5

15 2-2 Operation of the High-speed Counter Phase mode Auto reset function This function can be used only in single-phase mode. This function is enabled by parameter setting. When the Auto Reset function is disabled, counter upper limit is FFFF. When this function is enabled, you can arbitrarily set the upper limit. When set, the content of comparison value registers (D8042, D8043) becomes the upper limit. When the Auto Reset function is disabled When the Auto Reset function is enabled (comparison value = 0500) FFFF FFFE 04FF 04FE Resetting the current value The current counter value can be reset (cleared to zero) internally (by software) or externally (by hardware) (OR action). Mode Channel Current value register Internal reset CH0 D8040 M8181 CH1 D8041 M8189 C H0 D8041 (high-order) D8040 (low-order) M8181 External reset X2 terminal X3 terminal X2 terminal (1) Internal reset The current counter value is reset when the status of the corresponding internal register is changed from 0 (zero) to 1 (one) (at the leading edge). To reset again, restore this internal register once to 0 (zero). (2) External reset The current counter value is reset when the status of the corresponding terminal is changed from L to H (at the leading edge). To reset again, restore this terminal once to L Presetting the current counter value This function is used to forcibly change the current counter value to an arbitrary value. Mode Singlephase Twophase Singlephase Twophase Channel Current value register Preset value register Preset flag CH0 D8040 D8044 M8187 CH1 D8041 D8045 C H0 D8041 (high-order) D8040 (low-order) D8045 (high-order) D8044 (low-order) M818F M8187 Presetting Procedure 1) Write a data in the preset value register. 2) Set the preset flag to 1 (one). When presetting is completed, this flag is automatically reset to 0 (zero). 2-6

16 Phase mode 2-2 Operation of the High-speed Counter Setting comparison value In this paragraph, counter comparison value is set. The comparison value is used by the following functions: Auto Reset function Match interrupt Mode Channel Comparison value register CH0 D8042 M8186 CH1 D8043 C H0 D8043 (high-order) D8042 (low-order) Comparison value set flag M818E M8186 Comparison value is recognized when the comparison value set flag is set to 1 (one) or the PC power switch is turned once OFF and then ON again after it is written in this register. When the setting of comparison value is completed, this flag is automatically reset to 0 (zero) Match interrupt This function makes an interrupt take place when the current counter value coincides with the set comparison value. Mode Singlephase Twophase Singlephase Twophase Channel Interrupt pointer Interrupt permit Interrupt clear CH0 I1000 M8182 M8184 CH1 I1100 M818A latch All interrupt batch clear Match occurrence Match clear M817F M8190 M8183 M818C M8198 M818B CH0 I1000 M8182 M8184 M8190 M8183 <Operation of match interrupt> Main program Occurrence of match Interrupt program I1000 FEND IRET 2-7

17 2-2 Operation of the High-speed Counter Phase mode <Priority of interrupt> When multiple interrupts occur at a time, an interrupt program to which the highest priority is given is executed first, and then other interrupt programs are executed in order of their priority levels. When an interrupt of higher priority occurs while an interrupt program is being executed, the former must wait till the latter is completed. Priority of interrupt High priority Low priority I0000>I0100>I0200>I0300>I1000>I1100>ICxx>IDxx>IExx>IFxx> External interrupt High-speed counter interrupt Fixed cycle interrupt <In the following cases, interrupt does not take place> (1) Till currently executed instruction (MOV, AND, etc.) is finished (2) Till currently executed interrupt program is finished (3) During program scan end processing No interrupt takes place because in this period I/O data refreshing or self diagnosis is performed. Interrupt takes place when scan end processing is completed. (4) When interrupt permit flag (M8182, M818A) is set to 1 (interrupt disable) In this case, interrupt status is latched (held) internally, and match occurrence flag (M8190, M8198) is set to 1 (one). Interrupt latch is possible only for once. When interrupt is permitted, latch is cleared, and interrupt takes place. To clear a latched interrupt while interrupt is disabled, set interrupt latch clear flag (M8184, M818C) to 1. The interrupt can also be cleared by setting all interrupts batch clear flag (M817F) to

18 Phase mode 2-3 Timing chart Single-phase mode (1) Single-phase single multiplication (x1) t3 t4 Current counter value Input pulse (X0, X1) t1 t1 Reset signal (X2, X3) f t2 (2) Single-phase double multiplication (x2) t3 t4 Current counter value Input pulse (X0, X1) t1 t1 Reset signal (X2, X3) f t2 <Various timing values in single-phase mode> Item t1 f t2 t3 t4 Description Input pulse ON time/off time Input pulse frequency Reset signal width Delay time from the leading edge of reset signal to counter value being reset Delay time from the leading edge of reset signal to next counting being started Time Min. 4 µ s Max. 100 khz Min. 7 µ s Max. 7 µ s Min. 7 µ s 2-9

19 2-3 Timing chart Phase mode Two-phase mode (1) Two-phase (pulse + direction signal) t4 t3 Current counter value Input pulse (X0) Direction signal (X1) t1 t1 t1 f t2 Reset signal (X2) (2) Two-phase double multiplication (x2) t4 t3 Current counter value A-phase (X0) B-phase (X1) t1 t1 t1 t1 f t2 Reset signal (X2) 2-10

20 Phase mode 2-3 Timing chart (3) Two-phase quadruple multiplication (x4) t4 t3 Current counter value A-phase (X0) B-phase (X1) t1 t1 t1 t1 f t2 Reset signal (X2) <Timing values for two-phase mode> Item t1 Description Pulse + direction signal: Overlap time between pulse and direction signals Double multiplication, quadruple multiplication: Phase difference between A and B phases t 1 Input pulse ON time/off time (only for pulse + direction signal mode) f Input pulse frequency t2 t3 t4 Reset signal width Delay time from the leading edge of reset signal till counter value being reset Delay time from the leading edge of reset signal to next counting being started Time Min. 2.5 µs Min. 5 µ s Max. 50 khz Min. 7 µ s Max. 7 µ s Min. 7 µ s 2-11

21 Section 3 Internal Register Specifications Page 3-1 Address map (1) Parameter area (2) Internal register area Status of internal registers at power failure or after stop/start Detail explanation of the registers Parameter area (1) Specification of whether or not to use the counter (0C) (2) Specification of counter operation (0D) Internal register area (1) Interrupt latch batch reset flag (M817F) (leading edge) (2) Command register (WM818) (3) Status register (WM819) (4) Current value register (D8040, D8041) (5) Comparison value register (D8042, D8043) (6) Preset value register (D8044, D8045) Internal block diagram

22 Address map Section 3 Internal Register Specifications 3-1 Address map The internal registers that are related to the built-on high-speed counter are explained below: (1) Parameter area 0C 0D Specification of whether or not to use the counter Specification of counter operation The parameter setting takes effect when the CPU is turned once OFF and then ON again. (2) Internal register area M817F: WM Interrupt latch batch reset (R/W) Command register (R/W) Status register (R) (Single-phase mode) (Two-phase mode) D CH0 current value (R) CH1 current value (R) or CH0 current value, low-order (R) CH0 current value, high-order (R) D8042 CH0 comparison value (R/W) CH0 comparison value, low-order (R/W) 8043 CH1 comparison value (R/W) CH0 comparison value, high-order (R/W) D8044 CH0 preset value (R/W) CH0 preset value, low-order (R/W) 8045 CH1 preset value (R/W) CH0 preset value, high-order (R/W) R: Read-only W: Write-only 3-2 Status of internal registers at power failure or after stop/start Address Parameter M817F, D8040 of internal register 0C, 0D WM818, WM819 to D8045 Power failure Hold Clear Hold Run Stop Hold Hold Hold Stop Run Hold Hold Hold Timing to recognize When started after stopped At scan end At scan end 3-1

23 3-3 Detail explanation of the registers Parameter area Parameter area The initial value, for example, after parameter clear, is zero for all bits. (1) Specification of whether or not to use the counter (0C) This area is used to specify whether or not to use the counter. <Bit assignment> F E D C B A Reserved (0) Singlephase/ two-phamode se selection Whether or not to use the counter <Detail explanation of bits> Bits 0 and 1: Whether or not to use the counter These bits set whether or not to use the high-speed counter. Bit 1 Bit 0 When single-phase mode is selected 0 0 High-speed counter is not used 0 1 Two phases are used 1 0 Only single-phase CH1 is used 1 1 Single-phase CH0 and CH1 are used When two-phase mode is selected High-speed counter is not used Two phases are used High-speed counter is not used Two phases are used Bit 2: Single-phase/two-phase mode selection This bit determines in which mode (single-phase mode or two-phase mode) to use the high-speed counter. 0: Single-phase mode is selected. 1: Two-phase mode is selected. Bits 3 to F: Reserved These bits must be set to 0 (zero). 3-2

24 Parameter area 3-3 Detail explanation of the registers (2) Specification of counter operation (0D) This area is used to specify operations of the high-speed counter. <Bit assignment> F E D C B A Reserved (0) Reserved (0) Reserved (0) Singlephase CH1 Auto reset Singlephase CH1 Multiplication Singlephase CH0 Auto reset Singlephase CH0, two-phase Multiplication <Detail explanation of bits> Bits 0 and 1: Sets multiplication for single-phase CH0 or two-phase mode The setting of these bits takes effect when other setting is made to use shingle-phase CH0 or two-phase. These bits set multiplication. Bit 1 Bit 0 When single-phase mode is selected 0 0 Single-phase CH0 single multiplication 0 1 Single-phase CH0 double multiplication 1 0 Single-phase CH0 single multiplication 1 1 Single-phase CH0 double multiplication When two-phase mode is selected Pulse + direction signal Two-phase double multiplication Two-phase quadruple multiplication Two-phase quadruple multiplication Bit 2: Single-phase CH0 auto reset The setting of this bit takes effect when other setting is made to use single-phase CH0. This bit specifies whether or not to enable the Auto Reset function for single-phase CH0. 0: Disable the Auto Reset function 1: Enable the Auto Reset function Bit 3: Reserved This bit must be set to 0 (zero). Bit 4: Single-phase CH1 multiplication The setting of this bit takes effect when other setting is made to use single-phase CH1. This bit sets multiplication type for single-phase CH1. 0: Single-phase CH1 single multiplication 1: Single-phase CH1 double multiplication Bit 5: Reserved This bit must be set to 0 (zero). Bit 6: Single-phase CH1 auto reset The setting of this bit takes effect when other setting is made to use single-phase CH1. This bit specifies whether or not to enable the Auto Reset function for single-phase CH1. 0: Disable the Auto Reset function 1: Enable the Auto Reset function Bits 7 to F: Reserved These bits must be set to 0 (zero). 3-3

25 3-3 Detail explanation of the registers Internal register area Internal register area (1) Interrupt latch batch reset flag (M817F) (leading edge) 0 to 1: Clear External interrupt and match interrupt of built-in high-speed counter that occur while interrupt is disabled are latched (held) internally. When this flag is set to 1 (one), such latches are all cleared. This function is used to cancel the interrupts that occurred while interrupt was disabled. When latch clear processing is completed, this bit is automatically reset to 0 (zero). (2) Command register (WM818) This register is used to control the built-in high-speed counter. <Bit assignment> F 8 7 WM818 0 CH1 F E D C B A 9 8 Current value preset Comparison value preset Reserved (0) Match interrupt latch clear Match occurrence flag clear Interrupt enable/ disable Current value reset Stop counting CH Current value preset Comparison value preset Reserved (0) Match interrupt latch clear Match occurrence flag clear Interrupt enable/ disable Current value reset Stop counting In two-phase mode, CH0 (bits 7 to 0) are used. <Detail explanation of bits> Bit 0 (8): Count stop (level) 0: Count (Input pulses are counted) 1: Count stop (No input pulse is counted) This bit specifies whether or not to count external input pulses. When this bit is set to 1 (one), counter input is ignored (not captured). Bit 1 (9): Current value reset (leading edge) 0 to 1: Reset 1 to 0: None When this bit is changed from 0 (zero) to 1 (one), the content of the current value register is cleared to zero. The register is also reset at the leading edge (from 0 to 1) of external control signal (X2 for CH0, X3 for CH1). Operation of this bit has no influence on other setting or flag register. To reset again, restore this bit once to 0 (zero). Bit 2 (A): Interrupt disable/enable (level) 0: Disable interrupt 1: Enable interrupt This bit specifies enable/disable for the execution of match (current counter value = comparison value) interrupt program If a match interrupt occurs while interrupt is disabled, the interrupt only for once is latched to be executed when interrupt is enabled. 3-4

26 Internal register area 3-3 Detail explanation of the registers When executed, match interrupt latch is automatically cleared. It is unnecessary to operate bit 4 (C) for clearing. Set this bit to 1 (one) when you use interrupt. Set this bit to 0 (zero) when you do not use interrupt. Bit 3 (B): Match flag reset (leading edge) 0 to 1: Reset 1 to 0: None This bit specifies whether or not to reset the match occurrence flag of the status register (WM819). When match occurrence flag reset processing is completed, this bit is automatically reset to 0 (zero). Bit 4 (C): Match interrupt latch clear (leading edge) 0 to 1: Clear This bit is used to forcibly clear the match interrupt latch that occurred while interrupt was disabled and thus to cancel the interrupt. When match interrupt latch clear processing is completed, this bit is automatically reset to 0 (zero). If this bit is set to 1 (one), latch clear processing is performed internally and the bit is automatically reset to 0 (zero) even when no match interrupt is latched in reality. Bit 5 (D): Reserved This bit must be set to 0 (zero). Bit 6 (E): Comparison value preset flag (leading edge) 0 to 1: Set When this bit is set to 1 (one), the data written in comparison value register D8042 (D8043) takes effect. Unless this bit is set to 1 (one), even when a numeric value is set in the comparison value register, it cannot be recognized by the built-in high-speed counter. When the built-in high-speed counter recognizes the content of comparison value register, this bit is automatically reset to 0 (zero). Bit 7 (F): Current value preset flag (leading edge) 0 to 1: Preset When this bit is set to 1 (one), the content of preset value register D8044 (D8045) is written in the current value register D8040 (D8041). When the writing operation is completed, this bit is automatically reset to 0 (zero). 3-5

27 3-3 Detail explanation of the registers Internal register area (3) Status register (WM819) This register is used to display the operating status of the built-in high-speed counter. <Bit assignment> WM819 F CH1 F E D C B A 9 8 Reserved Match occurrence flag CH Reserved Match occurrence flag In two-phase mode, CH0 (bits 7 to 0) are used. <Detail explanation of bits> Bit 0 (8): Match occurrence flag 0: No match occurred 1: Match occurred When the content of current value register D8040 (D8041) coincides with that of comparison value register D8042 (D8043), this bit is set to 1 (one). Also when the matching had already occurred when the counter was started after stopped, this bit is set to 1 (one). When bit 3 (B) of the command register is changed from 0 (zero) to 1 (one), this bit is reset to 0 (zero). The status of this bit is held till bit 3 (B) of the command register is operated. (4) Current value register (D8040, D8041) These registers are used to display the current counter value. While counting is being performed internally, asynchronously with scan, the data of current value register is updated only at scan end. (5) Comparison value register (D8042, D8043) These registers are used for comparison with the current counter value. When the power is turned ON, this value is automatically transferred to the internal register of the built-on high-speed counter and takes effect. To change comparison value after this, rewrite the value of this register and then change bit 6 (E) (comparison value set flag) of command register WM818 from 0 (zero) to 1 (one). Then, the changed value will take effect at scan end. When the content of current value register coincides with that of comparison value register, the following operations take place: Bit 0 (8) (match occurrence flag) of status register WM819 is set to 1 (one). When the Auto Reset function is enabled by parameter, the current counter value is cleared to zero. Counting is continued. When bit 2 (A) (interrupt enable/disable) of command register WM818 is set to 1 (enable), interrupt program is started. (6) Preset value register (D8044, D8045) These registers are used to change the current counter value. To change the current counter value, write a desired value in this register and then change bit 7 (F) (current value preset command flag) of command register WM818 from 0 (zero) to 1 (one). Then, the content of current value register is updated at scan end. 3-6

28 Internal block diagram 3-4 Internal block diagram High-speed Counter Internal Block Diagram Comparison value set command (M8186) Stop Start (M818E) Comparison value Count stop (M8180) D8042 D8043 CH0 CH1 comparison value comparison value (M8188) External pulse input Current value (X0) (X1) D8040 D8041 Preset value D8044 D8045 Interrupt latch clear command (M8184) (M818C) Current value preset command (M8187) (M818F) Current value reset command Batch reset command (M817F) (M8181) (M8189) External reset (X2) (X3) Match occurrence flag (M8190) (M8198) Match clear command (M8183) (M818B) CH0 interrupt latch CH1 interrupt latch Interrupt enable (M8182) (M818A) (Symbols) External interrupt latch clear A C Interrupt program I1000 I1100 Positive logic AND condition Negative logic OR condition Match comparison B A is output to B when condition C is met. 3-7

29 Section 4 External Connection Diagram Page 4-1 External connection diagram (1) When connecting to two-phase open collector output encode (2) When connecting to two-phase output encoder (built-in resistor type) (3) When connecting to single-phase contact output

30 Connection diagram Section 4 External Connection Diagram 4-1 External connection diagram Be careful that counter input signal is susceptible to noise. Input signal cable shall be as short as possible, be separated from the cables of other devices, and not be wired together with such cables. Be sure to use shielded cable and ground it independently on the PC or encoder side. Example of wiring (1) When connecting to two-phase open collector output encode DC24V Power supply 0V + Input side COM A- phase X0 B- phase X1 Encoder PC (2) When connecting to two-phase output encoder (built-in resistor type) DC24V Power supply 0V + Input side COM A- phase X0 B- phase X1 Encoder PC (3) When connecting to single-phase contact output X0 DC24V + Input side COM PC 4-1

31 Section 5 Example of Program Page 5-1 Example of single-phase counter (1) Address assignment (2) Parameter setting (3) Explanation of program operation (4) Ladder program (5) Mnemonic program (6) Parameter setting (built-in high-speed counter) Example of two-phase counter (1) Operation pattern (2) Address assignment (3) Parameter setting (4) Explanation of program operation (5) Ladder program (6) Mnemonic program (7) Parameter setting (built-in high-speed counter)

32 Phase counter Section 5 Example of Program 5-1 Example of single-phase counter In this paragraph, an example of using as single-phase incremental counter is shown. (1) Address assignment X0: CH0 pulse input X2: CH0 reset input X4: CH0 internal reset command input (M8181 ON pulse) X5: CH0 count start command input (M8180 OFF) X6: CH0 count stop command input (M8180 ON) X7: CH0 current counter value preset command input (D , M8187 ON) D8040: CH0 current counter value (2) Parameter setting 0C: H0001 0D: H0000 Single-phase mode, only CH0 is used, Auto Reset function disabled, single multiplication (3) Explanation of program operation 1) When the power is turned ON and the program is started, H0001 (count stop setting) is written in WM818 (command register). 2) At the leading edge of external input X4, the current counter value is reset internally (M8181 is set to ON). 3) At the leading edge of external input X5, count stop bit (M8180) is set to OFF. Counting is started. Pulses are input. Current count data is stored in D ) At the leading edge of external input X6, count stop bit is set to ON (M8180 is set to ON). Counting is stopped. After this, pulse input is ignored. The current count data is held. 5) At the leading edge of external input X7, 100 (H0064 by hexadecimal) is set as the current counter value (M8187 is set to ON). 6) To resume counting, set X5 to ON (M8180 is set to OFF). 7) To reset the counter, set X4 to ON (M8181 is set to ON). Then, the counter value is reset to 0 (zero) D8040 (Current value) X0 (Pulse input) M8180 (Count stop) ) 3) 4) 6) M8181 (Reset) 2) 7) M8187 (Preset) 5) 5-1

33 5-1 Example of single-phase counter Phase counter (4) Ladder program Initial scan M8011 ] [ Current value reset X0004 ] [ Count start X0005 ] [ Count stop X0006 ] [ Current value preset X0007 ] [ WM0818 MOV H CH0 current value reset M8181 ( ) CH0 count stop M8180 ( R ) CH0 count stop M8180 ( S ) CH0 preset value M8180 MOV CH0 current value preset M8187 ( S ) End (5) Mnemonic program When coded by mnemonic, the ladder program becomes as follows: LD M MOV H0001 WM LD+ X OUT M LD+ X RST M LD+ X SET M LD+ X MOV 100 D SET M END (6) Parameter setting (built-in high-speed counter) Mode: Channel 0/two-phase Counter: Multiplication: Auto reset: Channel 1 Counter: Multiplication: Auto reset: Single-phase Used x1 Disable Not used x1 Disable 5-2

34 Phase counter 5-2 Example of two-phase counter In this paragraph, an example of using two-phase counter and interrupt function for simplified position control is shown. (1) Operation pattern Interrupt occurred First Second Third (Current counter value) 200,000 Operation ready (current value clear) 190, ,000 0 Run command (Y10) 3) Deceleration signal output 1 (Y11) Start 4) Start Deceleration signal output 2 (Y12) 5) Stop signal output (Y13) 6) 7) T0 (2) Address assignment X0: CH0 A-phase input X1: CH0 B-phase input X2: CH0 reset input X4: Operation ready switch X5: Operation start switch Y10: Run command Y11: Deceleration output 1 Y12: Deceleration output 2 Y13: Stop delay timer T0: WM0: Interrupt occurrence counter D8042, D8043: Comparison value register (3) Parameter setting 0C: H0005 0D: H0001 Two-phase mode, double multiplication 5-3

35 5-2 Example of two-phase counter Phase counter (4) Explanation of program operation 1) When the power is turned ON and the program is started, H001 (count stop setting) is written in WM818 (command register). 2) At the leading edge of operation ready switch (X4), various data are cleared, and comparison value data (for first interrupt) is set to 150,000. 3) At the leading edge of operation start switch (X5), count and interrupt are enabled, and operation command output (Y10) is set to ON. Operation is started, and pulses are input from the encoder. 4) When the counter value reaches the comparison value (150,000), first interrupt takes place. The interrupt program sets deceleration output 1 (Y11) to ON and the next comparison value (for second interrupt) to 190,000. The output waits for direct output (set) command so as to immediately turn ON. 5) When the counter value reaches the comparison value (190,000), second interrupt takes place. The interrupt program sets deceleration output 2 (Y11) to ON and the next comparison value (for third interrupt) to 200,000. 6) When the counter value reaches the comparison value (200,000), third interrupt takes place. The interrupt program sets run command (Y10) to OFF and stop output (Y13) to ON. Then, in order to hold the status of stop output for a given time, the timer (T0) is started. 7) When the time period of T0 elapsed, deceleration output 1, deceleration output 2 and stop output are all set to OFF. 8) To resume counting, execute from step 2). 5-4

36 Phase counter 5-2 Example of two-phase counter (5) Ladder program Initial scan M8011 ] [ Operation ready switch X0004 ] [ Operation start switch Stop output X0005 Y0013 ] [ ] [ Stop output Y0013 ] [ Stop delay timer T0000 ] [ Command register WM0818 MOV H Count stop M8180 ( S ) Current value reset M8181 ( ) Match occurrence flag reset M8183 ( ) Match interrupt latch clear M8184 ( S ) Comparison value set M8186 ( S ) Comparison value register D8042 DMOV Interrupt occurrence count WM0000 MOV 0 0 Count stop M8180 ( R ) Interrupt enable M8182 ( S ) Run command Y0010 ( S ) Stop delay timer T0000 TMR Deceleration output 1 Y0011 ( R ) Deceleration output 2 Y0012 ( R ) Stop output Y0013 ( R ) FEND Always ON M8010 ] [ INTR H1000 Interrupt occurrence count WM

37 5-2 Example of two-phase counter Phase counter Always ON M8010 Interrupt occurrence count WM0000 ] [ = 0 1 Always ON M8010 Interrupt occurrence count WM0000 ] [ = 0 2 Always ON M8010 Interrupt occurrence count WM0000 ] [ = 0 3 Deceleration output 1 Y0011 ( SD ) Comparison value register D8042 DMOV Comparison value set M8186 ( S ) Deceleration output 2 Y0012 ( SD ) Comparison value register D8042 DMOV Comparison value set M8186 ( S ) Run command Y0010 ( RD ) Stop output Y0013 ( SD ) IRET End 5-6

38 Phase counter 5-2 Example of two-phase counter (6) Mnemonic program When coded by mnemonic, the ladder program becomes as follows: LD M MOV H0001 WM LD+ X SET M OUT M OUT M SET M SET M DMOV D MOV 0 WM LD+ X ANI Y RST M SET M SET Y LD Y OUTT T LD T RST Y RST Y RST Y FEND I LD M INC WM LD M AND= WM SETD Y DMOV D SET M LD M AND= WM SETD Y DMOV D SET M LD M AND= WM RSTD Y SETD Y IRET END (7) Parameter setting (built-in high-speed counter) Mode: Channel 0/two-phase Counter: Multiplication: Auto reset: Channel 1 Counter: Multiplication: Auto reset: Two-phase Used x2 Disable Nor used x1 Disable 5-7

39 ED & C Drive Systems Company Gate City Ohsaki, East Tower, 11-2, Osaki 1-chome, Shinagawa-ku, Tokyo, , Japan Phone: ~ 8 Fax: ~ 9 URL Information in this manual is subject to change without notice.