UNH-IOL MIPI Alliance Test Program

Transcription

1 CSI-2 Receiver Protocol Conformance Test Report UNH-IOL 121 Technology Drive, Suite 2 Durham, NH mipilab@iol.unh.edu Engineer Name engineer@company.com Host Company 1010 Mobile Way San Jose, CA USA 09/27/10 Enclosed are the results from the MIPI CSI-2 Receiver Protocol Conformance testing performed on: Host Company MIPI Host 2 Lane CSI-2 Receiver This testing was performed by UNH-IOL from September 20, 2010 September 25, The test suite referenced in this report is available on the MIPI Alliance website, along with other Test Suites documenting test procedures and reports for MIPI Hosts and Peripherals. Issues Observed While Testing The CSI Receiver under test was observed to meet all requirements tested for CSI-2 receivers. For specific details regarding issues please see the corresponding test result. iol Digitally signed by UNH-IOL Date: :13:01 04'00' Test Report Completed 9/27/2010 David Woolf david@iol.unh.edu

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3 Section 1: DUT and Test Setup Information Test Setup Details Manufacturer Model Firmware Revision Hardware Revision UNH-IOL ID: CSI-2 Protocol Generator Monitoring Station Host Company MIPI Host 2 Lane CSI-2 Receiver Not Available Not Available Not Available Moving Pixel Company P331 Tektronix DSA70804 Oscilloscope with UNH-IOL D-PHYGUI Software Additional Comments/Notes The below diagram shows the test setup used in performing this testing. 3

4 The following table contains possible results and their meanings: with Comments FAIL Warning Informative Refer to Comments Not Applicable Not Tested Interpretation The Device Under Test (DUT) was observed to exhibit conformant behavior. The DUT was observed to exhibit conformant behavior however an additional explanation of the situation is included, such as due to time limitations only a portion of the testing was performed. The DUT was observed to exhibit non-conformant behavior. The DUT was observed to exhibit behavior that is not recommended. s are for informative purposes only and are not judged on a pass or fail basis. From the observations, a valid pass or fail could not be determined. An additional explanation of the situation is included. The DUT does not support the technology required to perform these tests. Not tested due to the time constraints of the test period. 4

5 Section 2: Protocol Conformance Test s Group 7: Physical Layer Test Continuous Clock Behavior To verify that the DUT supports Continuous Clock Behavior. Test Data Lane Module Receiver Requirements To verify that the DUT meets the Data Lane Module Receiver Requirements. Test Clock Lane Module Receiver Requirements To verify that the DUT meets the Clock Lane Module Receiver Requirements. The DUT was able to enter and exit HS properly when the Clock lane was continuously active and to reconstruct an image from the received signal. See Figure 1 and 2. The DUT was observed to operate as a Unidirectional Slave supporting HS-RX. See Figure 1and 2.. The DUT was observed to operate as a Unidirectional Slave supporting HS-RX. See Figure 1and 2.. Test Forward Escape ULPM To verify that the DUT supports forward escape ULPM. The DUT was able to detect the ULPS entry command on both the Clock and Data lanes. See Figure 3 and 4. 5

6 Group 8: Multi-Lane Distribution and Merging. Test Byte Count not an Integer Multiple of the Number of Lanes To verify that the DUT transmits data bytes in proper order on each lane in a multi-lane system when the byte count of the data transmission is not an integer multiple of the number of lanes in the system. Test Lane Merger To verify that the DUT receives and merges data bytes in proper order on each lane in a multi-lane system. Test Lane Reconfiguration To verify that the lane distribution and merging layers can be reconfigured via the Camera Control Interface. A 63 Byte data packet was transmitted to the DUT over 4 data lanes. The DUT was able to successfully unpack and merge the received data. See Figure 5. The DUT was observed to successfully reconstruct images from received image data when operating with 1, 2, 3, and 4 data lanes. Not Tested Group 9: Low Level Protocol Test Long Packet Reception To verify that the DUT receives Long Packets properly. The DUT was observed to successfully receive Long Packets containing data mimicking the Sync Code pattern. See Figure 6. Test Virtual Channel Interleaving To verify that the DUT can properly transmit or receive interleaved packets. Not Applicable The DUT does not support Virtual Channel Interleaving. Test Error State To verify that the DUT only uses the necessary bits in the ECC byte. Informative Test ECC Calculation To verify that the DUT correctly calculates the ECC byte whether The DUT was observed to successfully calculate received ECC values. When both P6 and P7 bits were set to 1 the DUT correctly did not detect an ECC error. See Figure 9. 6

7 receiving or transmitting the ECC. The DUT was observed to successfully correct 1 bit ECC errors, and detect 2 and 3 bit ECC errors. See Figure 7 and 8. Test Checksum Calculation To verify that the DUT correctly calculates the Checksum correctly. The DUT was observed to successfully detect CRC errors. See Figure 10. Test Line Blanking To verify that the DUT can handle a near zero Line Blanking Period. The DUT was observed to successfully handle a line blanking time of 1.28 µsec. This was the shortest line blanking time that could be created with the testing station. See Figure 13. Test Data Type Interleaving To verify that the DUT properly performs Data Type Interleaving if supported. Test Virtual Channel Identifier Interleaving To verify that the DUT properly performs Virtual Channel Identifier Interleaving if supported. Not Applicable The DUT does not support Data Type Interleaving. Not Applicable The DUT does not support Virtual Channel Identifier Interleaving. Test SoT Error (Informative) To determine if the DUT detects SoT Error. The DUT was observed to properly detect a SoT Error and report it to the application layer. See Figure 11 and 12. 7

8 Section 3: Screenshots and Decode Data Figure 1 Non-Continuous Clock ******* BURST 1 CONTENTS (4 bytes extracted from burst, after Sync) *********** CSI PACKET DECODE (Short, 4 bytes) vc : 00 DT : 0x00 (000000): Sync Short Packet, Frame Start Code WC : 0x0000 ( ) (0d0) ECC: 0x00 ( ) (Valid) ******* BURST 2 CONTENTS (70 bytes extracted from burst, after Sync) ********** CSI PACKET DECODE (Long, 70 bytes) vc : 00 DT : 0x2A (101010): RAW Data, RAW8 WC : 0x0040 ( ) (64 8-bit words) ECC: 0x3A ( ) (Valid) CRC: 0x335A (Valid) 2A A A 0B 0C 0D 0E 0F A 1B 1C 1D 1E 1F A 2B 2C 2D 2E 2F A 3B 3C 3D 3E 3F 5A 33 ******* BURST 3 CONTENTS (4 bytes extracted from burst, after Sync) *********** CSI PACKET DECODE (Short, 4 bytes) vc : 00 DT : 0x01 (000001): Sync Short Packet, Frame End Code WC : 0x0000 ( ) (0d0) ECC: 0x07 ( ) (Valid) ******* BURST 4 CONTENTS (4 bytes extracted from burst, after Sync) *********** 8

9 CSI PACKET DECODE (Short, 4 bytes) vc : 00 DT : 0x00 (000000): Sync Short Packet, Frame Start Code WC : 0x0000 ( ) (0d0) ECC: 0x00 ( ) (Valid) ******* BURST 5 CONTENTS (70 bytes extracted from burst, after Sync) ********** CSI PACKET DECODE (Long, 70 bytes) vc : 00 DT : 0x2A (101010): RAW Data, RAW8 WC : 0x0040 ( ) (64 8-bit words) ECC: 0x3A ( ) (Valid) CRC: 0x335A (Valid) 2A A A 0B 0C 0D 0E 0F A 1B 1C 1D 1E 1F A 2B 2C 2D 2E 2F A 3B 3C 3D 3E 3F 5A 33 ******* BURST 6 CONTENTS (4 bytes extracted from burst, after Sync) *********** CSI PACKET DECODE (Short, 4 bytes) vc : 00 DT : 0x01 (000001): Sync Short Packet, Frame End Code WC : 0x0000 ( ) (0d0) ECC: 0x07 ( ) (Valid) ******* BURST 7 CONTENTS (4 bytes extracted from burst, after Sync) *********** CSI PACKET DECODE (Short, 4 bytes) vc : 00 DT : 0x00 (000000): Sync Short Packet, Frame Start Code WC : 0x0000 ( ) (0d0) ECC: 0x00 ( ) (Valid)

10 Figure 2 Continuous Clock 10

11 11

12 Figure 3 ULPS Entry Figure 4 ULPS Exit 12

13 Figure 5 Receive Packet with length not an integer multiple of the number of lanes. Figure 6 DUT Receives Long Packet with Data mimicking Sync Byte. ******* BURST 1 CONTENTS (4 bytes extracted from burst, after Sync) *********** CSI PACKET DECODE (Short, 4 bytes) vc : 00 DT : 0x00 (000000): Sync Short Packet, Frame Start Code WC : 0x0000 ( ) (0d0) ECC: 0x00 ( ) (Valid) ******* BURST 2 CONTENTS (70 bytes extracted from burst, after Sync) ********** CSI PACKET DECODE (Long, 70 bytes) vc : 00 DT : 0x2A (101010): RAW Data, RAW8 WC : 0x0040 ( ) (64 8-bit words) ECC: 0x3A ( ) (Valid) CRC: 0x0189 (Valid) 13

14 2A A 00 B8 00 B8 B B8 B8 B8 B8 0C 0D 0E 0F A 1B 1C 1D 1E 1F A 2B 2C 2D 2E 2F A 3B 3C 3D 3E 3F Figure 7 1 Bit ECC Error ******* BURST 2 CONTENTS (70 bytes extracted from burst, after Sync) ********** CSI PACKET DECODE (Long, 70 bytes) vc : 00 DT : 0x2A (101010): RAW Data, RAW8 WC : 0x0040 ( ) (64 8-bit words) ECC: 0x3B ( ) (*** INVALID ECC ***, Calculated: ) CRC: 0x335A (Valid) 2A B A 0B 0C 0D 0E 0F A 1B 1C 1D 1E 1F A 2B 2C 2D 2E 2F A 3B 3C 3D 3E 3F 5A 33 Figure 8 2 Bit ECC Error ******* BURST 2 CONTENTS (70 bytes extracted from burst, after Sync) ********** CSI PACKET DECODE (Long, 70 bytes) vc : 00 DT : 0x2A (101010): RAW Data, RAW8 WC : 0x0040 ( ) (64 8-bit words) ECC: 0x3F ( ) (*** INVALID ECC ***, Calculated: ) CRC: 0x335A (Valid) 2A F A 0B 0C 0D 0E 0F A 1B 1C 1D 1E 1F A 2B 2C 2D 2E 2F A 3B 3C 3D 3E 3F 5A 33 Figure 9 P6 P7 Set in Received ECC ******* BURST 2 CONTENTS (70 bytes extracted from burst, after Sync) ********** CSI PACKET DECODE (Long, 70 bytes) vc : 00 DT : 0x2A (101010): RAW Data, RAW8 WC : 0x0040 ( ) (64 8-bit words) ECC: 0xFA ( ) (*** INVALID ECC ***, Calculated: ) CRC: 0x335A (Valid) 2A FA A 0B 0C 0D 0E 0F A 1B 1C 1D 1E 1F A 2B 2C 2D 2E 2F A 3B 3C 3D 3E 3F 5A 33 14

15 Figure 10 Checksum Error Detected ******* BURST 2 CONTENTS (70 bytes extracted from burst, after Sync) ********** CSI PACKET DECODE (Long, 70 bytes) vc : 00 DT : 0x2A (101010): RAW Data, RAW8 WC : 0x0040 ( ) (64 8-bit words) ECC: 0x3A ( ) (Valid) CRC: 0x3322 (*** INVALID CRC ***, Calculated: 335A) 2A A A 0B 0C 0D 0E 0F A 1B 1C 1D 1E 1F A 2B 2C 2D 2E 2F A 3B 3C 3D 3E 3F

16 Figure 11 Normal SoT 16

17 Figure 12 SoT Error Figure 13 Line Blanking Time Near Zero 17