Real Time Embedded Systems. Lecture 1 January 17, 2012
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1 Low-Power & Reset
2 Real Time Embedded Systems Lecture 1 January 17, 2012 Topic
3 Section Topic Where in the books Catsoulis chapter/page Simon chapter/page Zilog UM197 (ZNEO Z16F Series Flash Microcontroller Contest Kit User Manual) Zilog UM171 (ZiLOG Developer Studio II ZNEO User Manual) Zilog PS220 (ZNEO Z16F Series Product Specification) Zilog UM188 (ZNEO CPU Core User Manual) Assorted datasheets
4 Outline Reset (57) Stop Mode Recovery (57) Low Power (65)
5 Z16 Block Diagram
6 Reset The Reset Controller in Z16 controls various reset operations, making sure conditions are stable before enabling the CPU. What things can cause a reset?
7 Reset Causes Power-On-Reset (system reset) Voltage Brown Out (system reset) Watchdog timer (core reset) Stop Mode Recovery (system reset) On chip debugger initiated reset External reset pin (core reset) RESET or /RESET
8 2 types of Resets System Reset The Z16 is held in reset state for 514 cycles of the watchdog timer then 16 cycles of the system clock. Caused by POR and SMR. Stop Mode Recovery The Z16 is held in reset for 66 cycles of the WDT. Caused by WDT timeout and /RESET pin assertion.
9 System Reset During system reset, device held for 66 cycles of the internal oscillator. On-chip peripherals are non-active. Option bit registers are initialized. POR = Power On Rest VBO = Voltage Brown Out
10
11 Power On Reset 50 clocks 16
12 Voltage Brown Out ZNEO senses low voltage condition and forces device into reset. Device remains in reset while voltage is less than the power on reset voltage.
13 Voltage Brown Out
14 Stop Mode Recovery STOP mode is entered by executing the STOP instruction asm( STOP ); Stop mode is exited by either a watchdog timer timeout or through setting a GPIO pin for Stop Mode Recovery.
15
16 External Reset Pin
17 External Reset Pin
18 Hardware Reset We can reset the Z16 through hardware by pulling the /RST pin LOW. This is what is on the Z16 Lab board:
19 Is this a good idea?
20
21 Software Reset Generally not desirable No RESET opcode or API function. One solution: Set Watchdog, don't refresh. Another is to set the USER RESET bit in the Reset Status and Control Register (RSTSCR)
22 Low Power Modes The Z8 Encore has 2 power saving features. STOP mode HALT mode
23 STOP Mode Enter stop mode with STOP instruction asm( STOP );
24 In STOP Mode Oscillator & System Clock stopped CPU idle Program Counter not incrementing Watchdog timer continues if enabled On-chip peripherals are non-active
25 Recovery from STOP mode
26 HALT Mode Enter HALT mode with HALT instruction asm( HALT );
27 In HALT Mode Oscillator & System Clock continue CPU is idle Program Counter not incrementing Watchdog timer continues if enabled On-chip peripheral continue
28 Recovery From HALT mode Interrupt System exception /RESET
29 Configure a GPIO pin
30 Determine How We Were Reset
31 Reset Conditions
32 Other Low Power Techniques Turn off unused oscillators Disable unused timers Disable unused peripherals Turn off analog inputs when no longer needed. Use slowest clock possible (use OSCDIV)
33 Low Power Recipe STOP mode 1. Make sure the RESET vector is set SET_VECTOR(RESET,function); 2. How will the CPU be restored? - Watchdog timeout - External Pin (using SMR) 3. If a pin, Configure the GPIO pin needed to bring the CPU out of low power mode. 4. If Watchdog, configure and enable the watchdog timer. 5. Detect STOP mode recovery and handle appropriately 6. Execute the STOP instruction.
34 Low Power Recipe HALT mode 1. Make sure the RESET vector is set SET_VECTOR(RESET,function); 2. How will the CPU be restored? - Watchdog timeout or - Interrupt 3. If an interrupt, Configure the interrupt as needed 4. If Watchdog, configure and enable the watchdog timer. 5. Execute the HALT instruction.
35 STOP Example Example_ StopMode Demonstrate how to initiate STOP mode and how to recover and how to detect which mode we last saw (reset, power, STOP)
36 ZNEO application notes are rare
37 Consider STOP mode for battery powered applications
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