SCS750. Super Computer for Space. Overview of Specifications

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1 SUPER COMPUTER FOR SPACE TM Super Computer for Space F FLIGHT MODULE Overview of Specifications One board upset every 100 years in a GEO or LEO Orbit Up to 1000X Better Performance Than Current Space Processor Boards Highest Space-Qualified MIPS Demonstrated Radiation Tolerance The single board computer is Maxwell s answer to the space industry s need for high-performance computing and on-board data processing while providing excellent reliability/upset immunity. There is a trend to perform data management and manipulation on the spacecraft, which requires a large amount of processing power. This next generation super computer will enable future satellite designs to dramatically increase error-free, on-board data processing, mission planning and critical decision-making. - Silicon-On-Insulator (SOI) Processors - Actel RTAX-S Radiation Tolerant FPGAs - RAD-PAK & RAD-STAKTM Packaged Memories Triple Modular Redundant Processing Advanced Error Corrected SDRAM Ultimate Upgradeability Software Selectable Power Consumption Standard Development Platform Compatible with IBM's PowerPC750TM from 7-25 watts typical The has been designed to operate in a cpci system targeting high performance computing and memory for the most demanding space applications. Its design decisions have been driven by a guarantee of the highest reliability and performance. Maxwell has developed a comprehensive radiation mitigation strategy to provide total dose hardness, latchup immunity and upset error mitigation for the. Maxwell's has become the benchmark of which all future space processor boards will be measured. Page of 5 Doc. # Rev. 7

2 Enhanced Features Front Panel Test Connector Front Panel Flight Connector SuROM/EEPROM Write enables FLIGHT/FLIGHT# FT_RESET# JTAG/PowerPC ICE UART0 (LVDS/RS422) Inject Errors (3) CPU Error (3) Voltage Sense Output FPGA Silicon Expl. WD_DISABLE# Up to 800MHz >1,800 MIPS DC/DC Converter Set Voltage UART0 (LVDS/RS422) XFMR XFMR FP_RESET# FP_HALT# MIL-STD- BC/RT/MT Rad-Hard (Optional) 3.3V 2.5V I/O Regulator Actel RT-AXS SEU Immune FPGA 60X Master Bus Snooping TMR LOGIC Memory Controllers, Timers (3), Interrupts, DMA (3), UART's (2) Watchdog Timer Mission Timer PCI Master Interface Logic 2.5V - I/O Voltages DC/DC 3.3V FPGA 1.5V Core PCI Target PCI Target SDRAM Interface Double Device Correction Reed- Solomon EEPROM Interface SEC/DED EDAC LOCAL PCI BUS (32 bit, 33MHz) System Timers 32 Bit (4 Timers) countdown 80 MHz Oscillator System Controller Chip Actel RT-AXS SEU Immune FPGA GPIO General Purpose I/O Controller (32 I/O's) 40MHz Clock Distribution Synch/Asynch Serial Communications Controller (SCC) (2) To FPGA's, 's, SDRAM's Main Memory SDRAM 256 MBytes 0.5MB Primary SuROM 0.5MB Secondary SuROM 7.0MB User EEPROM PCI-PCI Bridge PCI-IF Chip Arbiters Power Input: 3.3V / 5V UART(0/1) - 2 channel (LVDS/RS422) EEPROM Write Enable (3) [J3 Connector] Local PCI to J4 33MHz Clock Distribution 66 MHz Oscillator 8 channel arbiter cpci Bus, 3.3V 32 bit, 33MHz PCI (8) cpci (8) RAD Hard SRAM LVDS Standard, RS-422 Option [J3 Connector] 3.3V CMOS, 16 Discretes shared with Backplane 3.3V CMOS, 32 Discretes [J3/J5 Connectors] (3) Timer Synch# Signals (input/output) [J3 Connector] Power Switch cpci Backplane Connectors Auto Controller/Peripheral Configuration Cold Sparing Capable Processor & SDRAM Error Logging Front Panel Test Connector Front Panel Flight Connector Single Event Upset Mitigation Page 2 of 5

3 Triple Redundant Processing Triple Redundant Processing TMR Processor SEU Flush TMR Processor Restore Detects upset Flushes µprocessors memory into main memory Tri-states upset µprocessor Scrubs memory contents Restores memory back into µprocessors Resynchronizes all three µprocessors into lockstep Flushes and Restores in 1ms! Page 3 of 5

4 Performance Charts Software Selectable Power Consumption MIPS Typical Worst Case Power (Watts) Estimated MIPS vs. Code/Data Size at 800MHz with 512KByte L2 Cache MIPS x 1000X 250 RH PowerPC at 133MHz without L2 Cache Code Size (KB) Page of 5

5 Spcecifications Technical Specifications radiation tolerance TID: > 100 krad (Si) - Orbit dependent SEL (th): > 80 MeV-cm 2 /mg - All parts except SDRAM 50 MeV-cm 2 /mg - SDRAM Processors (3) Fully TMR Protected Processors PowerPC TM on Silicon on Insulator (SOI), 0.13um 2.32 Dhrystone MIPS/MHz > 1800 Dhrystone 800MHz 400 to 800MHz - Software Selectable Core Clock Ratessor Cache L1 cache 32 KByte Instruction with Parity 32 KByte Data with Parity L2 cache 512 KByte on-chip with CPU Core Clock Rate memory volatile 256 MByte SDRAM - Reed-Solomon Protected - Double Device Correction non-volatile 8 MByte EEPROM - ECC Protected MByte EEPROM available to user MByte Primary SuROM MByte Secondary SuROM (Autoswap on Primary Failure) Interfaces cpci Bus 6U 3.3V 32 bit, 33MHz Master/Target & Syscon/Peripheral BC/RT/MT SEU Immune SERIAL UART ( Asynchronous ), LVDS (2) USRTs ( Synchronous ), LVDS PROGRAMMABLE I/O 32 Programmable General Purpose I/O (GPIO) power 7-25 watts ( typical ) dependent on clock rate/mips requirements 5V for interface, 3.3V for rest of board Mechanical 6u x 160mm 1.5 Kg (3.3 Lbs.) Max Models F - flight configuration Rad-Tolerant, Class S or Equivalent Components Conduction Cooled 2 ACTEL RTAX FPGAs E - engineering configuration Parts Identical to Flight (Not screened to flight level) Conduction Cooled 2 ACTEL RTAX FPGAs D - engineering Development configuration Commercial Components, ACTEL FPGAs Full Hardware & Software Compatibility w/ E & F Models Convection Cooled P - prototype configuration Commercial Components, Xilinx FPGAs Similar functionality to D, E & F Models Convection Cooled All models are available with an optional interface Board Support Package Detailed Specification User Manual - Interface Control Documents - Software User s Manual (SUM) VxWorks Runtime License Certificate of Conformance Startup ROM Source Code Functional Test Procedure - Test Plan - Test Log Functional Test Report Environmental Test Procedure (Flight Only) - Test Plan - Test Log Environmental Test Report (Flight Only) operating system VxWorks, Tornado temperature -30 C to +65 C ( Acceptable Levels ) -40 C to +70 C ( Qualification Levels ) Worldwide Headquarters Maxwell Technologies, Inc 9244 Balboa Avenue San Diego, CA USA PHONE: +1 (858) FAX: +1 (858) info@maxwell.com All specifications are subject to change. For the most current information on Maxwell products, visit: Page 5 of 5