Pico ChipScope Documentation

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1 Pico ChipScope Documentation Contents 1 Disclaimer 1 2 Overview 1 3 Firmware 2 4 Pico Module M-503 Cables M-505 Cables Launching ChipScope Analyzer Software 9 6 Debugging Changing Dash to Bash Xilinx JTAG programmer in Ubuntu More Information Disclaimer The Xilinx ISE and Xilinx ChipScope portions of this document are out of date and should be ignored. On the other hand, the sections of this document that refer to Pico Computing hardware and software (e.g. Pico Module, Software) are still valid. 2 Overview This document provides a step-by-step tutorial on how to run ChipScope using Pico Computing s M-Series modules. It describes the firmware and software changes required to run ChipScope. Also, it shows how to connect to the Pico module through ChipScope using the JTAG cable that comes with the Xilinx programmer. It uses the PicoBus128_Helloworld sample as the working example through the design. Please be sure to read the documentation for the PicoBus128_Helloworld sample and be familiar with the design before reading this document. Before continuing on to the rest of the document, please load the appropriate version of the PicoBus128_Helloworld sample in the Xilinx ISE and run the design through XST to synthesize the Verilog into a netlist. Note: this tutorial supports Xilinx ISE 13.x and Pico Computing s installation (or newer) 1

2 3 Firmware Once the design has been synthesized using XST, add ChipScope by clicking the New Source button on the left side of the screen. On the left of the New Source Wizard window, select the ChipScope Definition and Connection File, and give it a name. In this example, we name our ChipScope module as PicoBus_debug. Click the Next button, and then click Finish. Notice that a new module has now been added to your design whose name is the name we provided in the new source wizard. Double-click the new ChipScope module to launch a wizard that will aid in selecting which signals we want to trigger on, and which signals we want to capture. The ChipScope Pro Core Inserter window should now open. Click Next twice to advance to the window for selecting trigger and capture parameters. We first select the trigger parameters for our debugging. In this example, we would like to view any data that is written or read via the PicoBus. Therefore, we will use the PicoWr and PicoRd signals as our trigger signals. We use 2 1-bit trigger ports for the PicoRd and PicoWr signals. Click Next to select the capture data parameters. 2

3 Since we would like to view the address and data on the PicoBus whenever PicoWr or PicoRd are asserted, we want to have different capture data from the trigger data (deselect the Data Same as Trigger box). While debugging, it may be useful to view the reset, address, write, read, input data, and output data signals. Therefore, we first set the data width to 287 ( ). Ensure the data is being sampled on the rising edge of the clock and click Next. Red text on the Net Connections tab means there is an issue that you need to address. When you first get to this tab, the clock port, trigger ports, and data port will all be red. We need to select the signals now that we will use for clock, trigger 3

4 data, and capture data (before we just set the width of the ports). Click on the Clock Port and then click on the Modify Connections button. To select the clock signal (ChipScope requires exactly 1 clock), click the Clock Signals tab on the right of the Select Net window. Navigate the hierarchy in the Structure / Nets area to find the PicoClk, which we will use as the source clock in our example. Use the pattern filter to search for PicoClk in the PicoBus128_HelloWorld module. Select the PicoClk, and click the Make Connections button in order to choose that clock for your system. 4

5 To select the trigger signals, click the Trigger Signals tab to the right. Use the search function to find the PicoWr and PicoRd signals within the PicoBus128_HelloWorld module. Be sure to click the Make Connections button after selecting the desired signals in order to set your trigger signals properly. Have the PicoWr signal be the trigger for one port and the PicoRd signal the trigger for the other port. 5

6 To select the capture signals, click the Data Signals tab to the right. Use the search function to find the PicoDataIn, PicoDataOut, PicoAddr, PicoRst, PicoRd, and PicoWr signals within the PicoBus128_HelloWorld module. Be sure to click the Make Connections button after selecting the desired signals in order to set your capture data signals properly. Notice that the PicoAddr least-significant 4 bits are not found in the module, because they have been synthesized away. Click Ok to close the Select Net window and return to the ChipScope Pro Core Inserter window. The clock, trigger, and data ports should no longer be red in the Net Connections tab. Click Return to Project Navigator (and click yes when prompted to save) to return to ISE. To complete the insertion of the ChipScope core into your design, double-click Generate Programming File. 4 Pico Module The ChipScope module communicates with the host machine over JTAG using the Xilinx platform USB. The M-505 modules use slightly different JTAG cables, and they connect to the Xilinx programmer in a slightly different location on the module. 4.1 M-503 Cables The M-503 uses the standard Xilinx cable (included with all Xilinx JTAG programmer kits) which connects to the M-503 as shown in the following image. 6

7 Note: The ribbon cable connector is keyed on both ends of the ribbon, so do not try to force the cable when connecting to the Xilinx Platform Cable USB or the M M-505 Cables The M-505 uses an adapter cable (included with all M-505s) which connects to the M-505 module as shown in the following images. 7

8 8

9 4.3 Launching ChipScope Analyzer If you have not yet reconfigured Ubuntu to use the bash shell instead of the dash shell, please read Changing Dash to Bash under the Debugging section, or else the ChipScope Analyzer will fail to launch. Once you have connected the JTAG cable to the module under test (in this case we are testing an M-505), launch ChipScope from the ISE by double-clicking Analyze Design Using ChipScope. Once the ChipScope Pro Analyzer window appears, select Server Host Setting from the JTAG Chain drop-down menu. Click the Restore Default button to set the server to localhost. Click Ok to return to the ChipScope Pro Analyzer. Also in the JTAG Chain drop-down menu, ensure that Xilinx Platform USB Cable is selected. 5 Software When testing a design using ChipScope, your user software must be able to connect to an already programmed FPGA, without using the RunBitFile() function. Instead you must use the FindPico() function, which is explained in the PicoAPI documentation. For this example, we modify the PicoBus128_HelloWorld.cpp file. We replace line 36 (which calls RunBitFile) with: err = FindPico (0 x505, & pico ); Even though we must be able to connect to the FPGA without reloading the bitfile, we first must configure the FPGA with our generated bitfile containing the ChipScope module. We do this in this example through Purty. In Purty, right-click on the FPGA that you want to configure with a bitfile, and click on Load FPGA. Navigate to the desired bitfile, and click Open. 9

10 Once the FPGA has been configured, we must enable JTAG access to the card, which is once again accomplished through Purty. Right-click on the configured FPGA and then select Enable JTAG Access. 10

11 Back in the ChipScope Pro Analyzer window, click on the Open cable / search JTAG chain button in the upper left corner. If successful, you should see the following window appear. The defaults in the JTAG Chain Device Order are correct, so click Ok to continue to the analyzer window. If unsuccessful, please read Xilinx JTAG Programmer in Ubuntu under the Debugging section. Once you have opened a connection to the FPGA, you should import your ChipScope trigger and capture parameters, which you set up using the ChipScope Core Inserter. To import your design, click Import from the File drop-down menu. Browse to your cdc file (in this example PicoBus_debug.cdc), and be sure to select the Autocreate Buses box before clicking Ok. 11

12 Before running the application, we need to set up the trigger condition, which will be used to signal when to record data in the ChipScope buffers. In this case, we want to record data when either PicoWr or PicoRd are asserted. Therefore, we set the TriggerPort0 and TriggerPort1 values to 1, and we set TriggerCondition0 equation to M0 M1 by clicking the Trigger Condition Equation box. Lastly, we want to observe 5 events in this sample, since the PicoBus is written 3 times in the sample and read 2 times. Therefore we set the number of windows to 5. Notice the depth of each window is now 128 samples. In order to get some signal history when viewing the captured signals, set the Position field to 64, which will move the trigger position to the middle of a window. 12

13 Once the preceding trigger setup is completed, click the Apply Settings and Arm Trigger button near the top of the window. Once the triggers are running, we now simply need to start our software application, which will cause the trigger conditions to occur and data to be recorded. Run the software from the command line (after running make to compile the software sample). Once you have run the sample, switch back to the ChipScope Pro Analyzer window, and notice that all five windows now have captured data shown. The following image shows an example of the data that is captured by the distributed software sample. 6 Debugging 6.1 Changing Dash to Bash The default shell in Ubuntu is dash, but the ChipScope analyzer requires the shell to be bash. To change the default shell to bash, follow these instructions: 1. Verify the default shell is currently set to dash ls -l / bin /sh 13

14 2. Reconfigure the default shell sudo dpkg - reconfigure dash 3. Select no to specify to use bash as the current shell 4. Verify the default shell has been changed to bash ls -l / bin /sh 6.2 Xilinx JTAG programmer in Ubuntu With the standard Xilinx ISE installation, the Xilinx JTAG programmer does not work under Ubuntu. To get it working, follow these instructions: 1. Copy the udev rules and adapt the file to the new udev-version sudo cp / opt / Xilinx /13.2/ ISE_DS / ISE / bin / lin64 / xusbdfwu. rules / etc / udev / rules.d/50 - xusbdfwu. rules sudo sed -i -e s/ TEMPNODE / tempnode / -e s/ SYSFS / ATTRS /g -e s/ BUS / SUBSYSTEMS / / etc / udev / rules.d/50 - xusbdfwu. rules 2. Copy the hex-files used by different Xilinx cables to /usr/share and make them readable by regular users sudo cp / opt / Xilinx /13.2/ ISE_DS / ISE / bin / lin64 / xusb *. hex / usr / share / sudo chmod 644 / usr / share / xusb *. hex 3. Install fxload, which is used by the rules, and libusb-dev, which is needed by impact sudo apt - get install fxload libusb - dev 4. Restart udev sudo restart udev 6.3 More Information For more information on inserting ChipScope modules into a design, setting trigger conditions, or reading capture data, please consult one of the many ChipScope tutorials provided online by Xilinx. For more information about connecting the JTAG programmer to a module, connecting your software to an already configured FPGA, or enabling JTAG access via Purty, please send questions to help@picocomputing.com. 14

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