, and Mechanical Cosimulation for Automotive Applications P. Le Marrec, C. A. Valderrama, F. Hessel, A. A. Jerraya System Level Synthesis Group, TIMA Laboratory, INPG, Grenoble M. Attia, O. Cayrol PSA Peugeot Citroën, DRAS, Velizy-Villacoublay Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-1/15
OUTLINE INTRODUCTION Problems of the industry Objectives State of the Art Contribution BACKGROUND Methods in automotive industry The New automotive Approach APPLICATION Timed and Untimed Cosimulation Cosimulation Interface Results CONCLUSION Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-2/15
Introduction Automotive Model Mechanical Part Electronic Control Part Processor Memory FPGAs PLDs Asics Sensors Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-3/15
PROBLEMS OF THE INDUSTRY Specifications Mechanical Part Part Part Several design groups Behavior models Mechanical Model Model Validation Model Different cultures Mechanical Prototype Prototype Prototype Physical Realization Problems Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-4/15
MOTIVATIONS & OBJECTIVES Time to market Modular Conception easier and earlier validation cost estimation of the overall system Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-5/15
STATE OF THE ART Multi-Languages Cosimulation Compositional Approach Cosimulation Approach L1 L2 Ln L1 L2 Ln Composition Format Design and Validation Design and Validation Design and Validation Verification and Design Cosimulation Bus Ex.: RAPID, PTOLEMY,... Ex.: VCI, Coware,... Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-6/15
CONTRIBUTION L1 SYSTEME L2 L3 Mechanic Ln Other Languages - A single Cosimulation Interface C Language Behavioral VHDL Matlab µp Model VHDL RTL DSP Code Prototype Prototype Prototype C Behavioral Real Time - A parameterized cosimulation - Evaluation of the system before Implementation Cosimulation Bus Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-7/15
Cosimulation methods in automotive industry Mechanical Simulink Model Generation C language C language Rewrite VHDL C language DSP board Prototype Based Microcontroller Card Methods of cosimulation for Automotive applications Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-8/15
Cosimulation Methodology Partitioning system Analysis Mechanical system A single Cosimulation Interface modeling C VHDL Matlab -> Untimed For a global view of the comportment Binary code model of of of of the C C167 software µprocessor VHDL simulator Vhdl Entity Matlab simulator Functional Cosimulation Mechanical -> Timed For evaluate performances Data Exchange Lock step time Real-time Cosimulation Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-9/15
APPLICATION Timed and Untimed Cosimulation Matlab Vhdl C Matlab Entity Entity Fonctionnal Cosimulation Bus VHDL Real Time Cosimulation Bus Registers Traces Signals Visualisation Graphical User Interface C167 Memory Microcontroller Entity Entity Entity Processor Model Executable Code Program (Intel Hex Format) Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-10/15
COSIMULATION INTERFACE Running Command Load Simulink schema Pause / Restart Matlab (Simulink Model) Running script Running Command Control Matlab execution Time Shared Memory Matlab VCI/C Interface I/O C Interface Vhdl debugger I/O C Interface C167 Vhdl Model Binary File Generated by VCI Cosimulation Bus Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-11/15
EXAMPLE Pedal Filter software part Regulation software part Part Motor Mechanical Part Application eliminates parasitic vibration of the user pedal control for a Electrical Vehicle - Motor modelize in A Matlab Simulink Model - is composed by A C167 Microcontroller Vhdl Model Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-12/15
TIMED COSIMULATION Assembler traces window of the part Cosimulation Bus Debug Information PWM microcontroller Register Display Signals Display Matlab computing Values Microcontroller registers Display Matlab Model of the electrical vehicle Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-13/15
Results Untimed Cosimulation - Validates the overall behavior of the system - Shows the interaction between the different parts Timed Cosimulation - Performance Evaluation - Disadvantage => time execution due to the Vhdl model of the C167 Measures achieved on a SUN Ultra Sparc station Time needed to simulate 1ms of real time Execution with the Execution with the Vhdl debugger standard Vhdl simulator 3C MODULE ~ 15 minutes ~ 10 12 minutes PEDAL REGULATION MODULE ~ 15 minutes ~ 12 minutes Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-14/15
CONCLUSION New automotive system design approach Efficient design flow Shorter time to market early validation of the overall system High level of each part of the design Easy to use cosimulation interface Validates of the initial specification allows Timed and Untimed Cosimulation validates both functional and timing properties Improvement Development C Entity -> about 1 million Instructions/Second Drastic reduction in the Timed Cosimulation time Philippe Le Marrec - RSP 98, Leuven, Belgium - June 1998-15/15