Design and Verify Embedded Signal Processing Systems Using MATLAB and Simulink
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1 Design and Verify Embedded Signal Processing Systems Using MATLAB and Simulink Giorgia Zucchelli, Application Engineer, MathWorks 10 January 2013, Technical University Eindhoven 2013 The MathWorks, Inc. 1
2 Agenda Introduction to Model Based Design Application example: Parametric Audio Equalizer Targeting a fixed-point embedded processor Workflow overview Conclusions 2
3 INTRODUCTION 3
4 What is Model Based Design? Methodology to design complex systems Using models and simulation Using tools for automation 4
5 Why using Model Based Design? Find errors early Reduce costly prototypes Increase productivity 5
6 MathWorks model-based design speeds up the development process RESEARCH REQUIREMENTS DESIGN IMPLEMENTATION TEST & VERIFICATION 1. Focus on algorithmic design 2. Anticipate implementation 3. Verification test-benches INTEGRATION 6
7 Improve team communication with multi-domain executable specifications RESEARCH REQUIREMENTS DESIGN Algorithms IMPLEMENTATION TEST & VERIFICATION Many trusted functions Use the most suitable modeling approach INTEGRATION 7
8 Achieve early verification with refined models anticipating real impairments RESEARCH REQUIREMENTS DESIGN Algorithms Digital Analog Fixed-Point Physical Models IMPLEMENTATION TEST & VERIFICATION Bit-true simulation Multi-domain physical models INTEGRATION 8
9 Rapid prototyping with code generation: less debugging, better design RESEARCH REQUIREMENTS DESIGN Algorithms Digital Analog Fixed-Point Physical Models IMPLEMENTATION C, C++ VHDL, Verilog TEST & VERIFICATION C / C++ Synthesizable HDL MCU DSP Processors FPGA ASIC INTEGRATION 9
10 One testbench fits all: unambiguous verification of the specs RESEARCH REQUIREMENTS DESIGN Algorithms Digital Analog Fixed-Point Physical Models IMPLEMENTATION C, C++ VHDL, Verilog TEST & VERIFICATION System-level test Co-simulation Hardware in the loop verification MCU DSP Processors FPGA ASIC INTEGRATION 10
11 APPLICATION EXAMPLE 11
12 Demo: Parametric Audio Equalizer Digital filters used to adjust the frequency content of an audio signal Parametric response that can be run-time controlled Three band equalizer Low Band: 60 to 1500 Hz Mid Range: 1200 to 4800 Hz High Range: 4800 to 12 khz Amplitude range: -8 to +8 db 12
13 TEXAS INSTRUMENTS DM6437 EVM 13
14 Target #1: TI DM6437 EVM Ethernet USB JTAG CAN/Serial Audio Video Processor PMU PCI 14
15 DM6437 EVM - Processor Highest-performance fixed-point DSP generation in the TMS320C6000 DSP platform Very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI) Some of the specs: 2.5-, 2-, 1.67, 1.51-, 1.43-ns Instruction Cycle Time 400-, 500-, 600-, 660-, 700-MHz C64x+ Clock Rate Eight 32-Bit C64x+ Instructions/Cycle 3200, 4000, 4800, 5280, 5600 MIPS 15
16 DM6437 Software stack 16
17 WORKFLOW OVERVIEW 17
18 PC-Based Audio Prototyping Data source Data analysis REQUIREMENTS Simulink / MATLAB Simulink - Host DESIGN Algorithms Fixed-Point IMPLEMENTATION C, C++ TEST & VERIFICATION MCU DSP Processors INTEGRATION 18
19 Fixed-Point Modeling Data source Data analysis REQUIREMENTS Fixed-Point Simulink / MATLAB Simulink - Host DESIGN Algorithms Fixed-Point IMPLEMENTATION C, C++ TEST & VERIFICATION MCU DSP Processors INTEGRATION 19
20 C Code Verification Data source Data analysis REQUIREMENTS Black Box S-function Simulink - Host DESIGN Algorithms Fixed-Point IMPLEMENTATION C, C++ TEST & VERIFICATION MCU DSP Processors C code INTEGRATION 20
21 Automatic C Code Generation Data source Data analysis REQUIREMENTS Fixed-Point Simulink / MATLAB Simulink - Host DESIGN Algorithms Fixed-Point IMPLEMENTATION C, C++ TEST & VERIFICATION Embedded C MCU DSP Processors INTEGRATION 21
22 Processor-in-the-Loop Data source Simulink / MATLAB Data analysis REQUIREMENTS DESIGN Simulink - Host Target Algorithms Fixed-Point IMPLEMENTATION C, C++ TEST & VERIFICATION Embedded C??? MCU DSP Processors INTEGRATION 22
23 ADC DAC On-Target Rapid Prototyping Data source Data analysis REQUIREMENTS Simulink / MATLAB Simulink - Host Target DESIGN Algorithms Fixed-Point IMPLEMENTATION C, C++ TEST & VERIFICATION Embedded C? MCU DSP Processors INTEGRATION 23
24 Fixed-point design: motivation ASIC/FPGA or fixed-point DSP implementation Saves power and/or cost Word length and fraction length must be specified L-N N sign + integer fractional L 24
25 Fixed-point design: challenges It introduces degradation that must be assessed Quantization error Overflow / Underflow All variables must be converted including internals: this is error prone and often uninspiring L-N N overflow sign + integer fractional Quantization L 25
26 Fixed-point data type in MATLAB / Simulink A_fp = fi(a, 1, 32, 10) L-N N overflow sign + integer fractional Quantization L 26
27 CONCLUSIONS 27
28 Quickly Iterate between Idea and Prototype First prototype is functionally correct with automatic C code generation Spend your time in optimizing rather than debugging the code Find errors reusing the same testbench at each design step 28
29 29
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