Programmable Logic Devices II
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1 São José February 2015 Prof. Hoeller, Prof. Moecke ( 1 / 28 Lecture 01: Complexity Management and the Design of Complex Digital Systems Prof. Arliones Hoeller arliones.hoeller@ifsc.edu.br Prof. Marcos Moecke moecke@ifsc.edu.br
2 São José February 2015 Prof. Hoeller, Prof. Moecke ( 2 / 28 References These slides are based on the material made available by the authors of the books bellow David Money Harris and Sarah L. Harris, Chapter 1 - From zero to one, In Digital Design and Computer Architecture, Morgan Kaufmann, Burlington, 2007, Pages 3-48, ISBN , Pong P. Chu, Chapter 1 - Introduction to Digital System Design, In RTL Hardware Design Using VHDL: Coding for Efficiency, Portability, and Scalability. Wiley-IEEE Press, Hoboken, 2006, Pages 1-22, ISBN
3 São José February 2015 Prof. Hoeller, Prof. Moecke ( 3 / 28 Why PLD II if I already know VHDL? Fast reflection What have you done so far with your VHDL skills? Who would pay you to do that professionally? Even with you current skills, are you sure you know how to apply your VHDL knowledge to a product? Useful systems are complex! Intel i7 structural and physical views... someone wrote the VHDL for each one of those transistors!
4 São José February 2015 Prof. Hoeller, Prof. Moecke ( 4 / 28 Complexity Management Abstraction Discipline The Three -y's HierarchY ModularitY RegularitY
5 São José February 2015 Prof. Hoeller, Prof. Moecke ( 5 / 28 Abstraction Hide unimportant details Used in several fields Politics, demographics, etc Levels studied here Architecture Defines software interaction with the micro-architecture Micro-architecture Maps architecture functions (i.e. instructions) into logic Logic Implements complex structures from digital circuits Digital circuits Define logic circuits (AND, OR, NOT gates)
6 São José February 2015 Prof. Hoeller, Prof. Moecke ( 6 / 28 Discipline Intentionally restrict design choices Increases productivity at a higher level of abstraction Example: Flintlock Rifle First to use interchangeable, standardized parts Easier maintenance
7 São José February 2015 Prof. Hoeller, Prof. Moecke ( 7 / 28 Discipline In our realm: The Digital Discipline Discrete voltages instead of continuous voltage Digital circuits subset of analog circuits simpler to design than analog circuits easier to build more sophisticated systems Increasingly replacing analog systems i.e., digital cameras, digital television, cell phones, CDs
8 São José February 2015 Prof. Hoeller, Prof. Moecke ( 8 / 28 The Three -Y's Hierarchy A system divided into modules and submodules Hierarchy depth depends of each submodule complexity Modularity Having well-defined functions and interfaces There should be no side effects The design of a module cannot affect the function of another Regularity Encouraging uniformity, so modules can be easily reused Enables interchangeable modules
9 São José February 2015 Prof. Hoeller, Prof. Moecke ( 9 / 28 Example: The Flintlock Hierarchy Three main modules lock, stock, and barrel Submodules of lock hammer, flint, frizzen, etc. Modularity Function of stock mount barrel and lock Interface of stock length and location of mounting pins Regularity Interchangeable parts
10 São José February 2015 Prof. Hoeller, Prof. Moecke ( 10 / 28 The Digital Abstraction The world is analog Its variables are continuous Voltage, frequency, position of a mass, etc Digital abstraction uses a discrete subset of values Finite number of distinct values Example: The Analytical Engine Designed by Charles Babbage between 1834 and 1871 Considered to be the first digital computer 25 mechanical gears 10 positions per gear 10 discrete values per digit (0-9) 25 gears 25-bits machine Modern systems Binary representation Boolean logic Arithmetic operations over binary numeric representations
11 São José February 2015 Prof. Hoeller, Prof. Moecke ( 11 / 28 Why Digital? Advantages Reproducibility of information Flexibility and functionality: easier to store, transmit and manipulate information Economy: cheaper device and easier to design Moore's law Transistor geometry Technology doubles its density (number of transistors) every 18 months Devices become smaller, faster, and cheaper Now a chip consists of hundreds of million gates
12 São José February 2015 Prof. Hoeller, Prof. Moecke ( 12 / 28 Digital circuits in a wireless communication system transmitter receiver
13 São José February 2015 Prof. Hoeller, Prof. Moecke ( 13 / 28 Digital circuit in a control system
14 São José February 2015 Prof. Hoeller, Prof. Moecke ( 14 / 28 How to implement a digital system No two applications are identical and every one needs certain amount of customization Basic methods for customization General-purpose hardware with custom software General purpose processor e.g., performance-oriented processor (Intel i7), cost-oriented processor (8051 uc) Special purpose processor with architecture to perform a specific set of functions: e.g., DSP processor (for floating point computation), network processor (for buffering and routing), graphic engine (for 3D rendering) Custom hardware Custom software on a custom processor known as hardware-software co-design Trade-off between Programmability, Coverage, Cost, Performance, and Power consumption A complex application contains many different tasks and use more than one customization methods
15 São José February 2015 Prof. Hoeller, Prof. Moecke ( 15 / 28 System Representation View: different perspectives of a system Behavioral view Describes functionalities and I/O behavior Treats the system as a black box Structural view Describes the internal implementation components and interconnections Essentially block diagram Physical view Adds more info to structural view component size, component locations, routing wires e.g., layout of a print circuit board
16 São José February 2015 Prof. Hoeller, Prof. Moecke ( 16 / 28 Example: Structural and Physical views
17 São José February 2015 Prof. Hoeller, Prof. Moecke ( 17 / 28 Levels of Abstraction in Digital Systems Design How to manage complexity for a chip with 10 million transistors? Abstraction: simplified model of a system show the selected features Ignore associated detail e.g., timing of an inverter
18 São José February 2015 Prof. Hoeller, Prof. Moecke ( 18 / 28 Levels of Abstraction in Digital Systems Design Level of abstractions Transistor level Gate level Register transfer (RT) level Processor level Characteristics of each level Basic building blocks Signal representation Time representation Behavioral representation Physical representation
19 São José February 2015 Prof. Hoeller, Prof. Moecke ( 19 / 28 Summary transistor gate RT processor Typical blocks transistor, resistor and, or, xor, flip-flop adder, mux, register processor, memory Signal representation voltage logic 0 or 1 integer, system state abstract data type Time representation continuous function propagation delay clock tick event sequence Behavioral description differential equation Boolean equation extended FSM algorithms Physical description transistor layout cell layout RT level floor plan IP level floor plan
20 São José February 2015 Prof. Hoeller, Prof. Moecke ( 20 / 28 RT Level RT (Register Transfer) is a misleading term Should be module-level Two meanings Loosely: represent the module level Formally: a design methodology in which the system operation is described by how the data is manipulated and moved among registers View and abstraction are two independent aspects Combined in a Y-chart
21 São José February 2015 Prof. Hoeller, Prof. Moecke ( 21 / 28 Development Tasks and EDA Software Developing a digital system is a refining and validating process Main tasks Synthesis Physical design Verification Testing
22 São José February 2015 Prof. Hoeller, Prof. Moecke ( 22 / 28 Synthesis A refinement process that realizes a description with components from the lower abstraction level The resulting description is a structural view in the lower abstraction level Type of synthesis High-level synthesis RT level synthesis Gate level synthesis Technology mapping
23 São José February 2015 Prof. Hoeller, Prof. Moecke ( 23 / 28 Physical Design Placement and routing Refining from structural view to physical view Derive layout of a netlist Circuit extraction Determine the wire resistance of capacitance Others Derivation of power grid and clock distribution network, assurance of signal integrity etc.
24 São José February 2015 Prof. Hoeller, Prof. Moecke ( 24 / 28 Verification Check whether a design meets the specification and performance goals Concern the correctness of the initial design and the refinement processes Two aspects Functionality Performance (timing)
25 São José February 2015 Prof. Hoeller, Prof. Moecke ( 25 / 28 Method of Verification Simulation Spot check: cannot verify the absence of errors Can be computation intensive Timing analysis Just check delay Formal verification Apply formal math techniques determine its property E.g, equivalence checking Hardware emulation
26 São José February 2015 Prof. Hoeller, Prof. Moecke ( 26 / 28 Testing Testing is the process of detecting physical defects of a die or a package occurred at the time of manufacturing Testing and verification are different tasks Difficult for large circuit Need to add auxiliary testing circuit in design e.g., built-in self test (BIST), scan chain etc.
27 São José February 2015 Prof. Hoeller, Prof. Moecke ( 27 / 28 Limitation of EDA software EDA (Electronic Design Automation) EDA software can automate some tasks Can software replace human hardware designer? (e.g., C-program to chip) Synthesis software should be treated as a tool to perform transformation and local optimization cannot alter the original architecture or convert a poor design into a good one
28 Development Flow Medium-sized design targeting FPGA Circuit up to 50,000 gates Other designs Large-sized design targeting FPGA Design partition More verification Large-sized design targeting ASIC Thorough verification Testing Physical design São José February 2015 Prof. Hoeller, Prof. Moecke ( 28 / 28
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