Advanced Computing, Memory and Networking Solutions for Space 25 th Microelectronics Workshop November 2012
µp, Networking Solutions and Memories Microprocessor building on current LEON 3FT offerings UT699E: DMIPs performance increase; CAN, SPW, SPI and Ethernet UT700: same as above + provides operations in systems controlled by 1553 GR712: Dual-core LEON 3FT, also with various peripheral interfaces Future: Multi-core LEON 4FT Memory 16M, 32/64/128M and 40/80/160M SRAMs 2.5 and 3G Stacked SDRAMs Non--Volatile: 64Mb NOR Flash & 16Mb / 64Mb Non-Volatile MRAM Networking 1553: maintain legacy product offering SpaceWire: 4-port monolithic, IP blocks for routers and nodes LVDS: developing 130 and 90nm LVDS products, faster signaling rates RapidIO: 8b10b SerDes development, IP block offering 2
Aeroflex Microelectronic Solutions Leading Edge Building Blocks and IP POWER MANAGEMENT SERIAL COMMUNICATION CLOCK 90nm ASIC LOGIC RF CONVERTERS MEMORY RCV/XMIT MODULES INTERFACE DATA CONVERSION SIGNAL CHAIN REAL WORLD Temperature Pressure Flow Position
LEON µp Family UT699-3FT is fault-tolerant System-On-Chip Operationally Hardened by design Superior SEL performance TID of 100krad(Si) or 300krad(Si) QML-Q and QML-V parts available now Only LEON 3FT processor available in QML-V DMIPS performance 1.35 instructions per clock cycle Complete hardware and software development package Extensive applications support Access to Aeroflex Gaisler IP library New LEON products in development Increased performance Added functionality Evaluation Boards Available 4
Notional UT699 Systems 5
Notional GR712 Systems 6
Aeroflex Microprocessor Roadmap Functionality Aeroflex Gaisler GR712: Dual LEON 3FT 180 nm, 100 MHz 1.17 Dhrystone MIPS/MHz/core DMIPS: ~120/core New features: Reed Solomon, 1553 support 1 st prototypes: 2011; production: 2012 UT700 LEON 3FT: Same performance & schedule as UT699E, with additional interfaces, features 150MHz clock, ~180 DMIPS Interfaces: 1553, SPI; New: Reed Solomon, Ethernet DLC UT699 GR712 UT700 UT699E Next Generation quad LEON 4FT (UT840): Separate multi-set L1 caches, L2 cache, 64- or 128-bit AHB bus interface, Branch prediction 1.7 Dhrystone MIPS/MHz Targets 90 nm process, ~266MHz clock, ~450 DMIPS per core Gov t funded SEC for 90nm RH library (Q1 11) 1 st prototypes: ~ 2014/2015 UT840 GRxxx Enhanced UT699 LEON 3FT (UT699E; drop in for UT699) Improved clock speed, throughput and power Targets 130 nm process, ~100MHz clock, 120 DMIPS performance Power reduction: ~25-30% (1.2V core) IRAD kicked off late 2010 1 st prototypes: early 2013 = single core = dual core = quad core DMIPS: 75 150 225 300 375 450 Performance
Aeroflex Memory Family Latch up Immune, Enhanced Operational Hardened Memories Roadmap addresses SWOP (size, weight, power) Density Speed Power Universal package for high density memories Cost Effective Approaches QCOTS RHBD Legacy Products: Various SRAMs offered in 4M, 16M (various bus widths) Various PROMs: 64k, 256k Current Monolithic SRAM and Stacked SRAM 2.5 and 3.0G Stacked SDRAM 64M NOR FLASH 16M/16Mb MRAM Evaluation Boards Available Model available
SRAM MCMs, QCOTS, and NOR Flash Stacking of 16M monolithic SRAM Unique read architecture: lower power consumption with higher performance Uses electrical and package design techniques: highest density/area 2.5G - using 5 (64M x8 die) SDRAM die Optimally interfaced to 32 bit data bus with hamming code EDAC Perfect for interfacing to UT699! 3.0G using 6 (64M x8 die) SDRAM die Optimally interfaced to 32 bit data bus with Reed-Solomon EDAC Perfect for interfacing to GR712 & UT700! Configurable 3.3V 64Mb NOR Flash Configurable 8M x 8bit or Word mode 4M x 16bit 16Mb & 64Mb MRAM Superior Radiation Performance (both TID & SEU); inherent latch up immune
Future Memory Roadmap Volatile SRAMs 32Mb & 40Mb SRAM MCM 64Mb & 80Mb SRAM MCM 128Mb & 160Mb SRAM MCM SDRAMs SSRAMs DDR 64/80/96Mb SSRAM 2.5Gb & 3Gb SDRAM MCM Non-Volatile MRAM 64Mb MRAM Monolithic Future DDR offering NOR FLASH 16Mb MRAM 64Mb MRAM MCM 256Mb MRAM Monolithic In Production Prototyping 64Mb NOR FLASH In Development Proposed Density 10
Interface Components Networking products Products offered for communications from 1MHz to 3.125Gbps 1553 transceivers LVDS and RS-485 Drivers and Receivers SpaceWire Routers Parallel Clock SerDes 8b10b SerDes Expanding product portfolio to include faster lower power devices Using 130nm -or- 90nm ASIC technology and RHBD libraries Cold sparing all pins Low skew and jitter 3.3V, 2.5V, and 1.8V supply voltage Aeroflex Gaisler IP library allows prototyping in FPGA 11
Future Interface Roadmap
Voltage Supervisor Family Many device manufacturers call out specific power sequencing Some are recommended power on/off sequences Some are required Monitors up to 4 power supplies to determine whether minimum power supply threshold is met Holds other IC s in RESET until all power supplies have achieved minimum threshold Provides control signals for sequencing power Typical Applications: Microprocessor (LEON), FPGA, and/or ASIC power-up sequencing Prevents in-rush currents and bus contention Key Features 3.3V or 5V supplies 1, 2, 3 or 4 monitored supplies Pre-set or user programmable thresholds 13
ADC/Mux/Anti-Aliasing Filter Data Acquisition Systems RAD1419: Analog-to-Digital Converter 1us, 800kSPS, 14-bit sampling A/D, +/-5V, easy-to-use sample-and-hold and a precision reference UT14AD20P: 14-bit, 20-MSps CMOS ADC, low noise, low distortion performance RHD5940: 14-bit ADC approximation conversion Op Amps / Comparators RHD590* family Single power supply: 3.3V to 5V Very Low Power UT16MX11* Analog MUX family Selects one of 16 analog signals and switches into a common output pin Satellite Telemetry Signals, Sensor Interface, Nuclear Power Monitoring, or other Harsh Environments
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