LU Design -bit Full dder 4-bit rithmetic circuits dd/subtract/increament/decrement Circuit rithmetic and Logic Unit Flags Carry-Out, Sign, Zero, Overflow Shift and Rotate t Operations COE2 (Fall27) LU Design
rithmetic and Logic Unit Design The rithmetic and Logic Unit (LU) is a combinational digital circuit, within the CPU, responsible for performing all arithmetic and logic operations. The operation of the arithmetic unit of the LU is based on the Full dder, a circuit that adds two bits ( and B) and the carry out generated by the addition of the two bits in the previous column. To design an LU, for an N-bit processor, we first design the LU for bit, and then we cascade N -bit LUs to obtain the N-bit LU. COE2 (Fall27) LU Design 2
-bit Full dder Truth Table B Cin -Bit Full dder using gates B Cin 3/8 Dec. B C 2 3 -Bit F.. Logic Symbol En 4 5 6 7 -Bit Full dder using a decoder 8/ Mux I I I2 I3 I4 I5 I6 I7 S2 S S 4/ Mux I I I2 I3 S B B Cin Cin S2 S S I S S I I I2 I3 I4 I5 I6 I7 8/ Mux -Bit Full dder using 8/ multiplexers ' ' I I2 I3 S 4/ Mux -Bit Full dder using 4/ multiplexers COE2 (Fall27) LU Design 3
4-bit Full dder To obtain a 4-bit full adder we cascade four -bit full adders, by connecting the Carry Out bit of bit column M to the Carry In of the bit column M+, as shown below. The Carry In of the Least Significant column is set to zero. 3 B3 2 B2 B B -Bit F.. -Bit F.. -Bit F.. -Bit F.. S3 S2 S S Example: Find the bit values of the outputs t {,S3..S} S} of the full adder shown below, if {3.. = } and {B3..B = }. COE2 (Fall27) LU Design 4
4-bit Full Subtracter To obtain a 4-bit full subtracter we cascade four -bit full adders, by connecting the Carry Out bit of bit column M to the Carry In of the bit column M+, as shown below. The B input is inverted and the Carry In of the Least Significant column is set to one, since (-B) 2 = (B +) 2 s cm. The carry out () on the most significant bit is ignored. 3 B3 2 B2 B B -Bit F.. -Bit F.. -Bit F.. -Bit F.. S3 S2 S S Example: Find the bit values of the outputs {,S3..S} of the above full subtracter, t if {3.. = } and {B3..B B = }. COE2 (Fall27) LU Design 5
4-bit Incrementer n incrementer is a circuit the increments (add one) a value. To obtain a 4-bit incrementer we use a 4-bit full adder,as shown below. The B input is connected to zero the Carry In of the Least Significant column is set to one. 3 2 -Bit F.. -Bit F.. -Bit F.. -Bit F.. S3 S2 S S Example: Find the bit values of the outputs {,S3..S} of the above incrementer, if {3.. = }. COE2 (Fall27) LU Design 6
4-bit Decrementer decrementer is a circuit the decrements (subtract one) a value. To obtain a 4-bit decrementer we use a 4-bit full adder,as shown below. The B input is connected to one the Carry In of the Least Significant column is set to zero, since (-) 2 = () 2 s 2s cmpl. The carry out () on the most significant bit is ignored. 3 2 -Bit F.. -Bit F.. -Bit F.. -Bit F.. S3 S2 S S Example: Find the bit values of the outputs {,S3..S} of the above decrementer, if {3.. = }. COE2 (Fall27) LU Design 7
4-bit rithmetic Circuit The four arithmetic circuits of the previous F F Function examples can be combined to a single circuit that + B + B + performs all four functions. - B + B' + Two signals (F, F) are used to specify the + + + function to be performed. - + + B3 B3 B2 B2 B B B B 3 2 I3 I2 I I 4/ Mux S S -Bit Bit F.. I3 I2 I I 4/ Mux S S -Bit Bit F.. I3 I2 I I 4/ Mux S S -Bit Bit F.. I3 I2 I I 4/ Mux S S -Bit Bit F.. 4/ Mux I I3 S S I I2 F S3 S2 S S F COE2 (Fall27) LU Design 8
Expanding rithmetic Circuits The 4-bit arithmetic circuit of the previous example can be expanded to to 8, 2, 6, etc bits. The carry in of the first bit must be set according to the functions to be performed by the rithmetic Unit. 4/ Mux 7 6 5 4 B7 B6 B5 B4 3 2 B3 B2 B B I 3 2 B3 B2 B B Cin 3 2 B3 B2 B B Cin 4-Bit rithmetic Unit S S 4-Bit rithmetic Unit S S I I2 I3 S S F 3 2 3 2 F C S7 S6 S5 S4 S3 S3 S3 S2 COE2 (Fall27) LU Design 9
Example Design a 4-bit arithmetic circuit that performs the functions shown in the table: -bit rithmetic Circuit F F Function + B - B B - + 4-bit rithmetic Circuit COE2 (Fall27) LU Design
dding logic operations Design a 4-bit arithmetic and logic unit (LU) that performs the functions shown in the table: F2 F F Function +B - B + - ' or B and B xor B COE2 (Fall27) LU Design
Implementation of a -bit LU F2 F Function + B B - B B' + - ' or B and B xor B F 4/ Mux I I I 2 I 3 Cin Cin -Bit F B I 2/ Mux I I S -Bit rithmetic Unit -bit LU B F 2 S S Cin Cin F B F F B Output 2/ Mux S S I I S F I I I 2 S S B S S Output -Bit Bit Logic Unit I 3 4/ Mux -bit LU F 2 COE2 (Fall27) LU Design 2
Expanding to a 4-bit LU 4-bit LU is implemented using four -bit LUs Each -bit LU operates on a pair of input bits ( and B) The function signals (F2..) are connected in parallel to all -bit LUs The Carry-In of the LU for column n is connected to the Carry-Out of the LU for column n- The Carry-In of the LU for column is derived according to the Cin values of the function table. 3 B3 2 B2 B B 4/ Mux I -Bit LU F2 F F -Bit LU F2 F F -Bit LU F2 F F I -Bit LU I 2 F2 F F I 3 F F 3 2 COE2 (Fall27) LU Design 3
dding Flags to the LU Sign (S): Set to if the result is a negative number Zero (Z): Set to if the result is zero Carry out (C): Set to if there is a carry-out or borrow-in Overflow (V): Set to if there is a carry-out or borrow-in on signed integers 3 B3 2 B2 B B Cin Carry Out Q D EN 4-Bit rithmetic Unit 3 2 F2 F F Overflow Q D EN Sign Q D EN Zero Q D EN K COE2 (Fall27) LU Design 4
Logic Shift and Rotate Operations Logic shift operations move the bits of a register either to the left or to the right. logic is usually shifted into the least significant bit (lsb) after a logic shift left operation logic is usually shifted into the most significant ifi bit (msb) after a logic shift right operation The bit shifted out (msb for shift left or the lsb for shift right) is usually stored in the Carry-out tflag. rotate operation is similar to the shift operation, with the difference that The msb is shifted into the lsb after a rotate left operation The lsb is shifted into the msb after a rotate right operation Logic shift right operation Logic shift left operation Rotate only Rotate only 3 2 n- 2 n- COE2 (Fall27) LU Design 5
General Logic Shift/Rotate Unit function signal (F) selects between a shift left or shift right operation. For a general shift/rotate circuit the input to the lsb (n-) and msb (n+) are left open. This enable the implementation of either a shift or a rotate circuit or the expansion of the size of the circuit. Shift Unit 3 2 F 3 2 n+ 2 3 2 n- n+ n- n+ 3 2 4-bit Shift Unit n- S I I 2/ Mux S I I 2/ Mux S I I 2/ Mux S I I 2/ Mux S F 3 2 3 2 COE2 (Fall27) LU Design 6
Logic Shift and Rotate Operations With a shift left operation a logic is With a rotate left operation the shifted to the most significant bit MSBit is shifted to the LSBit. (MSBit). With a rotate right operation the With a shift right operation a logic LSBit is shifted to the MSBit. is shifted to the least significant bit (LSBit). Shift Left/Right F 3 2 3 2 2 Rotate Left/Right F 3 2 3 2 2 3 3 2 3 2 n+ 3 2 n- n+ 3 2 n- 4-bit Shift Unit S F 4-bit Shift Unit S F 3 2 3 2 3 2 3 2 COE2 (Fall27) LU Design 7
Combined Logic Shift and Rotate Operations Most LUs support both logic shift and logic rotate operations. function signal (F) is used to select between logic and rotate operations. Two 2-to- multiplexers are used to select the value directed to the n- and n+ of the Shift Unit Shift/Rotate Unit F F F 3 2 2 3 2 3 2 I S I 2/ Mux 3 2 S I I 2/ Mux 2 3 n+ 3 2 n- 4-bit Shift Unit S F 3 2 3 2 COE2 (Fall27) LU Design 8
Expanding a Logic Shift Unit In many cases it is necessary to expand the number of bits supported by a logic shift unit. The circuit below shows how two 4-bit Shift Units can be connected to obtain an 8-bit Shift Unit. 7 6 5 4 3 2 n+ n- n+ 3 2 n- n+ 3 2 n- 4-bit Shift Unit S 4-bit Shift Unit S F 3 2 3 2 7 6 5 4 3 2 COE2 (Fall27) LU Design 9
Connecting a Shift/Rotate Unit to an LU The inputs of a shift unit can be connected to one of the inputs of the LU. multiplexer can be used to select between the output of the LU or the output of the shift unit. n.. Bn.. F F F2 F3 F LU Cy S Z V Shift Unit F F I I 2/ Mux S F4 n.. COE2 (Fall27) LU Design 2