STAFF: State Transition Applied Fast Flash Translation Layer

Transcription

1 STAFF: State Transition Applied Fast Flash Translation Layer Tae-Sun Chung, Stein Park, Myung-Jin Jung, and Bumsoo Kim Software Center, Samsung Electronics, Co., Ltd., Seoul , KOREA Abstract. Recently, flash memory is widely used in embedded applications since it has strong points: non-volatility, fast access speed, shock resistance, and low power consumption. However, due to its hardware characteristics, it requires a software layer called FTL (flash translation layer). The main functionality of FTL is to convert logical addresses from the host to physical addresses of flash memory. We present a new FTL algorithm called STAFF (State Transition Applied Fast Flash Translation Layer). Compared to the previous FTL algorithms, STAFF shows higher performance and requires less memory. We provide performance results based on our implementation of STAFF and previous FTL algorithms. 1 Introduction Flash memory has strong points: non-volatility, fast access speed, shock resistance, and low power consumption. Therefore, it is widely used in embedded applications, mobile devices, and so on. However, due to its hardware characteristics, it requires specific software operations in using it. The basic hardware characteristics of flash memory is erase-before-write architectures [4]. That is, in order to update data on flash memory, if the physical location on flash memory was previously written, it has to be erased before the new data can be rewritten. In this case, the size of the memory portion for erasing is not same to the size of the memory portion for reading or writing 1 [4], which results in the main performance degradation in the overall flash memory system. Thus, the system software called FTL (Flash Translation Layer) [2,3,5,7,8, 9] is required. The basic scheme for FTL is as follows. By using the logical to physical address mapping table, if a physical address location corresponding to a logical address is previously written, the input data is written to another physical location which is not previously written and the mapping table is changed. In applying the FTL algorithm to real embedded applications, there are two major points: the storage performance and the memory requirement. In 1 Flash memory produced by Hitachi has different characteristics. That is, the size of the memory portion for erasing is same to the size of the memory portion for reading or writing. C. Müller-Schloer et al. (Eds.): ARCS 2004, LNCS 2981, pp , c Springer-Verlag Berlin Heidelberg 2004

2 200 T.-S. Chung et al. the storage performance, as flash memory has special hardware characteristics mentioned above, the overall system performance is mainly effected by the write performance. In particular, as the erase cost is much more than write and read cost, it is needed to minimize the erase operation. Additionally, the memory requirement for mapping information is important in real embedded applications. That is, if an FTL algorithm requires large memory for mapping information, the cost can not be approved in embedded applications. In this paper, we propose a high-speed FTL algorithm called STAFF (State Transition Applied Fast FTL) for flash memory system. Compared to the previous FTL algorithms, our solution shows higher performance and requires less memory. This paper is organized as follows. Problem definition and previous work is described in Section 2. Section 3 shows our FTL algorithm and Section 4 presents performance results. Finally, Section 5 concludes. 2 Problem Definition and Previous Work 2.1 Problem Definition In this paper, we assume that the sector is the unit of read and write operation, and the block is the unit of the erase operation on flash memory. The size of a block is some multiples of the size of a sector. Figure 1 shows the software architecture of a flash file system. We will consider the FTL layer in Figure 1. The File System layer issues a series of read and write commands with logical sector number to read from, and write data to, specific addresses of flash memory. The given logical sector number is converted to real physical sector number of flash memory by some mapping algorithm provided by FTL layer. Fig. 1. Software architecture of flash memory system Thus, the problem definition of FTL is as follows. We assume that flash memory is composed of n physical sectors and file system regards flash memory as m logical sectors. The number m is less than or equal to n.

3 STAFF: State Transition Applied Fast Flash Translation Layer 201 Definition 1. Flash memory is composed of blocks and each block is composed of sectors. Flash memory has the following characteristics: If the physical sector location on flash memory was previously written, it has to be erased in the unit of block before the new data can be rewritten. The FTL algorithm is to produce the physical sector number in flash memory from the logical sector number given by the file system. 2.2 Previous FTL Algorithms Sector Mapping. First intuitive algorithm is sector mapping [2]. In sector mapping, if there are m logical sectors seen by the file system, the raw size of logical to physical mapping table is m. For example, Figure 2 shows an example of sector mapping. In the example, a block is composed of 4 sectors and there are 16 physical sectors. If we assume that there are 16 logical sectors, the raw size of the mapping table is 16. When the file system issues the command write some data to LSN (Logical Sector Number) 9, the FTL algorithm writes the data to PSN (Physical Sector Number) 3 according to the mapping table. If the physical sector location on flash memory was previously written, the FTL algorithm finds another sector that was not previously written. If it finds it, the FTL algorithm writes the data to the sector location and changes the mapping table. If it can not find it, a block should be erased, the corresponding sectors should be backed up, and the mapping table should be changed. Fig. 2. Sector mapping Block Mapping. Since the sector mapping algorithm requires the large size of mapping information, the block mapping FTL algorithm [3,5,8] is proposed. The

4 202 T.-S. Chung et al. basic idea is that the logical sector offset within the logical block corresponds to the physical sector offset within the physical block. In block mapping method, if there are m logical blocks seen by the file system, the raw size of logical to physical mapping table is m. Figure 3 shows an example of the block mapping algorithm. If we assume that there are 4 logical blocks, the raw size of the mapping table is 4. When the file system issues the command write some data to LSN (Logical Sector Number) 9, the FTL algorithm calculates the logical block number (9/4=2) and sector offset (9%4=1), and then, it finds physical block number (1) according to the mapping table. Since the physical sector offset is identical to the logical sector offset (1) the physical sector location can be determined. Although the block mapping algorithm requires the small size of mapping information, if the file system issues write commands to the same sector frequently, the performance of the system is degraded since whole sectors in the block should be copied to another block. Fig. 3. Block mapping Hybrid Mapping. Since the both sector and block mapping have some disadvantages, the hybrid technique [7,9] is proposed. The hybrid technique first uses the block mapping technique to find the physical block corresponding to the logical block, and then, the sector mapping techniques used to find an available sector within the physical block. Figure 4 shows an example of the hybrid technique. When the file system issues the command write some data to LSN (Logical Sector Number) 9, the FTL algorithm calculates the logical block number (9/4=2), and then, it finds physical block number (1) according to the mapping table. After finding the block number, any available sector can be chosen to write the input data. In the example since the first sector in the block 1 is empty, the data is written to the

5 STAFF: State Transition Applied Fast Flash Translation Layer 203 first sector. In this case, since the logical sector offset within the logical block is not identical to the physical sector offset within the physical block, the logical sector number (9) should be written to the sector. When reading data from flash memory, FTL algorithm first finds the physical block number from the logical block number according to the mapping table, and then, by reading the logical sector numbers within the physical block, it can read the requested data. Fig. 4. Hybrid mapping Comparison. We can compare the previous FTL algorithms in two points of view: the read/write performance and memory requirement for mapping information. The read/write performance of the system can be measured by the number of flash I/O operations since the read/write performance is I/O bounded. If we assume that access cost of the mapping table in each FTL algorithms presented in the previous section is zero since it exists in RAM, the read/write cost can be measured by the following equations. C read = xt r (1) C write = p(t r + T w )+(1 p)(t r +(T e + T w )+T c ) (2) Where C read, C write are read and write cost respectively, T r, T w, and T e are flash read, write, and erase cost. T c is copy cost that is needed to move sectors within a block to other free block before erasing and to copy back after erasing. p is the probability that the write command does not require the erase operation. We assume that the input logical sector within the logical block is mapped to one physical sector within one physical block.

6 204 T.-S. Chung et al. In sector and block mapping methods, the variable x in the equation (1) is 1 because the sector location to be read can be found directly by the mapping table. However, in the hybrid technique, the value of the variable x is in 1 x n, where n is the number of sectors within a block. It is because that the request data can be read only after scanning the logical sector number stored in flash memory. Thus, the hybrid mapping has higher read cost compared to sector and block mapping. In writing case, we assume that a read operation is needed before writing to see the corresponding sector can be written. Thus, T r is added in the equation (2). Since T e and T c is high cost compared to T r and T w, the variable p isakey point in the write performance. Sector mapping has the smallest probability of requiring the erase operation and block mapping has the worst. Other comparison criteria is the memory requirement for mapping information. Table 1 shows the memory requirement for mapping information. Here, we assume that 128MB flash device that is composed of 8192 blocks and each block is composed of 32 sectors [4]. In sector mapping, 3 bytes are needed to represent whole sectors and in block mapping, 2 bytes are necessary. In hybrid mapping, 2 bytes are needed to for block mapping, and 1 byte for sector mapping within a block. Table 1 shows that block mapping is superior to the others. Table 1. Memory requirement for mapping information Addressing (B: Byte) Total Sector mapping 3B 3B * 8192* 32 = 768KB Block mapping 2B 2B *8192= 16KB Hybrid mapping 2B+1B 2B*8192+1B*32*8192 = 272KB 3 STAFF (State Transition Applied Fast FTL) STAFF is our FTL algorithm for flash memory. The purpose of STAFF is to provide a device driver for flash memory with maximum performance and small memory requirement. 3.1 Block States Machine Compared to previous work, we introduced the states of the block. A block in STAFF has the following states. F state: If a block is an F state block, the block is a free state. That is, the block is erased and is not written. O state: If a block is an O state block, the block is an old state. The old state means that the value of the block is not valid any more.

7 STAFF: State Transition Applied Fast Flash Translation Layer 205 M state: The M state block is in-order, free. The M state block is the first state from a free block and is in place. That is, the logical sector offset within the logical block is identical to the physical sector offset within the physical block. S state: The S state block is in-order, full. The S state block is created by the swap merging operation. The swap merging operation will be described in Section 3.2. N state: The N state block is out-of-order and is converted from an M state block. Fig. 5. Block state machine We have constructed a state machine according the states defined above and various events occurred during FTL operations. The state machine is formally defined as follows. Here, we use the notation about automata in [6]. An automaton is denoted by a five-tuples (Q,,δ,q o,f), and the meanings of each tuple are as follows. Q is a finite set of states, namely Q = {F, O, M, S, N}. is a finite input alphabet, in our definition, it corresponds to the set of various events during FTL operations. δ is the transition function which maps Q to Q. q 0 is the start state, that is a free state. F is the set of all final states. Figure 5 shows the block state machine. The initial block state is F state. When an F state block gets the first write request, the F state block is converted to the M state block. The M state block can be converted to two states of S and N according to specific events during FTL operations. The S and N state block is converted to O state block in the event e4 and e5, and the O state block is converted to the F state block in the event e6. The detailed description of the events is presented in Section FTL Operation The basic FTL operations are read and write operations.

8 206 T.-S. Chung et al. Algorithm 1 Write algorithm 1: Input: Logical sector number (lsn), data to be written 2: Output: None 3: Procedure FTL write (lsn, data) 4: if merging operation is needed then 5: do merging operation; 6: end if 7: if the logical block corresponding to the lsn has an M or N state block then 8: if corresponding sector is empty then 9: write the input data to the M or N state block; 10: else 11: if the block is the M state block then 12: the block is converted to the N state block; 13: end if 14: write the input data to the N state block; 15: end if 16: else 17: get an F state block; 18: the F state block is converted to the M state block; 19: write the input data to the M state block; 20: end if Write Algorithm. Algorithm 1 shows the write algorithm of STAFF. The input of the algorithm is the logical sector number and the data to be written. The first operation of the algorithm is checking the merging operation. We have two kinds of merging operation: swap and smart merging. The swap merging operation is occurred when a write operation is requested to the M state block which has no more space. Figure 6-(a) shows that the swap merging operation is performed. Here, we assume that a block is composed of 4 sectors. The M state block is converted to the S state block and one logical block is mapped to two physical blocks. In Figure 5, the event e2 corresponds to the swap merging operation. Fig. 6. Various write scenarios

9 STAFF: State Transition Applied Fast Flash Translation Layer 207 The smart merging operation is illustrated in Figure 6-(c). The smart merging operation is occurred when a write operation is requested to the N state block which has no more space. In the smart merging operation, a new F state block is allocated and the valid data in the N state block is copied to the F state block, which is now an M state block. In Figure 6-(c), since only one data corresponding to the lsn 0 is valid, it is copied to the newly allocated block. The smart merging operation is related to the events e5 and e1 in Figure 5. In line 7 of Algorithm 1, if the logical block corresponding to the input logical sector number doesn t have an M or N state block, it means that the logical block corresponding to the lsn has not been written. Thus, a new F state block is allocated and the input data is written to the F state block, which is now an M state block (line 17-19). If the logical block corresponding to the input logical sector number has an M state block or an N state block, the write algorithm examines that the sector corresponding to the lsn is empty. If the sector is empty, the data corresponding to the lsn is written to it. Otherwise, the data is written to the N state block. In our write algorithm, a logical block can be mapped to two physical blocks in maximum. Thus, when there is no space, one block is converted to an O state block. Figure 6-(b) shows this scenario. When allocating an F state block (line 17), if there is no free block available, merging operation is performed explicitly and erase operations may also be needed. Read Algorithm. Algorithm 2 shows the read algorithm of STAFF. The input of the algorithm is the logical sector number and the data buffer to read. The data to be read may be stored in the M, N, or S state block. If a logical block is mapped to two physical blocks, the two physical blocks are S and M state blocks or S and N state blocks. In this case, if input lsn corresponds to both the S state block and (N or M) state block, data in the N and M state block is valid one. If the M or N state block has no data corresponding to the lsn, the data may be stored in an S state block. Thus, data can be read from the S state block or the error message is printed. When reading data from the N state block, since the data may be stored in a physical sector offset which is not identical to the logical sector offset, valid data should be found. The valid data can be determined according to the write algorithm. The detailed algorithm is omitted because it is trivial. 4 Experimental Evaluation 4.1 Cost Estimation As mentioned earlier, we can compare the FTL algorithm in two points of view: memory requirement for mapping information and the flash I/O performance. Since STAFF is based on the block mapping, it requires small memory for mapping information as presented in Section 2.2. Compared with the 1:1 block

10 208 T.-S. Chung et al. Algorithm 2 Read algorithm 1: Input: Logical sector number (lsn), data buffer to read 2: Output: None 3: Procedure FTL read(lsn, data buffer) 4: if the logical block corresponding to the lsn has an M or N state block then 5: if the block is the M state block then 6: if the corresponding sector is set then 7: read from the M state block; 8: else 9: if the logical block has an S state block then 10: read from the S state block; 11: else 12: print: the logical sector has not been written ; 13: end if 14: end if 15: else {the block is the N state block} 16: if the sector is in the N state block then 17: read from the N state block; 18: else 19: if the logical block has an S state block then 20: read from the S state block; 21: else 22: print: the logical sector has not been written ; 23: end if 24: end if 25: end if 26: else 27: if the logical block has an S state block then 28: read form the S state block; 29: else 30: print: the logical sector has not been written ; 31: end if 32: end if mapping technique presented in Section 2.2, STAFF is a hybrid of 1:1 and 1:2 block mapping. Additionally, the N state block should have sector mapping information. In the flash I/O performance, the read/write cost can be measured by the following equations: C read = p M T r + p N k 1 T r + p S T r (where p M + p N + p S = 1) (3) C write = p first [(T f + T w )]+(1 p first )[p merge {T m + (4) p e1 T w +(1 p e1 )(k 2 T r + T w )} + (1 p merge ){p e2 (T r + T w )+(1 p e2 )(k 3 T r + T w )+ T r + p MN T w }]

11 STAFF: State Transition Applied Fast Flash Translation Layer 209 where 1 k 1,k 2,k 3 n. Here, n is the number of sectors within a block. In the equation (3), p M, p N, and p S are the probability that data is stored in the M, N, and S state block, respectively. In the equation (4), p first is the probability that the write command is the first write operation with the input logical block and p merge is the probability that the write command requires the merging operation. p e1 and p e2 are the probability that input logical sector can be written to the in place location with merging and without merging operation, respectively. T f is the cost for allocating a free block. It may require the merging and the erasing operation. T m is the cost for the merging operation. Finally, p MN is the probability that the write operation converts the M state block to the N state block. When the write operation converts the M state block to the N state block, a flash write operation is needed for marking states. The cost function shows that the read and write operations to the N state block requires some more flash read operation than the M or S state block. However, in flash memory the read cost is very low compared to the write and erase cost. Thus, since T f and T m may require the flash erase operation, they are dominant factors in evaluating the overall system performance. STAFF is designed to minimize T f and T m that require the erase operation. 4.2 Experimental Result In overall flash system architecture presented in Figure 1, we implemented various FTL algorithms and compared them. The physical flash memory layer is simulated by a flash emulator [1] which has same characteristics as real flash memory. We have compared three FTL algorithms: Mitsubishi FTL [8], SSR [9], and STAFF. The Mitsubishi FTL algorithm is based on the block mapping algorithm presented in Section 2.2 and the SSR algorithm is based on the hybrid mapping. We have not implemented the sector mapping algorithm. It is not a realistic FTL algorithm since it requires too much memory. The FAT file system is widely used in embedded system. Thus, we got access patterns that the FAT file system on Symbian operating system [10] issues to the block device driver when it gets a 1MB file write request. The access patterns are very similar to the real workload in embedded applications. Figure 7 shows the total elapsed time. The x axis is the test count and the y axis is the total elapsed time in millisecond. At first, flash memory is empty, and flash memory is occupied as the iteration count increases. The result shows that STAFF has similar performance to hybrid mapping and has much better performance than block mapping. Since STAFF requires much smaller memory space compared to the hybrid mapping technique, it may be efficiently used in embedded applications. Figure 8 shows the erase count. The result is similar to the result of the total elapsed time. This is because the erase count is a dominant factor in overall system performance. In particular, when flash memory is empty, STAFF shows better performance. It is due to that STAFF delays the erase operation. That is,

12 210 T.-S. Chung et al The total elapsed time ssr mistubishi staff 4000 Elapsed time (ms) Test count Fig. 7. The total elapsed time The erase count ssr mistubishi staff 300 Count Test count Fig. 8. Erase counts by using the O state block, STAFF delays the erase operation until there is no more space available. If the system provides concurrent operation, the O state blocks can be converted to the F state blocks by another process in STAFF. In addition, STAFF shows the consistent performance although flash memory is fully occupied. Figure 9 and Figure 10 shows the read and write counts respectively. STAFF shows reasonable read counts and best write counts. [4] says that the running time ratio of read (1 sector), write (1 sector), and erase (1 block) is 1:7:63 approximately. Thus, STAFF is a reasonable FTL algorithm.

13 STAFF: State Transition Applied Fast Flash Translation Layer The read count ssr mistubishi staff Counts Test count Fig. 9. Read counts The write count ssr mistubishi staff Counts Test count Fig. 10. Write counts 5 Conclusion In this paper, we propose a novel FTL algorithm called STAFF. The key idea of STAFF is to minimize the erase operation by introducing the concept of state transition in the erase block of flash memory. That is, according to the input patterns, the state of the erase block is converted to the appropriate states, which minimizes the erase operation. Additionally, we provided low cost merging operations: swap and smart merging. Compared to the previous work, our cost function and experimental results show that STAFF has reasonable performance and requires less resources.

14 212 T.-S. Chung et al. For future work, we have plan to generate intensive workloads in real embedded applications. We can customize our algorithm according to the real workloads. Acknowledgments. The authors wish to thank Jae Sung Jung and Seon Taek Kim for their FTL implementations. We are also grateful to the rest of Embedded Subsystem Storage group for enabling this research. References 1. Sunghwan Bae. SONA Programmer s guide. Technical report, Samsung Electronics, Co., Ltd., Amir Ban. Flash file system, United States Patent, no. 5,404, Amir Ban. Flash file system optimized for page-mode flash technologies, United States Patent, no. 5,937, Samsung Electronics. Nand flash memory & smartmedia data book, Petro Estakhri and Berhanu Iman. Moving sequential sectors within a block of information in a flash memory mass storage architecture, United States Patent, no. 5,930, John E. Hopcroft and Jeffrey D. Ullman. Introduction to automata theory, languages, and computation. Addison-Wesley Publishing Company, Jesung Kim, Jong Min Kim, Sam H. Noh, Sang Lyul Min, and Yookun Cho. A space-efficient flash translation layer for compactflash systems. IEEE Transactions on Consumer Electronics, 48(2), Takayuki Shinohara. Flash memory card with block memory address arrangement, United States Patent, no. 5,905, Bum soo Kim and Gui young Lee. Method of driving remapping in flash memory and flash memory architecture suitable therefore, United States Patent, no. 6,381, Symbian