1 = Enable SOD 0 = Disable SOD. Serial Output Data. Fig.12.9 SIM Instruction Format

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1 Lecture-67 The 8085 Serial I/O Lines: SOD & SID The 8085 microprocessor has two pins specially designed for software control serial I/O. One is called SOD (serial output data) and the other is called SID (serial input data). Data transfer is controlled through two instructions SIM &RIM. The instruction SIM is necessary to output data serially from the SOD line. SIM instruction uses the data available in accumulator (A). The two MS bits, D 7 and D 6, of accumulator are used for serial data transmission as shown in fig D7 D6 D5 D4 D3 D2 D1 D0 SOD SOE R7.5 MSE M7.5 M6.5 M5.5 1 = Enable SOD 0 = Disable SOD Interrupt Bits Serial Output Data Fig.12.9 SIM Instruction Format The serial data line is enabled when SOE=1. Only then either 0 or 1 can be outputted to SOD pin. The following set of instructions output the carry bit (may be 0 or 1 ) to serial output port. MVI A, 80H RAR SIM

2 In this set of instructions, the serial output line is enabled by rotating 1 into bit position D 6 ; the instruction SIM output the carry bit through bit position D 7. As discussed earlier, SIM instruction is a dual purpose instruction and used both for interrupt mask control and serial communication. When it is used only for serial communication, MSE bit is kept 0 so that the interrupts are not affected by this instruction. Similarly, if interrupt masks are to be changed without affecting the serial output line, SOE is kept 0. Instruction RIM is used to input serial data through the SID line. When RIM instruction is executed it reads the data from serial input port to the position D 7 in accumulator (A) as shown in fig D7 D6 D5 D4 D3 D2 D1 D0 SID I7.5 I6.5 I5.5 INTE M7.5 M6.5 M5.5 Serial Input Data Fig RIM Instruction Format Interrupt Bits The SID and SOD lines in the 8085 eliminate the need for an input port and an output port in the software controlled serial I/O. Externally SID is a 1-bit input port and SOD is 1-bit output port. Serial Data Transmission Through SOD Lines of 8085 Let us consider, a block of data (say N) is to be transferred from microprocessor 1 serially SID line to microprocessor 2 at a baud rate

3 of 110. The characters are stored in sequential memory location starting from DATA. Main Set Counter for N characters Set Pointer to 'DATA' Get Character from Memory Update Memory Pointer CALL SODSR for Transmission Decrement Counter Is Counter = 0 Stop Fig Flow Chart for Transmission of Data Each character to be transmitted is an 8-bit data. Let us assume, that no parity check is required and there is one START bit

4 which is always 0 and two stop bits which are 1 for each character. Since baud rate is 110 bits/sec, therefore Bit Time (T B )= =9.1 msec Therefore, to transmit a character with 110 baud rate, eleven bits must be transmitted at an interval of 9.1msec. This transmission requires a counter and a time delay subroutine of 9.1msec. The counter can be setup to count all eleven bits or just eight bits of the character with separate start & stop bits. The flow chart to transmit N character via SOD is shown in fig and the corresponding ALP is given below: MAIN: MVI D,N ; Initialize counter LXI H, DATA ; Initialize memory pointer NEXT: MOV B,M ; Read character to be transmitted INX H ; Update memory pointer CALL SODSR ; Transmit the data from register (B) DCR D ; Decrement counter JNZ NEXT ; If counter is not zero go back for HLT ; next data and then stop Serial Output Data Subroutine (SODSR): This subroutine converts parallel eight bits in to stream of serial bits and then transmits START bit, data bits and two STOP bits, total eleven bits with 110 baud rate. Instead of sending stop bits separately after data bits, STC instruction is used while transmitting data bits so that after data bits automatically STOP bits are transmitted one by one. Therefore, the counter used to count data

5 bits is also used to count STOP bits. The character to be transmitted is transferred to subroutine through register (B). SODSR: MVI C, 0B ; Setup counter to count eleven bits XRA A ; Reset carry to 0 NEXT: MVI A, 80H ; Set D 7 to 1 in the (A) RAR ; Bring carry in D 7 and set D 6 =1 ; First time D 7 bit is 0 for START bit SIM ; Output MSB of (A) on SOD line CALL BIT_TIME ; Wait for 9.1 msec i.e. bit time STC ; Set carry to 1 for STOP bits MOV A,B ; Place ASCII character in (A) RAR ; Place D 0 in the carry, shift 1 in D 7 ; and continue shifting in each loop MOV B,A ; Save rotated data in (B) register DCR C ; After transmitting one bit decrement ; counter JNZ NEXT ; If all bits are not transmitted then ; go back for next bit transmission RET ; Return to main after transmitting ; one character The program can be explained as below: 1) In this program, let us consider two instructions MVI A, 80H RAR When D 7 is rotated into D 6, the SOD line is enabled for each loop and the contents of the carry flag are placed in D 7.

6 2) Let us consider, the following instructions: STC MOV A, B RAR Instruction STC places 1 into the carry and the instruction MOV A, B places ASCII character in the accumulator. Instruction RAR brings 1 from the carry in D 7 and places ASCII bit into carry. 3) In the 2 nd iteration, the first RAR places ASCCII bit from the carry in to D 7 and 1 from 80H into D 6. Instruction SIM outputs ASCII bit from bit D 7 to SOD line. 4) The logic 1 s set by instruction STC and saved in register (B), are shifted right by one position every iteration. In the n th iteration when ASCII D 7 is set out, register (B) will have all 1 s from D 0 to D 7. In the last two iterations, logic 1 s are sent out as STOP bits. Serial Data Reception Through SID Line of 8085: Let us consider the microprocessor 2 has to receive the data available at SID line sent by the microprocessor 1 on SOD line. The SOD of microprocessor 1 is connected to SID of microprocessor 2. It is same as TxD of one system is connected to RxD of another system. The data must be received at the same band rate 110. The data is having one start bits, no parity bit and two stop bits. The data received will be stored in sequential memory location starting from DATA. The data is received by checking the start bit first. The flow chart is given in fig

7 Main Set Counter for N characters Set Pointer to 'DATA' CALL SIDSR for Transmission Store Data in Memory Update Memory Pointer Decrement Counter Is Counter = 0 Stop Fig Flow Chart for Receiving Data The assembly language program is written bellow: MAIN: MVI D,N ; Initialize counter LXI H, DATA ; Initialize memory pointer NEXT: CALL SIDSR ; Received data in register (B) MOV M, A ; Store read data in memory INX H ; Update memory pointer DCR D ; Decrement counter JNZ NEXT ; If counter is not zero go back for HLT ; next data and then stop

8 The flow chart for SIDSR is shown in fig Enter Setup Bit Counter Read SID Wait for One Bit Time Is SID line HIGH Read SID Save the Bit Read Wait for Half Bit Time Decrement bit Counter Read SID Is SID line LOW Return Are All Bits Received Add Bit to Previous Bits Fig Flow Chart to Receive a Character

9 The assembly language program is given below: SIDSR: RIM ; Read SID line RAL ; Rotate D 7 into carry JC SIDSR ; If D 7 =1 this is not a start bit ; Go back and read SID line again CALL HALF_BIT ; If D 7 = 0 wait for half bit time RIM ; Read SID line RAL ; Check received bit again JC SIDSR ; If SID = 1 this is not a valid start ; bit. Go back to read SID line again MVI C, 09H ; Set bit counter NXTBIT: CALL BIT_TIME ; Wait for one bit time interval RIM ; Read SID line to sample data bit RAL ; Save the bit received in carry DCR C ; Decrement counter to check ; whether all data bits read RZ ; If yes, return to main program MOV A,B ; Place the bits saved so far in (A) RAR ; Place the bit save in the carry into ; position D7 and shift all bits right MOV B,A ; Save all bits received in register (B) JMP NXTBIT ; Get the next bit

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