68000 Architecture, Data Types and Addressing Modes. 9/20/6 Lecture 2 - Prog Model 1

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1 68000 Architecture, Data Types and Addressing Modes 9/20/6 Lecture 2 - Prog Model 1

2 Lecture Overview Assembler Language Programmers Model Registers Addressing Modes 9/20/6 Lecture 2 - Prog Model 2

3 Assembler Language Programming language very close to the machine code for a language Can be considered a native language for the architecture targeted. Assembler languages have a 1-to-1 translation to machine code All assemblers have two types of statements Executable instructions Assembler directives 9/20/6 Lecture 2 - Prog Model 3

4 Assembler Directives TTL Title gives the program a user-defined name EQU **Links a pneumonic name to a value. Very valuable in making the program readable. Example to reserve 128 bytes for a stack. STACK_FRAME EQU 128 Define a stack frame of 128 bytes *** LINK A1,# -STACK_FRAME 9/20/6 Lecture 2 - Prog Model 4

5 Assembler Directives (2) DC Define constant. Allows the programmer to set memory locations to specific values. Qualifier specifies data type:.b,.w,.l ORG $ FST DC.B 10, 66 Set constants of 10 and 66 DC.L $0A1234 Store $000A1234 in memory STR DC.B April Store ASCII values 9/20/6 Lecture 2 - Prog Model 5

6 Assembler Directives (3) DS Reserve bytes, words, or longwords of storage ORG Define the value of the location counter. Sets the memory address where the code is placed. SECTION Set the address counter to zero for position independent code. END 9/20/6 Lecture 2 - Prog Model 6

7 Assembler Code Example 9/20/6 Lecture 2 - Prog Model 7

8 Programmers Model When looking at any architecture what does the programmer see? REGISTERS (General purpose) ADDRESS REGISTERS SPECIAL PURPOSE REGISTERS MEMORY Allowable operations and data transfers supported 9/20/6 Lecture 2 - Prog Model 8

9 DATA REGISTERS A 32-bit machine 8 general purpose Called D0 to D7 Any operation permitted on Di can also be done on Dj Data access 8,16,32 bits 9/20/6 Lecture 2 - Prog Model 9

10 Address Registers 8 Address Regs Labeled A0 to A7 Entire 32 bits is single entity value Any operation permitted on Ai is also allowed on Aj 2 s complement value treatment Used in instructions to address memory 9/20/6 Lecture 2 - Prog Model 10

11 Special Purpose Registers 2 such registers PC Program Counter Contains the address of the next instruction to be executed. SR Status Register 16 bits divided into two bytes MSB System byte control operation mode LSB Condition codes 9/20/6 Lecture 2 - Prog Model 11

12 Status Word 9/20/6 Lecture 2 - Prog Model 12

13 Addressing Modes Modes supported are reflective of even the most modern architecture Some Notation [Dx] means the contents of % num means binary $ num means hexadecimal indicates transfer of information Table on page 27 lists meaning of symbols and notation 9/20/6 Lecture 2 - Prog Model 13

14 Immediate Addressing ACTION: The value of the operand (data) is loaded into the specified register at the time the program runs. The value of the operand is used in the operation Note that general form of instructions is Operation #Source, Destination MOVE.W #$8123,D3 [D3(0:15)]$8123 Fill the low order bytes of De MOVE.L #$8123,D3 [D3(0:31)]$ Fills all 32 bits of register D3 9/20/6 Lecture 2 - Prog Model 14

15 Absolute Addressing Sometimes called Direct Addressing The address in memory being referenced by the instruction is given in the instruction. Used when the address of the operand is known when the program is written. The instruction contains the operand s address FORM Operation source,destination MOVE.L D3,$1234 [M($1234)][D3(16:31)] [M($1236)][D3(0:15)] MOVE.W $1234,D3 [D3(0:15)][M($1234)] 9/20/6 Lecture 2 - Prog Model 15

16 Register Direct Addressing Register to register operation The assembler instruction lists both register which will be used for operand of the operation to be performed The 2 nd register listed is both the 2 nd operand of the operation and gets the results of the operation. Example: MOVE.L D0,D3 Effect: [D3] [D0] 9/20/6 Lecture 2 - Prog Model 16

17 Address Register Indirect Register Indirect means that the address of the operand is in a register, the address registers. Ex: ASSEMBLER MOVE.L (A0), D3 MOVE.W D4, (A6) RTL [D3] [M(A0)] [M([A6])] [D4(0:15)] 9/20/6 Lecture 2 - Prog Model 17

18 Forms of Address Reg. Indirect Address Register Indirect with postincrement The contents of the address register are incremented by the appropriate amount after use That is, the data is referenced with the value currently in the address register. Then the contents of the register are incremented by the size referenced. Address Register Indirect with predecrement Contents are decremented and then used What use may these have? 9/20/6 Lecture 2 - Prog Model 18

19 Forms of Address Reg. Indirect (2) Address Register Indirect with displacement A 16-bit displacement is specified in instruction Displacement added to address register to obtain the effective address of the operand Register Indirect with Index Addressing Effective address is calculated by adding the address register + 8-bit signed displacement + contents of general purpose register Ref fig 2.15 of text, pg.39 9/20/6 Lecture 2 - Prog Model 19

20 PC Relative Similar to register indirect except that the address of the operand is specified with respect to the PC contents. Allows data to be located relative to the location of the program in memory, i.e., relative to the Program Counter allows WHAT???? Restricted to only the source operand 9/20/6 Lecture 2 - Prog Model 20

21 PC Relative Allows data to be located relative to the location of the program in memory, i.e., relative to the Program Counter allows position-independent code. What is position-independent code? 9/20/6 Lecture 2 - Prog Model 21

22 PC Relative Allows data to be located relative to the location of the program in memory, i.e., relative to the Program Counter allows position-independent code. What is position-independent code? Code that can be located anywhere (some caveats) in memory and executes the same. 9/20/6 Lecture 2 - Prog Model 22

23 The Stack With autoincrementing/autodecrementing of address register you have essentially 8 stacks. In this way register A0 through A7 can become user defined stacks For Jump to Subroutine, register A7 is used So you may not want to use address register A7 for programs that calls to subroutines The stack grows down and the register points to the TOS element and has valid contents. 9/20/6 Lecture 2 - Prog Model 23

24 Stack Operations PUSH data onto stack Stack grows down. TOS has valid data. Use the predecrement form MOVE.W $4234, -(A7) POP data from stack Use the postincrement form MOVE.W (A7)+,D4 9/20/6 Lecture 2 - Prog Model 24

25 Assignment From Text HW1 Problem 2-1 parts a,b,d,g Problem 2-5 Problem 2-6 9/20/6 Lecture 2 - Prog Model 25

Addressing Modes. To review data transfer instructions and applying the more advanced addressing modes.

Addressing Modes. To review data transfer instructions and applying the more advanced addressing modes. Addressing Modes Aims To review 68000 data transfer instructions and applying the more advanced addressing modes. Intended Learning Outcomes At the end of this module, students t should be able to Review