Physics 116B Winter 2006: Problem Assignment 8

Size: px
Start display at page:

Download "Physics 116B Winter 2006: Problem Assignment 8"

Transcription

1 Physics 116B Winter 2006: Problem Assignment 8 Due Wednesday, March You may use a calculator for the following: (a) Convert to decimal: $9F03. (b) Express in binary: $3CFA. (c) Convert to hexadecimal: 343. (d) Convert to a 16 bit signed integer in 2 s complement notation: -27. (e) Convert from 2 s complement signed integer to decimal: $FCA3. 2. Consider the MAS M68000 Mac program on the next page. The lines are numbered in the left column. (a) The MAS code uses certain Macintosh conventions to allow instruction code and data segments to be relocated in memory without needing to change the instruction codes. i. Which two M68000 registers are used to achieve this capability? ii. Give an example of an M68000 addressing mode which may be used for the instruction area to achieve this. Give an example for the data area. (Refer to Sec. 2.2 of the M68000 Programmer s Manual.) iii. In writing your own code, what precaution must be taken regarding use of the address registers because of this? iv. Which (if any) of the following lines of code are unaffected by this convention: 12, 14, 15, 20, 21? Explain briefly. (b) Suppose the jsr on line 14 was replaced with jmp. Would the program go to line 29 anyway? If so, what would go wrong later? Explain in some detail. (c) Do any instructions make use of numerical constants stored in the program code segment? If so, give one example and explain briefly. (d) On line 41, suppose D0 ($40) initially. What is the HEX number (and the corresponding ASCII character) in D0 after the operation on line 41? (e) The program modifies characters so it only has to search in the range ASCII a to f (lower case only). Show how to change the program to modify characters such that the search is in the range A to F (upper case only) and return the proper HEX value. Just list the lines which you change. 1

2 Sum_of_Chars_Mod_MASn.a Printed: Thursday, March 17, :31:27 PM Page 1 of 1 1 ; Program to read nchar ASCII characters and sum up any HEX digits (0-F) 2 ; HEX digits can also be lower case 3 ; This is the MAS version 4 ; Just uses a pre-defined string of characters starting at msg. Sum is in D2 at end. 5 ; Output result to screen when done 6 7 xref strout, decout, newline, stop 8 9 start: lea msg,a1 ; put address of msg in a1 10 move.w nchar,d1 ; number of bytes to read 11 clr.w d2 ; clear the register for the sum (specify.w) 12 jmp enter ; enter loop at end 13 loop: move.b (a1)+,d0 ; move the character from msg array to d0 14 jsr cnvhx ; subroutine to find valid HEX digits 15 add.w d0,d2 ; number or 0 returned in d0 16 enter: dbra d1,loop ; subtract 1 from d1 and see if done 17 ; all data processed, sum in d2 18 ; now output the information 19 jsr newline 20 lea msg5,a0 ; output sum message 21 move.w #31,d0 22 jsr strout 23 move.w d2,d0 ; output the sum 24 jsr decout 25 jsr newline 26 jsr stop ; end of program 27 ; Subroutine cnvhx tests ASCII characters to see if they represent HEX digits 28 ; and if so, returns value (.w) in d0. If not valid digit, returns 0 29 cnvhx: and.b #$7F,d0 ; mask off parity bit of character 30 cmp.b #$30,d0 ; see if it is less than $30 31 blt exit ; if so, exit subroutine with zero result 32 cmp.b #$39,d0 ; see if it is greater than $39 33 bgt skip ; if so, check for a-f 34 and.w #$000F,d0 ; return 16 bit pos. number in d0 35 rts ; all done if exit: clr.w d0 ; not a hex digit - return 0 as 16 bit word 37 rts 38 ; Look for hex digits ($41-$46 for A-F or $61-$66 for a-f) 39 ; Set bit 5 (lsb=0) so we only have to check lower case characters 40 ; When get valid digit, subtract $57 to convert to HEX value 41 skip: or.b #$20,d0 ; set bit to assure lower case 42 cmp.b #$61,d0 ; see if less than $61 (a) 43 blt exit ; if so exit with 0 result 44 cmp.b #$66,d0 ; see if greater than $66 (f) 45 bgt exit ; exit with 0 result 46 sub.b #$57,d0 ; found valid HEX digit offset by $57 from value 47 and.w #$000F,d0 ; clear high order bits (if any) for 16 bit word 48 rts 49 data 50 msg5: dc.b 'The sum of numbers entered is: ' 51 msg: dc.b 'abc89hijkl85973nb642abc89hijkl85973nb642' ; define character string 52 nchar: dc.w 40 ; number of characters to read 53 even 54 end 55 2

3 3. Consider the EASY68k program on the next page. The lines are numbered in the left column. This time, we are just summing any ASCII characters that happen to be decimal integers. The data are read from the keyboard and output to the screen using EASY68k I/O routines which rely on the trap #15 instruction. The use of these routines is explained in the included table from the EASY68k help commands. The trap instruction itself is discussed on p of the M68000 Microprocessor User s Manual. It is useful for implementing system program calls as is done here. The result is equivalent to a MAS system subroutine call although the mechanism is different. Notice the use of absolute addressing for the code and data via the org directive for the assembler. That is, the first instruction with the label start will be placed at location $1000. The storage area for msg will begin at $2000. (a) The instruction on line 8, lea are hex). msg, a1, is assembled as 43F (numbers i. Look up LEA in the M68000 Programmer s Reference Manual. Compare the binary pattern of the first word of this instruction and verify it is what you expect (explain). Check the register field and effective address field (mode, register) to determine the addressing mode for this operation. ii. Look up the behavior of this addressing mode in Sec. 2.2 of the manual. Verify that the last 4 bytes are what you expect (explain). iii. Would you expect this addressing mode to be used in the Mac program with the MAS system? Explain briefly. (b) The instruction jsr addit (line 18) is located at address $1022 and the next instruction (line 19) at $1028. Prior to executing line 18, the stack pointer contains $ Upon entry to the addit subroutine on line 32, answer the following. i. What is the contents of the stack pointer? ii. What is the 32 bit word contained in the memory address referenced by the stack pointer? (c) If the ASCII character for zero ( 0) is in d0 on entry to the addit subroutine on line 32, what is the contents (i) of the Z condition code and (ii) the N condition code after line 33 is executed? Note: You are strongly encouraged to get EASY68k to run or modify this program. A text file of the code is on the Physics 116 site. You can use the EASY68k simulator to watch the registers, memory and stack as you run the program. Breakpoints can be set to stop the execution if you want to look at registers. Also, there are two modes of single-stepping. One steps over user subroutines (runs them but does not trace execution) while the other traces execution into the subroutine. 3

4 Sum_of_chars_wIO.txt Printed: Thursday, March 9, :09:38 PM Page 1 of 1 1 ; Program to read, store and echo string of 20 ASCII characters and sum up any integers 2 ; Modified for Easy68K simulator - uses Easy68k trap instructions for I/O 3 ; Sum in D2 at end, display on screen 4 5 start: org $ move.w #2,d0 ; set up registers for trap instruction to read string 7 move.w nchar,d1 ; number of characters to read in d1 (80 max) 8 lea msg,a1 ; load the address of msg in a1 (must use LEA) 9 trap #15 ; do EASY68k I/O operation 10 move.w #0,d0 ; display string on screen 11 trap #15 ; do EASY68k I/O operation ; begin processing clr d2 ; clear the register for the sum 16 jmp enter ; enter loop at end 17 loop: move.b (a1)+,d0 ; move the character from msg array to d0 18 jsr addit ; subroutine to test and add integers 19 enter: dbra d1,loop ; subtract 1 from d1 and see if done ; all data processed, sum in d2 - now display number on screen move.l d2,d1 ; put result in d1 for EASY68k I/O 24 move.w #3,d0 ; display number on screen 25 trap #15 ; do EASY68k I/O operation STOP #$2000 ; end of program ; Subroutine addit tests ASCII characters to see if they represent numbers 30 ; and if so, adds them to the sum in d addit: and.b #$7F,d0 ; mask off parity bit of character 33 cmp.b #$30,d0 ; see if it is less than $30 34 blt skip ; if so, skip to return statement 35 cmp.b #$39,d0 ; see if it is greater than $39 36 bgt skip ; if so, skip to return statement 37 and.w #$000F,d0 ; get the number 38 add.w d0,d2 ; add to sum in d2 39 skip: rts ; return from subroutine org $2000 ; data storage area 42 msg: ds.b 80 ; storage for string of ASCII characters 43 nchar: dc.w 20 ; number of characters to read 44 END START 4

5 4. Refer to the posted Week 11 lecture notes for the following: (a) A block diagram of a successive approximation ADC is shown above. Bit 1 is the least significant bit of the output binary number. The voltage to be measured is v in. i. Consider a 3 bit ADC as an example (n=3 in the diagram above). What is the first binary number sent to the DAC by the successive approximation control register? ii. If the comparator output is low, what 3 bit number is sent next? iii. As a result, if the comparator output is now high, what number is sent next? iv. Now the comparator output is low. What is the 3 bit ADC value for this input voltage? v. What is the main advantage of this ADC over a simple counting (or counter-ramp) ADC? (b) The high frequency cutoff of ordinary telephone signals is 3400 Hz. Could such signals be digitized at a sampling rate of 8000 Hz and reproduced accurately? Explain briefly. (c) Would the presence of a 5000 Hz signal cause a problem with an 8000 Hz sampling rate? Explain briefly. 5

Today s objective: introduction to really simple subroutines to simplify program structure for I/O

Today s objective: introduction to really simple subroutines to simplify program structure for I/O a 1 st look procedures and functions in high level languages are modeled on subroutines typically, assembly code is very modular with the main routine less than 100 lines long Today s objective: introduction

More information

Lab 2 Use Traps. Lab 2 Input and Output 2 nd Semester. Lab 2 English. Lab 2 Pseudocode

Lab 2 Use Traps. Lab 2 Input and Output 2 nd Semester. Lab 2 English. Lab 2 Pseudocode Lab 2 Input and Output Lab 2 Use Traps Write (i.e. design and implement) an assembly language program that will accept user input from the keyboard and echo this to the terminal screen. Input should terminate

More information

Tutorial 1 Microcomputer Fundamentals

Tutorial 1 Microcomputer Fundamentals Tutorial 1 Microcomputer Fundamentals Question 1 What do these acronyms mean? (a) CPU? (b) ROM? (c) EPROM? (d) RWM? (e) RAM? (f) I/O? What role does the CPU play in a computer system? Why is ROM an essential

More information

68000 Architecture, Data Types and Addressing Modes. 9/20/6 Lecture 2 - Prog Model 1

68000 Architecture, Data Types and Addressing Modes. 9/20/6 Lecture 2 - Prog Model 1 68000 Architecture, Data Types and Addressing Modes 9/20/6 Lecture 2 - Prog Model 1 Lecture Overview Assembler Language Programmers Model Registers Addressing Modes 9/20/6 Lecture 2 - Prog Model 2 Assembler

More information

Addressing Modes. To review data transfer instructions and applying the more advanced addressing modes.

Addressing Modes. To review data transfer instructions and applying the more advanced addressing modes. Addressing Modes Aims To review 68000 data transfer instructions and applying the more advanced addressing modes. Intended Learning Outcomes At the end of this module, students t should be able to Review

More information

PART II: Cap. 6 - Linguaggio macchina M68000

PART II: Cap. 6 - Linguaggio macchina M68000 192 CHAPTER 3 ARM, MOTOROLA, AND INTEL INSTRUCTION SETS 3.20 Rewrite the byte-sorting program in Figure 3.15b as a subroutine that sorts a list of 32-bit positive integers. The calling program should pass

More information

Assembly Language. Operand Size. The internal registers. Computers operate on chunks of data composed of a particular number of bits.

Assembly Language. Operand Size. The internal registers. Computers operate on chunks of data composed of a particular number of bits. 1 2 Chapter 6 Assembly Language Operand Size 8 bits 16 bits Computers operate on chunks of data composed of a particular number of bits. The 68K has a 32-bit architecture and a 16-bit organization. Internal

More information

SEE 3223 Microprocessors. 4: Addressing Modes. Muhammad Mun im Ahmad Zabidi

SEE 3223 Microprocessors. 4: Addressing Modes. Muhammad Mun im Ahmad Zabidi SEE 3223 Microprocessors 4: Addressing Modes Muhammad Mun im Ahmad Zabidi (munim@utm.my) Addressing Modes Aims To review 68000 data transfer instruchons and applying the more advanced addressing modes.

More information

INTRODUCTION TO BRANCHING. There are two forms of unconditional branching in the MC68000.

INTRODUCTION TO BRANCHING. There are two forms of unconditional branching in the MC68000. INTRODUCTION TO BRANCHING UNCONDITIONAL BRANCHING There are two forms of unconditional branching in the MC68000. BRA instruction BRA Program control passes directly to the instruction located at

More information

Introduction to M68000 Microprocessor II. Physics116B, 3/4/05 D. Pellett References: Motorola literature, Wilkinson, Ford and Topp, Horowitz and Hill

Introduction to M68000 Microprocessor II. Physics116B, 3/4/05 D. Pellett References: Motorola literature, Wilkinson, Ford and Topp, Horowitz and Hill Introduction to M68000 Microprocessor II Physics116B, 3/4/05 D. Pellett References: Motorola literature, Wilkinson, Ford and Topp, Horowitz and Hill Outline Today: simple programs to show how things work

More information

stack frame where register An is used as the argument pointer.

stack frame where register An is used as the argument pointer. STACK FRAMES The MC68000 provides two special instructions to allocate and deallocate a data structure called a frame in the stack to make subroutines easier to code. general structure of a frame: SP local

More information

Multiplies the word length <ea> times the least significant word in Dn. The result is a long word.

Multiplies the word length <ea> times the least significant word in Dn. The result is a long word. MATHEMATICAL INSTRUCTIONS Multiply unsigned MULU ,dn Action Notes: Example: Multiplies the word length times the least significant word in Dn. The result is a long word. 1. The lowest word of

More information

Module 7: Address Registers & Array Processing

Module 7: Address Registers & Array Processing Module 7: Address Registers & Array Processing Special instructions for address registers CMPA, MOVEA, SUBA, ADDA LEA Understanding arrays Array applications 2006 munim@utm.my,athif@fke.utm.my,kamal@bip.utm.my

More information

Assembly Language. Instructor: Dmitri A. Gusev. Spring Lecture 10, February 27, CSC : Introduction to Computer Science

Assembly Language. Instructor: Dmitri A. Gusev. Spring Lecture 10, February 27, CSC : Introduction to Computer Science Assembly Language Instructor: Dmitri A. Gusev Spring 2007 CSC 120.02: Introduction to Computer Science Lecture 10, February 27, 2007 Basic Definitions Assembly language is a low-level programming language

More information

Subroutines. passing data

Subroutines. passing data Subroutines passing data Mechanisms: pass by value pass by result pass by value result/ value return/ copy restore pass by reference pass by name pass by lazy evaluation Techniques: 1. in registers 2.

More information

Lecture 9 Subroutines

Lecture 9 Subroutines CPE 390: Microprocessor Systems Spring 2018 Lecture 9 Subroutines Bryan Ackland Department of Electrical and Computer Engineering Stevens Institute of Technology Hoboken, NJ 07030 Adapted from HCS12/9S12

More information

CPE/EE 421 Microcomputers

CPE/EE 421 Microcomputers CPE/EE 421 Microcomputers Instructor: Dr Aleksandar Milenkovic Lecture Note S06 *Material used is in part developed by Dr. D. Raskovic and Dr. E. Jovanov CPE/EE 421/521 Microcomputers 1 Course Administration

More information

Alex Milenkovich 1. CPE/EE 421 Microcomputers: Motorola 68000: Assembly Language and C. Outline

Alex Milenkovich 1. CPE/EE 421 Microcomputers: Motorola 68000: Assembly Language and C. Outline Outline CPE/EE 421 Microcomputers: Motorola 68: Assembly Language and C Instructor: Dr Aleksandar Milenkovic Lecture Notes ACIA Example: Pseudo-code + Assembly Passing parameters In registers Passing by

More information

A Quickie Introduction to the Windows Based 68K Assembler EASy68K

A Quickie Introduction to the Windows Based 68K Assembler EASy68K A Quickie Introduction to the Windows Based 68K Assembler EASy68K You now have a number of options to assemble your code for your microcontroller. One option, of course, is to assemble it by hand, using

More information

Module 1-G. Marcos and Structured Programming

Module 1-G. Marcos and Structured Programming Module 1-G Marcos and Structured Programming 1 Learning Outcome #1 An ability to program a microcontroller to perform various tasks How? A. Architecture and Programming Model B. Instruction Set Overview

More information

CPE/EE 421 Microcomputers

CPE/EE 421 Microcomputers CPE/EE 421 Microcomputers Instructor: Dr Aleksandar Milenkovic Lecture Note S07 Outline Stack and Local Variables C Programs 68K Examples Performance *Material used is in part developed by Dr. D. Raskovic

More information

Program Development. Chapter 5

Program Development. Chapter 5 Chapter 5 Program Development Expected Outcomes Distinguish between various codes in the programming language Explain the role of assembler and compiler Distinguish between different data types Use directive

More information

Section 1--Computer architecture: organization of the cpu and memory, address and data bus, fetch-execute cycle

Section 1--Computer architecture: organization of the cpu and memory, address and data bus, fetch-execute cycle Here are some sample exams and questions that you can study for your first exam. These are actual problems that have been used on old exams. I have tried to eliminate all the problems of types which will

More information

Programming Book for 6809 Microprocessor Kit

Programming Book for 6809 Microprocessor Kit Programming Book for 6809 Microprocessor Kit Wichit Sirichote, wichit.sirichote@gmail.com Image By Konstantin Lanzet - CPU collection Konstantin Lanzet, CC BY-SA 3.0, Rev1.2 March 2018 1 Contents Lab 1

More information

Student # (In case pages get detached) The Edward S. Rogers Sr. Department of Electrical and Computer Engineering

Student # (In case pages get detached) The Edward S. Rogers Sr. Department of Electrical and Computer Engineering ECE 243S - Computer Organization The Edward S. Rogers Sr. Department of Electrical and Computer Engineering Mid-term Examination, March 2005 Name Student # Please circle your lecture section for exam return

More information

68000 Architecture. To review the the architecture of the microprocessor.

68000 Architecture. To review the the architecture of the microprocessor. 68000 Architecture Aims To review the the architecture of the 68000 microprocessor. Intended Learning Outcomes At the end of this module, students should be able to: Briefly explain the history of microprocessor

More information

Programming the Motorola MC68HC11 Microcontroller

Programming the Motorola MC68HC11 Microcontroller Programming the Motorola MC68HC11 Microcontroller COMMON PROGRAM INSTRUCTIONS WITH EXAMPLES aba Add register B to register A Similar commands are abx aby aba add the value in register B to the value in

More information

Lecture 5 Assembly Programming: Arithmetic

Lecture 5 Assembly Programming: Arithmetic CPE 390: Microprocessor Systems Spring 2018 Lecture 5 Assembly Programming: Arithmetic Bryan Ackland Department of Electrical and Computer Engineering Stevens Institute of Technology Hoboken, NJ 07030

More information

Recursive Subroutine Calls Example

Recursive Subroutine Calls Example The purpose of this example is to examine how all parameters, local variables, return addresses, and frame pointers are stored on the stack when a main program calls a procedure "Process" as well as when

More information

1. bit manipulation instructions such as BTST, BCHG

1. bit manipulation instructions such as BTST, BCHG 1. bit manipulation instructions such as BTST, BCHG 9. (Exam #2, 1990) If ($53EFE)=$ 0A ($5FFFE)=$ 00 ($53EFF)=$ EE ($5FFFF)=$ 00 ($53F00)=$ FF ($60000)=$ 00 ($53F01)=$ 00 ($60001)=$ 00 ($53F02)=$ 12 ($60002)=$

More information

UNIT 7A Data Representation: Numbers and Text. Digital Data

UNIT 7A Data Representation: Numbers and Text. Digital Data UNIT 7A Data Representation: Numbers and Text 1 Digital Data 10010101011110101010110101001110 What does this binary sequence represent? It could be: an integer a floating point number text encoded with

More information

Notes: The Marie Simulator

Notes: The Marie Simulator The Accumulator (AC) is the register where calculations are performed. To add two numbers together, a) load the first number into the accumulator with a Load instruction b) Add the second number to the

More information

Chapter 2: HCS12 Assembly Programming. EE383: Introduction to Embedded Systems University of Kentucky. Samir Rawashdeh

Chapter 2: HCS12 Assembly Programming. EE383: Introduction to Embedded Systems University of Kentucky. Samir Rawashdeh Chapter 2: HCS12 Assembly Programming EE383: Introduction to Embedded Systems University of Kentucky Samir Rawashdeh With slides based on material by H. Huang Delmar Cengage Learning 1 Three Sections of

More information

Decimal, Hexadecimal and Binary Numbers Writing an assembly language program

Decimal, Hexadecimal and Binary Numbers Writing an assembly language program Decimal, Hexadecimal and Binary Numbers Writing an assembly language program o Disassembly of MC9S12 op codes o Use flow charts to lay out structure of program o Use common flow structures if-then if-then-else

More information

Computer Organization and Assembly Language. Lab Session 01

Computer Organization and Assembly Language. Lab Session 01 Objective: Lab Session 01 Introduction to Assembly Language Tools and Familiarization with Emu8086 environment To be able to understand Data Representation and perform conversions from one system to another

More information

Lecture 6 Assembly Programming: Branch & Iteration

Lecture 6 Assembly Programming: Branch & Iteration CPE 390: Microprocessor Systems Spring 2018 Lecture 6 Assembly Programming: Branch & Iteration Bryan Ackland Department of Electrical and Computer Engineering Stevens Institute of Technology Hoboken, NJ

More information

UNIMPLEMENTED INSTRUCTIONS

UNIMPLEMENTED INSTRUCTIONS UNIMPLEMENTED INSTRUCTIONS OVERVIEW: This Programming Assignment will take the sine computation program you wrote for Programming Assignment #4 and implement it as a 68000 assembly language instruction.

More information

appendix a The LC-3 ISA A.1 Overview

appendix a The LC-3 ISA A.1 Overview A.1 Overview The Instruction Set Architecture (ISA) of the LC-3 is defined as follows: Memory address space 16 bits, corresponding to 2 16 locations, each containing one word (16 bits). Addresses are numbered

More information

EEAP 282 PROGRAMMING ASSIGNMENT #1 TERMINAL INPUT/OUTPUT

EEAP 282 PROGRAMMING ASSIGNMENT #1 TERMINAL INPUT/OUTPUT The big announcement is that the debugger works. You will need to log into flounder instead of dumbo to do the lab. The debugger only works on flounder. Your disk files will exist on both dumbo and flounder

More information

Exam 2 E2-1 Fall Name: Exam 2

Exam 2 E2-1 Fall Name: Exam 2 Exam 2 E2-1 Fall 2002 1. Short Answer [10 pts] Exam 2 a.[2 pts] Briefly describe what each of the following instructions do so that it is clear what the differences between them are: STAA -2,X STAA 2,-X

More information

Getting Started with the HCS12 IDE

Getting Started with the HCS12 IDE Getting Started with the HCS12 IDE B. Ackland June 2015 This document provides basic instructions for installing and using the MiniIDE Integrated Development Environment and the Java based HCS12 simulator.

More information

Example Programs for 6502 Microprocessor Kit

Example Programs for 6502 Microprocessor Kit Example Programs for 6502 Microprocessor Kit 0001 0000 0002 0000 GPIO1.EQU $8000 0003 0000 0004 0000 0005 0200.ORG $200 0006 0200 0007 0200 A5 00 LDA $0 0008 0202 8D 00 80 STA $GPIO1 0009 0205 00 BRK 0010

More information

Lab Cover Page. Lab Date and Time: Teaching Assistant to whom you are submitting

Lab Cover Page. Lab Date and Time: Teaching Assistant to whom you are submitting Student Information First Name School of Computer Science Faculty of Engineering and Computer Science Last Name Student ID Number Lab Cover Page Please complete all fields: Course Name: Structure and Application

More information

Serial Communication. Transmit. Receive To EECC250 - Shaaban. From Universal Asynchronous Receiver/Transmitter (UART) Parity Bit

Serial Communication. Transmit. Receive To EECC250 - Shaaban. From Universal Asynchronous Receiver/Transmitter (UART) Parity Bit Parity Bit ASCII Character From 68000 Transmit Transmitter Buffer (TB) Serial Communication Receive To 68000 ASCII Character Parity Bit To device Parity Bit ASCII Character Receiver Buffer (RB) Universal

More information

COSC 243. Assembly Language Techniques. Lecture 9. COSC 243 (Computer Architecture)

COSC 243. Assembly Language Techniques. Lecture 9. COSC 243 (Computer Architecture) COSC 243 Assembly Language Techniques 1 Overview This Lecture Source Handouts Next Lectures Memory and Storage Systems 2 Parameter Passing In a high level language we don t worry about the number of parameters

More information

LAB 1: MC68000 CPU PROGRAMMING DATA TRANSFER INSTRUCTIONS

LAB 1: MC68000 CPU PROGRAMMING DATA TRANSFER INSTRUCTIONS LAB 1: MC68000 CPU PROGRAMMING DATA TRANSFER INSTRUCTIONS OBJECTIVES At the end of the laboratory works, you should be able to write simple assembly language programs for the MC68000 CPU using data transfer

More information

Trap Vector Table. Interrupt Vector Table. Operating System and Supervisor Stack. Available for User Programs. Device Register Addresses

Trap Vector Table. Interrupt Vector Table. Operating System and Supervisor Stack. Available for User Programs. Device Register Addresses Chapter 1 The LC-3b ISA 1.1 Overview The Instruction Set Architecture (ISA) of the LC-3b is defined as follows: Memory address space 16 bits, corresponding to 2 16 locations, each containing one byte (8

More information

538 Lecture Notes Week 1

538 Lecture Notes Week 1 538 Clowes Lecture Notes Week 1 (Sept. 6, 2017) 1/10 538 Lecture Notes Week 1 Announcements No labs this week. Labs begin the week of September 11, 2017. My email: kclowes@ryerson.ca Counselling hours:

More information

538 Lecture Notes Week 5

538 Lecture Notes Week 5 538 Lecture Notes Week 5 (October 4, 2017) 1/18 538 Lecture Notes Week 5 Announements Midterm: Tuesday, October 25 Answers to last week's questions 1. With the diagram shown for a port (single bit), what

More information

Lab Reports. Program Description (separate page - ONLY IF REQUIRED)

Lab Reports. Program Description (separate page - ONLY IF REQUIRED) Lab Reports Reports should be in neat, concise form and turned in on time. The best reports will cover all vital information in detail without excessive verbiage on unnecessary details. Your report will

More information

Summer Examinations 2015

Summer Examinations 2015 Summer Examinations 2015 ENG200115N Module Title Level Time Allowed Advanced Engineering Principles Five Two hours Instructions to students: Enter your student number not your name on all answer books.

More information

538 Lecture Notes Week 5

538 Lecture Notes Week 5 538 Lecture Notes Week 5 (Sept. 30, 2013) 1/15 538 Lecture Notes Week 5 Answers to last week's questions 1. With the diagram shown for a port (single bit), what happens if the Direction Register is read?

More information

Advanced Assembly, Branching, and Monitor Utilities

Advanced Assembly, Branching, and Monitor Utilities 2 Advanced Assembly, Branching, and Monitor Utilities 2.1 Objectives: There are several different ways for an instruction to form effective addresses to acquire data, called addressing modes. One of these

More information

CS311 Lecture: The Architecture of a Simple Computer

CS311 Lecture: The Architecture of a Simple Computer CS311 Lecture: The Architecture of a Simple Computer Objectives: July 30, 2003 1. To introduce the MARIE architecture developed in Null ch. 4 2. To introduce writing programs in assembly language Materials:

More information

Computer Architecture 5.1. Computer Architecture. 5.2 Vector Address: Interrupt sources (IS) such as I/O, Timer 5.3. Computer Architecture

Computer Architecture 5.1. Computer Architecture. 5.2 Vector Address: Interrupt sources (IS) such as I/O, Timer 5.3. Computer Architecture License: http://creativecommons.org/licenses/by-nc-nd/3./ Hardware interrupt: 5. If in an eternal device (for eample I/O interface) a predefined event occurs this device issues an interrupt request to

More information

C:\Users\jacob\Documents\MtSAC\ELEC74 Mt SAC - chipkit\homework Sheets.docx

C:\Users\jacob\Documents\MtSAC\ELEC74 Mt SAC - chipkit\homework Sheets.docx ELEC 74 Worksheet 1 Logic Gate Review 1. Draw the truth table and schematic symbol for: a. An AND gate b. An OR gate c. An XOR gate d. A NOT gate ELEC74 Worksheet 2 (Number Systems) 1. Convert the following

More information

RSLogix500 Project Report

RSLogix500 Project Report RSLogix500 Project Report Processor Information Processor Type: MicroLogix 1200 Series C (1 or 2 Comm Ports) Processor Name: UNTITLED Total Memory Used: 88 Instruction Words Used - 37 Data Table Words

More information

Microprocessors I MICROCOMPUTERS AND MICROPROCESSORS

Microprocessors I MICROCOMPUTERS AND MICROPROCESSORS Microprocessors I Outline of the Lecture Microcomputers and Microprocessors Evolution of Intel 80x86 Family Microprocessors Binary and Hexadecimal Number Systems MICROCOMPUTERS AND MICROPROCESSORS There

More information

ME4447/6405. Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics. Instructor: Professor Charles Ume LECTURE 7

ME4447/6405. Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics. Instructor: Professor Charles Ume LECTURE 7 ME4447/6405 Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics Instructor: Professor Charles Ume LECTURE 7 Reading Assignments Reading assignments for this week and next

More information

EE 308 Spring The HCS12 has 6 addressing modes

EE 308 Spring The HCS12 has 6 addressing modes The HCS12 has 6 addressing modes Most of the HC12 s instructions access data in memory There are several ways for the HC12 to determine which address to access Effective Address: Memory address used by

More information

68000 Instruction Set (2) 9/20/6 Lecture 3 - Instruction Set - Al 1

68000 Instruction Set (2) 9/20/6 Lecture 3 - Instruction Set - Al 1 68000 Instruction Set (2) 9/20/6 Lecture 3 - Instruction Set - Al 1 Lecture Overview The 68000 Instruction Set continued The understand and effectively use an architecture must understand the register

More information

538 Lecture Notes Week 2

538 Lecture Notes Week 2 538 Lecture Notes Week 2 (Sept. 13, 2017) 1/15 Announcements 538 Lecture Notes Week 2 Labs begin this week. Lab 1 is a one-week lab. Lab 2 (starting next week) is a two-week lab. 1 Answers to last week's

More information

COSC 243. Instruction Sets And Addressing Modes. Lecture 7&8 Instruction Sets and Addressing Modes. COSC 243 (Computer Architecture)

COSC 243. Instruction Sets And Addressing Modes. Lecture 7&8 Instruction Sets and Addressing Modes. COSC 243 (Computer Architecture) COSC 243 Instruction Sets And Addressing Modes 1 Overview This Lecture Source Chapters 12 & 13 (10 th editition) Textbook uses x86 and ARM (we use 6502) Next 2 Lectures Assembly language programming 2

More information

Exam I Review February 2017

Exam I Review February 2017 Exam I Review February 2017 Binary Number Representations Conversion of binary to hexadecimal and decimal. Convert binary number 1000 1101 to hexadecimal: Make groups of 4 bits to convert to hexadecimal,

More information

CMPEN 472 Sample EXAM II

CMPEN 472 Sample EXAM II CMPEN 472 Sample EXAM II Name: Student ID number (last 4 digit): Please write your name on every page. Write your solutions clearly. You may use backside of each page for scratch but the solutions must

More information

Instruction Set Architecture

Instruction Set Architecture C Fortran Ada etc. Basic Java Instruction Set Architecture Compiler Assembly Language Compiler Byte Code Nizamettin AYDIN naydin@yildiz.edu.tr http://www.yildiz.edu.tr/~naydin http://akademik.bahcesehir.edu.tr/~naydin

More information

Programming. A. Assembly Language Programming. A.1 Machine Code. Machine Code Example: Motorola ADD

Programming. A. Assembly Language Programming. A.1 Machine Code. Machine Code Example: Motorola ADD A. Assembly Language Programming Programming of a computer system: Machine code direct execution Assembly language tool: assembler High level programming language tool: interpreter tool: compiler Programming

More information

MC9S12 Assembler Directives A Summary of MC9S12 Instructions Disassembly of MC9S12 op codes. Summary of HCS12 addressing modes ADDRESSING MODES

MC9S12 Assembler Directives A Summary of MC9S12 Instructions Disassembly of MC9S12 op codes. Summary of HCS12 addressing modes ADDRESSING MODES MC9S12 Assembler Directives A Summary of MC9S12 Instructions Disassembly of MC9S12 op codes o Review of Addressing Modes o Which branch instruction to use (signed vs unsigned) o Using X and Y registers

More information

2. (2 pts) If an external clock is used, which pin of the 8051 should it be connected to?

2. (2 pts) If an external clock is used, which pin of the 8051 should it be connected to? ECE3710 Exam 2. Name _ Spring 2013. 5 pages. 102 points, but scored out of 100. You may use any non-living resource to complete this exam. Any hint of cheating will result in a 0. Part 1 Short Answer 1.

More information

COSC345 Software Engineering. Basic Computer Architecture and The Stack

COSC345 Software Engineering. Basic Computer Architecture and The Stack COSC345 Software Engineering Basic Computer Architecture and The Stack Outline Architectural models A little about the 68HC11 Memory map Registers A little bit of assembly (never did us any harm) The program

More information

Chapter. Computer Architecture

Chapter. Computer Architecture Chapter 4 Computer Architecture Figure 4.1 Input device Central processing unit Main memory Output device Bus Data flow Control Figure 4.2 Central processing unit () Status bits ( ) Accumulator ( ) Index

More information

CS 135: Computer Architecture I

CS 135: Computer Architecture I What next? : Computer Architecture I Instructor: Prof. Bhagi Narahari Dept. of Computer Science Course URL: www.seas.gwu.edu/~bhagiweb/cs135/ Low level/machine-level Programming Assembly Language programming

More information

CPE300: Digital System Architecture and Design

CPE300: Digital System Architecture and Design CPE300: Digital System Architecture and Design Fall 2011 MW 17:30-18:45 CBC C316 RISC: The SPARC 09282011 http://www.egr.unlv.edu/~b1morris/cpe300/ 2 Outline Recap Finish Motorola MC68000 The SPARC Architecture

More information

ME 4447/6405. Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics. Instructor: Professor Charles Ume LECTURE 6

ME 4447/6405. Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics. Instructor: Professor Charles Ume LECTURE 6 ME 4447/6405 Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics Instructor: Professor Charles Ume LECTURE 6 MC9S12C Microcontroller Covered in Lecture 5: Quick Introduction

More information

CSE 351 Midterm - Winter 2017

CSE 351 Midterm - Winter 2017 CSE 351 Midterm - Winter 2017 February 08, 2017 Please read through the entire examination first, and make sure you write your name and NetID on all pages! We designed this exam so that it can be completed

More information

ORG ; TWO. Assembly Language Programming

ORG ; TWO. Assembly Language Programming Dec 2 Hex 2 Bin 00000010 ORG ; TWO Assembly Language Programming OBJECTIVES this chapter enables the student to: Explain the difference between Assembly language instructions and pseudo-instructions. Identify

More information

CS/ECE 252: INTRODUCTION TO COMPUTER ENGINEERING UNIVERSITY OF WISCONSIN MADISON

CS/ECE 252: INTRODUCTION TO COMPUTER ENGINEERING UNIVERSITY OF WISCONSIN MADISON CS/ECE 252: INTRODUCTION TO COMPUTER ENGINEERING UNIVERSITY OF WISCONSIN MADISON Prof Mark D. Hill and Prof. Gurindar Sohi TAs: Rebecca Lam, Mona Jalal, Preeti Agarwal, Pradip Vallathol Midterm Examination

More information

EECE416 :Microcomputer Fundamentals and Design Instruction Sets and Groups

EECE416 :Microcomputer Fundamentals and Design Instruction Sets and Groups EECE416 :Microcomputer Fundamentals and Design 68000 Instruction Sets and Groups 1 Instruction Groups Data Transfer Groups Arithmetic Group Logical Group Shift and Rotate Group Bit Manipulation Group Binary

More information

Microprocessors & Assembly Language Lab 1 (Introduction to 8086 Programming)

Microprocessors & Assembly Language Lab 1 (Introduction to 8086 Programming) Microprocessors & Assembly Language Lab 1 (Introduction to 8086 Programming) Learning any imperative programming language involves mastering a number of common concepts: Variables: declaration/definition

More information

ME 6405 Introduction to Mechatronics

ME 6405 Introduction to Mechatronics ME 6405 Introduction to Mechatronics Fall 2005 Instructor: Professor Charles Ume LECTURE 9 Homework 1 Solution 1. Write an assembly language program to clear the usable internal RAM in the M68HC11E9. Solution:

More information

OSIAC Read OSIAC 5362 posted on the course website

OSIAC Read OSIAC 5362 posted on the course website OSIAC 5362 Read OSIAC 5362 posted on the course website The Basic Structure of Control Unit m CLK Run/Inhibit Control Step Counter m Preset (to any new state) Reset IR Decoder/Encoder (combinational logic)

More information

EE 3170 Microcontroller Applications

EE 3170 Microcontroller Applications Q. 3.9 of HW3 EE 37 Microcontroller Applications (a) (c) (b) (d) Midterm Review: Miller Chapter -3 -The Stuff That Might Be On the Exam D67 (e) (g) (h) CEC23 (i) (f) (j) (k) (l) (m) EE37/CC/Lecture-Review

More information

8051 Overview and Instruction Set

8051 Overview and Instruction Set 8051 Overview and Instruction Set Curtis A. Nelson Engr 355 1 Microprocessors vs. Microcontrollers Microprocessors are single-chip CPUs used in microcomputers Microcontrollers and microprocessors are different

More information

Mark II Aiken Relay Calculator

Mark II Aiken Relay Calculator Introduction to Embedded Microcomputer Systems Lecture 6.1 Mark II Aiken Relay Calculator 2.12. Tutorial 2. Arithmetic and logical operations format descriptions examples h 8-bit unsigned hexadecimal $00

More information

ECE232: Hardware Organization and Design

ECE232: Hardware Organization and Design ECE232: Hardware Organization and Design Lecture 4: Logic Operations and Introduction to Conditionals Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Overview Previously examined

More information

Representation of Information

Representation of Information Representation of Information CS61, Lecture 2 Prof. Stephen Chong September 6, 2011 Announcements Assignment 1 released Posted on http://cs61.seas.harvard.edu/ Due one week from today, Tuesday 13 Sept

More information

Intel Instruction Set (gas)

Intel Instruction Set (gas) Intel Instruction Set (gas) These slides provide the gas format for a subset of the Intel processor instruction set, including: Operation Mnemonic Name of Operation Syntax Operation Examples Effect on

More information

N.B. These pastpapers may rely on the knowledge gained from the previous chapters.

N.B. These pastpapers may rely on the knowledge gained from the previous chapters. N.B. These pastpapers may rely on the knowledge gained from the previous chapters. 1 SEC 95-PAPER 1-Q5 (a) A computer uses 8-bit two s complement numbers. In the space below fill in the largest positive

More information

Number representations

Number representations Number representations Number bases Three number bases are of interest: Binary, Octal and Hexadecimal. We look briefly at conversions among them and between each of them and decimal. Binary Base-two, or

More information

EE 3170 Microcontroller Applications

EE 3170 Microcontroller Applications Lecture Overview EE 3170 Microcontroller Applications Lecture 7 : Instruction Subset & Machine Language: Conditions & Branches in Motorola 68HC11 - Miller 2.2 & 2.3 & 2.4 Based on slides for ECE3170 by

More information

BRANCH IF REGISTER IS HIGHER/GREATHER/ THAN OPERAND e.g. CMPA #$D0

BRANCH IF REGISTER IS HIGHER/GREATHER/ THAN OPERAND e.g. CMPA #$D0 Midterm Review 1. Branch instructions BHI (unsigned), BGT (signed) Take a look at the preceding comparison instruction. Then, you can use this instead of using complex formula in the instruction reference.

More information

Introduction to the MIPS. Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University

Introduction to the MIPS. Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University Introduction to the MIPS Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University Introduction to the MIPS The Microprocessor without Interlocked Pipeline Stages

More information

Run time environment of a MIPS program

Run time environment of a MIPS program Run time environment of a MIPS program Stack pointer Frame pointer Temporary local variables Return address Saved argument registers beyond a0-a3 Low address Growth of stack High address A translation

More information

MACHINE LEVEL REPRESENTATION OF DATA

MACHINE LEVEL REPRESENTATION OF DATA MACHINE LEVEL REPRESENTATION OF DATA CHAPTER 2 1 Objectives Understand how integers and fractional numbers are represented in binary Explore the relationship between decimal number system and number systems

More information

Course Schedule. CS 221 Computer Architecture. Week 3: Plan. I. Hexadecimals and Character Representations. Hexadecimal Representation

Course Schedule. CS 221 Computer Architecture. Week 3: Plan. I. Hexadecimals and Character Representations. Hexadecimal Representation Course Schedule CS 221 Computer Architecture Week 3: Information Representation (2) Fall 2001 W1 Sep 11- Sep 14 Introduction W2 Sep 18- Sep 21 Information Representation (1) (Chapter 3) W3 Sep 25- Sep

More information

INTRODUCTION TO BRANCHING

INTRODUCTION TO BRANCHING INTRODUCTION TO BRANCHING UNCONDITIONAL BRANCHING There are two forms of unconditional branching in the MC68000. BRA instruction BRA Program control passes directly to the instruction located at

More information

C SC 230 Computer Architecture and Assembly Language April 2000 Exam Sample Solutions

C SC 230 Computer Architecture and Assembly Language April 2000 Exam Sample Solutions C SC 230 Computer Architecture and Assembly Language April 2000 Exam Sample Solutions 1. (12 marks) Circle the correct answer for each of the following: The 8-bit two's complement representation of -15

More information

Memory organization Programming model - Program status word - register banks - Addressing modes - instruction set Programming examples.

Memory organization Programming model - Program status word - register banks - Addressing modes - instruction set Programming examples. MICROCONTROLLERS AND APPLICATIONS 1 Module 2 Module-2 Contents: Memory organization Programming model - Program status word - register banks - Addressing modes - instruction set Programming examples. MEMORY

More information

Chapter 3: Number Systems and Codes. Textbook: Petruzella, Frank D., Programmable Logic Controllers. McGraw Hill Companies Inc.

Chapter 3: Number Systems and Codes. Textbook: Petruzella, Frank D., Programmable Logic Controllers. McGraw Hill Companies Inc. Chapter 3: Number Systems and Codes Textbook: Petruzella, Frank D., Programmable Logic Controllers. McGraw Hill Companies Inc., 5 th edition Decimal System The radix or base of a number system determines

More information

Architecture & Instruction set of 8085 Microprocessor and 8051 Micro Controller

Architecture & Instruction set of 8085 Microprocessor and 8051 Micro Controller of 8085 microprocessor 8085 is pronounced as "eighty-eighty-five" microprocessor. It is an 8-bit microprocessor designed by Intel in 1977 using NMOS technology. It has the following configuration 8-bit

More information