EC-333 Microprocessor and Interfacing Techniques

Size: px
Start display at page:

Download "EC-333 Microprocessor and Interfacing Techniques"

Transcription

1 EC-333 Microprocessor and Interfacing Techniques Lecture 4 Addressing Modes Dr Hashim Ali Spring Department of Computer Science and Engineering HITEC University Taxila Slides taken from Computer Organisation and Architecture by William Stallings. 1

2 Addressing Modes in Microprocessor (8086/88) Addressing mode provides different ways for access an address to given data to a processor. When 8086 executes an instruction, it performs the specified function on data. Operated data is stored in the memory location. There are various techniques to specify address of data. These techniques are called Addressing Modes. Types of Addressing Modes:- Data Addressing Modes Program Memory Addressing Modes Stack Memory Addressing Modes 2

3 Data-Addressing Modes: This mode is related to data transfer operation, that is, data is transferred either from the memory to internal registers of 8086 processors or from one register to another register. Example: MOV AX, DX Program Memory Addressing Modes: This mode involves program memory addresses during various operations. Example: JMP AX, in this instruction, the code execution control jumps to the current code segment location addressed by the contents of AX register. Stack Memory Addressing Modes: This mode involves stack registry operations. Example: PUSH AX, this instruction copies the contents of AX register to the stack. 3

4 Data-Addressing Modes An addressing mode means the method by which an operand can be specified in a register or a memory location. 8086/88 provide seven Addressing Modes: 1. Register Addressing 2. Immediate Addressing 3. Direct Data Addressing 4. Register Indirect Addressing 5. Base-Plus-Index Addressing 6. Register Relative Addressing 7. Base Relative-Plus-Index Addressing 4

5 Opcode and Operand in Microprocessor An opcode is a short of operation code An opcode is a singe instruction can be executed by the CPU. In machine language it is a binary or hexadecimal value such as B7 loaded into the instruction register. In assembly language mnemonic form an opcode is a command such as MOV or ADD or JMP. Example: MOV AX, 1000H ; MOV is the opcode ; AX (register) is an operand Operands are manipulated by the opcode. In this example, the operands are the register AX and the value 1000H. 8-bit 8-bit 8-bit Opcode Operand 1 Byte 1 or 2 Byte 5

6 Data-Addressing Modes MOV instruction is a common and flexible instruction. provides a basis for explanation of data-addressing modes Figure 3 1 illustrates the MOV instruction and defines the direction of data flow. Source is to the right and destination the left, next to the opcode MOV. an opcode, or operation code, tells the microprocessor which operation to perform 6

7 Figure 3 1 The MOV instruction showing the source, destination, and direction of data flow. The MOV AX, BX instruction transfers the contents of source register (BX) into the destination register (AX). The source never changes, but the destination always changes. MOV copies the source data into the destination. The source and destination are often called operands. 7

8 Figure Core2 data-addressing modes. 8

9 1. Register Addressing The most common form of data addressing. Once register names learned, easiest to apply. The microprocessor contains these 8-bit register names used with register addressing: AH, AL, BH, BL, CH, CL, DH, and DL. 16-bit register names: AX, BX, CX, DX, SP, BP, SI, and DI. Register addressing transfers a copy of a byte or word from the source register or contents of a memory location to the destination register or memory location. Ex: MOV CX, DX 9

10 Important for instructions to use registers that are the same size. Never mix an 8-bit with a 16-bit register, an 8- or a 16-bit register with a 32-bit register This is not allowed by the microprocessor and results in an error when assembled. Use of registers to hold the data to be manipulated Memory is not accessed when this addressing mode is executed Example: MOV BX, DX ; copy the contents of DX into BX MOV ES, AX ; copy the contents of AX into ES ADD AL, BH ; add the contents of BH to contents of AL Source and destination registers must have the same size 10

11 11

12 2. Immediate Addressing Transfers the source, an immediate byte or word of data, into the destination register or memory location The source operand is a constant The operand comes immediately after the opcode For this reason, this addressing mode executes quickly Immediate addressing mode can be used to load information into any of the registers except the segment registers and flag registers. 12

13 Example: MOV AX, 2550H MOV CX, 625 MOV BL, 40H ; move 2550H into AX ; load the decimal value 625 into CX ; load 40H into BL The data must first be moved to a general-purpose register and then to the segment register. Example: MOV AX, 2550H MOV DS, AX MOV DS, 0123H ; illegal instruction! 13

14 In symbolic assembly language, the symbol # precedes immediate data in some assemblers. - MOV AX,#1234H instruction is an example. Most assemblers do not use the # symbol, but represent immediate data as in the MOV AX,1234H instruction. - An older assembler used with some Hewlett-Packard logic development does, as may others. - In this text, the # is not used for immediate data. 14

15 The symbolic assembler portrays immediate data in many ways. The letter H appends hexadecimal data. If hexadecimal data begin with a letter, the assembler requires the data start with a 0. - to represent a hexadecimal F2, 0F2H is used in assembly language. Decimal data are represented as is and require no special codes or adjustments. - An example is the 100 decimal in the MOV AL,100 instruction. 15

16 An ASCII-coded character or characters may be depicted in the immediate form if the ASCII data are enclosed in apostrophes. - Ex: MOV AL, A Binary data are represented if the binary number is followed by the letter B. - in some assemblers, the letter Y - Ex: MOV CL, B 16

17 17

18 Parts of Assembly Language Each statement in an assembly language program consists of four parts or fields. The leftmost field is called the label. used to store a symbolic name for the memory location it represents All labels must begin with a letter or one of the following special $, -, or?. a label may any length from 1 to 35 characters The label appears in a program to identify the name of a memory location for storing data and for other purposes. 18

19 The next field to the right is the opcode field. - designed to hold the instruction, or opcode - the MOV part of the move data instruction is an example of an opcode Right of the opcode field is the operand field. - contains information used by the opcode - the MOV AL,BL instruction has the opcode MOV and operands AL and BL The comment field, the final field, contains a comment about the instruction(s). - comments always begin with a semicolon (;) 19

20 3. Direct Data Addressing Moves a byte or word between a memory location and a register. The data is in some memory location(s) and the address of the data in memory comes immediately after the instruction - usually a 3-byte long instruction This address is the offset address Example: MOV AL, [8088] ; move content of DS:8088 into AL The physical address is calculated by combining the contents of offset location 2400 with DS 20

21 Example: Find the physical address of the memory location and its contents after the execution of the following, assuming that DS = 1512H. MOV AL, 3BH MOV [3518], AL Solution: - First 3BH is copied into AL - Then in line two, the contents of AL are moved to logical address DS:3518 which is 1512: Shifting DS left and adding it to the offset gives the physical address of 18638H (15120H H = 18638H). - After the execution of the second instruction, the memory location with address 18638H will contain the value 3BH. 21

22 Few More Examples 22

23 4. Register Indirect Addressing Transfers a byte or word between a register and a memory location addressed by an index or base register. The address of the memory location where the operand resides is held by a register. The registers used for this purpose are SI, DI, and BX. They must be combined with DS (by default) in order to generate the 20-bit physical address. - The register BP uses the stack segment (SS) by default. 23

24 For example: - MOV AL, [BX] - MOV AL, [BP] - MOV AL, [SI] - MOV AL, [DI] Segment override prefix symbols can be used if you wish to access data in different segments. - MOV AL, CS:[BX] - MOV AL, DS:[BP] - MOV AL, SS:[SI] - MOV AL, ES:[DI] 24

25 Example: MOV AX, [BX] The physical address is calculated as ; moves into AX the contents of the memory location pointed to by DS:BX, 1000: x =11234H The same rules apply when using register SI or DI. Example: MOV CL, [SI] ; move contents of DS:SI into CL MOV [DI], AH ; move contents of AH into DS:DI 25

26 Example: - Assume that DS = 1120H, SI = 2498H, and AX = 17FEH Show the contents of memory locations after the execution of Solution: MOV [SI], AX ; move contents of AX into DS:SI - The contents of AX are moved into memory locations with logical address DS:SI and DS:SI + 1 (Two bytes because of AX) - The physical address starts at DS (shifted left) + SI = According to the little endian convention, - Low address 13698H contains FE, the low byte, - High address 13699H will contain 17, the high byte. 26

27 Few Examples 27

28 5. Base-Plus-Index Addressing Transfers a byte or word between a register and the memory location addressed by a base register (BP or BX) plus an index register (DI or SI). Combining based and indexed addressing modes. One base register and one index register are used. Examples: MOV [BX+DI], CL ; move contents of CL into DS:BX+DI - Physical Address = DSx10 + BX+DI MOV CH, [BX+SI] ; move contents of the DS:BX+SI into CH - Physical Address = DSx10 + BX+SI MOV AH, [BP+DI] ; move contents of the SS:BP+SI into AH - Physical Address = SSx10 + BP+DI MOV [BP+SI], AL - Physical Address = SSx10 + BP+SI ; move contents of AL into SS:BP+SI 28

29 Few Examples 29

30 6. Register Relative Addressing Moves a byte or word between a register and the memory location addressed by an index or base register plus a displacement. The data in a segment of memory are addressed by adding the displacement to the contents of a base or an index register (BP, BX, DI, or SI). Examples: MOV AX, [BX+4] ; move contents of DS:BX+4 into AX - Physical Address = DSx10 + BX+4 MOV CH, [SI+5] ; move contents of the DS:SI+5 into CH - Physical Address = DSx10 +SI+5 MOV AH, [DI+1] ; move contents of the DS:DI+1 into AH - Physical Address = DSx10 + DI+1 MOV [BP+2], AL ; move contents of AL into SS:BP+2 - Physical Address = SSx10 + BP+2 30

31 Example: Assume that DS = 4500, SS = 2000, BX = 2100, SI = 1486, DI = 8500, BP= 7814, and AX = Show the exact physical memory location where AX is stored in each of the following. All values are in hex. 1- MOV [BX+20], AX 2- MOV [SI+10], AX 3- MOV [DI+4], AX 4- MOV [BP+12], AX Solution: Physical Address = segment reg. x 10 + (offset reg.) + displacement 1- DS:BX DS:SI DS:DI+4 4- SS:BP+12 location = (12) and = (25) location = (12) and = (25 ) location 4D504 = (12) and 4D505 = (25) location = (12) and = (25) 31

32 Few Examples 32

33 7. Base Relative-Plus-Index Addressing The base relative-plus-index addressing mode is similar to the baseplus-index addressing mode, but adds a displacement besides using a base register and an index register to form the memory address. This type of addressing mode often addresses a twodimensional array of memory data. The data in a segment of memory are addressed by adding the displacement to the contents of a base and an index register (BP, BX, DI, or SI). 33

34 Examples: MOV [BX+DI+1], AX ; move contents of AX into DS:BX+DI+1 - Physical Address = DSx10 + BX+DI+1H MOV AX, [BX+SI+10] ; move contents of the DS:BX+SI+10 into AX - Physical Address = DSx10 + BX+SI+10H MOV AH, [BP+DI+3] ; move contents of the SS:BP+SI+3 into AH - Physical Address = SSx10 + BP+DI+3H MOV AX, FILE[BX+DI] ; move contents of the DS:FILE+BX+DI into AX - Physical Address = DSx10 + BX+DI+FILE 34

35 Few Examples 35

36 Offset Registers For Various Segments The following Table provides a summary of the offset registers that can be used with the four segment registers of the 8086/8088. Segment Register CS DS ES SS Offset Register IP SI, DI, BX SI, DI, BX SP, BP 36

37 Easy Way to Remember 8086/88 Addressing Modes Total 17 different memory addressing modes:- - DISP, [BX], [BP], [SI], [DI], [BX+DISP], [BP+DISP],[SI+DISP], [DI+DISP], [BX+SI], [BX+DI], [BP+SI], [BP+DI],[BX+SI+DISP], [BX+DI+DISP], [BP+SI+DISP], and [BP+DI+DISP] DISP = Displacement 37

38 Assembly Language There is a one-to-one relationship between assembly and machine language instructions. What is found is that a compiled machine code implementation of a program written in a high-level language results in inefficient code. - More machine language instructions than an assembled version of an equivalent handwritten assembly language program. Two key benefits of assembly language programming. - It takes up less memory - It executes much faster 38

39 Languages in-terms of Applications One of the most beneficial uses of assembly language programming is real-time applications. Real time means the task required by the application must be completed before any other input to the program that will alter its operation can occur For example the device service routine which controls the operation of the floppy disk drive is a good example that is usually written in assembly language Assembly language not only good for controlling hardware devices but also performing pure software operations - searching through a large table of data for a special string of characters - Code translation from ASCII to EBCDIC - Table sort routines - Mathematical routines Assembly language: perform real-time operations High-level languages: Those operations mostly not critical in time. 39

40 Assembly Instructions 40

41 Assembler Directives Model: Selects the size of the memory model. -.MODEL SMALL : Reserves 64KB memory for Code Segment (CS) and 64KB for Data Segment (DS). -.MODEL MEDIUM : CS can exceed 64KB but DS must fit in 64KB of memory. -.MODEL COMPACT : CS is of fixed 64KB size but DS can vary. -.MODEL LARGE : Both CS & DS can exceed 64KB but only one of them. -.MODEL HUGE : Both can exceed its 64KB memory size. -.MODEL TINY : Used with compact (com) files in which CS & DS must fit into 64KB. 41

42 Assembly Code Template.MODEL SMALL.STACK ; beginning of the stack segment.data ; beginning of the data segment.code ; beginning of the code segment Ex:.DATA DATAW DW 213FH DATAB DB 52H SUM DB? ;nothing stored but storage is assigned Ex:.CODE ProcedureName PROC Attribute ProcedureName ENDP END ProcedureName ; name of the procedure ; procedure statements PROC is a statement used to indicate the beginning of a procedure or subroutine. ENDP indicates the end of the procedure. ProcedureName may be any valid identifier. Attribute is NEAR if the Procedure is in the same code segment as the calling program; or FAR if in a different code segment. 42

43 Simple Program Hello World! ; This program displays Hello, World!.MODEL SMALL.STACK 100H.DATA message DB Hello, World!, 0dh, 0ah, $ ; newline+eoc.code MAIN PROC mov ; address of DS mov ds, ax mov ah, 9 mov dx, offset message ; displacement message starting at 0 int 21h mov ax, 4C00h ; halt the program and return int 21h main endp end main 43

44 PROGRAM MEMORY ADDRESSING MODES Program memory-addressing modes, used with the JMP and CALL instructions, consist of three distinct forms: 1. Direct Program Memory Addressing 2. Relative Program Memory Addressing 3. Indirect Program Memory Addressing 44

45 1. Direct Program Memory Addressing Used for all jumps and calls by early microprocessor; also used in high-level languages, such as BASIC. - GOTO and GOSUB instructions The microprocessor uses this form, but not as often as relative and indirect program memory addressing. The instructions for direct program memory addressing store the address with the opcode. 45

46 Figure 3 14 The 5-byte machine language version of a JMP [10000H] instruction. This JMP instruction loads CS with 1000H and IP with 0000H to jump to memory location 10000H for the next instruction. - an intersegment jump is a jump to any memory location within the entire memory system Often called a far jump because it can jump to any memory location for the next instruction. - in real mode, any location within the first 1M byte 46

47 The only other instruction using direct program addressing is the intersegment or far CALL instruction. Usually, the name of a memory address, called a label, refers to the location that is called or jumped to instead of the actual numeric address. When using a label with the CALL or JMP instruction, most assemblers select the best form of program addressing. 47

48 2. Relative Program Memory Addressing Not available in all early microprocessors, but it is available to this family of microprocessors. The term relative means relative to the instruction pointer (IP). The JMP instruction is a 1-byte instruction, with a 1-byte or a 2-byte displacement that adds to the instruction pointer. An example is shown in Figure

49 Figure 3 15 A JMP [2] instruction. This instruction skips over the 2 bytes of memory that follow the JMP instruction. 49

50 3. Indirect Program Memory Addressing The microprocessor allows several forms of program indirect memory addressing for the JMP and CALL instructions. In and above, an extended register can be used to hold the address or indirect address of a relative JMP or CALL. - for example, the JMP EAX jumps to the location address by register EAX 50

51 If a relative register holds the address, the jump is considered to be an indirect jump. For example, JMP [BX] refers to the memory location within the data segment at the offset address contained in BX. at this offset address is a 16-bit number used as the offset address in the intrasegment jump this type of jump is sometimes called an indirect-indirect or doubleindirect jump Figure 3 16 shows a jump table that is stored, beginning at memory location TABLE. 51

52 Figure 3 16 A jump table that stores addresses of various programs. The exact address chosen from the TABLE is determined by an index stored with the jump instruction. 52

53 3 3 STACK MEMORY-ADDRESSING MODES The stack plays an important role in all microprocessors. - holds data temporarily and stores return addresses used by procedures Stack memory is LIFO (last-in, first-out) memory - describes the way data are stored and removed from the stack Data are placed on the stack with a PUSH instruction; removed with a POP instruction. Stack memory is maintained by two registers: - the stack pointer (SP or ESP) - the stack segment register (SS) 53

54 Whenever a word of data is pushed onto the stack, the high-order 8 bits are placed in the location addressed by SP 1. - low-order 8 bits are placed in the location addressed by SP 2 The SP is decremented by 2 so the next word is stored in the next available stack location. - the SP/ESP register always points to an area of memory located within the stack segment. In protected mode operation, the SS register holds a selector that accesses a descriptor for the base address of the stack segment. When data are popped from the stack, the low-order 8 bits are removed from the location addressed by SP. - High-order 8 bits are removed; the SP register is incremented by 2. 54

55 Figure 3 17 The PUSH and POP instructions: (a) PUSH BX places the contents of BX onto the stack; (b) POP CX removes data from the stack and places them into CX. Both instructions are shown after execution. 55

56 Note that PUSH and POP store or retrieve words of data never bytes in and above allow words or doublewords to be transferred to and from the stack. Data may be pushed onto the stack from any 16-bit register or segment register. - in and above, from any 32-bit extended register Data may be popped off the stack into any register or any segment register except CS. 56

57 PUSHA and POPA instructions push or pop all except segment registers, on the stack. Not available on early 8086/8088 processors and above allow extended registers to be pushed or popped bit mode for Pentium and Core2 does not contain a PUSHA or POPA instruction 57

58 Figure 3 14 The 5-byte machine language version of a JMP [10000H] instruction. 58

6/20/2011. Introduction. Chapter Objectives Upon completion of this chapter, you will be able to:

6/20/2011. Introduction. Chapter Objectives Upon completion of this chapter, you will be able to: Introduction Efficient software development for the microprocessor requires a complete familiarity with the addressing modes employed by each instruction. This chapter explains the operation of the stack

More information

EEM336 Microprocessors I. Addressing Modes

EEM336 Microprocessors I. Addressing Modes EEM336 Microprocessors I Addressing Modes Introduction Efficient software development for the microprocessor requires a complete familiarity with the addressing modes employed by each instruction. This

More information

Chapter 3: Addressing Modes

Chapter 3: Addressing Modes Chapter 3: Addressing Modes Chapter 3 Addressing Modes Note: Adapted from (Author Slides) Instructor: Prof. Dr. Khalid A. Darabkh 2 Introduction Efficient software development for the microprocessor requires

More information

Assembly Language Each statement in an assembly language program consists of four parts or fields.

Assembly Language Each statement in an assembly language program consists of four parts or fields. Chapter 3: Addressing Modes Assembly Language Each statement in an assembly language program consists of four parts or fields. The leftmost field is called the label. - used to identify the name of a memory

More information

EEM336 Microprocessors I. Data Movement Instructions

EEM336 Microprocessors I. Data Movement Instructions EEM336 Microprocessors I Data Movement Instructions Introduction This chapter concentrates on common data movement instructions. 2 Chapter Objectives Upon completion of this chapter, you will be able to:

More information

EC 333 Microprocessor and Interfacing Techniques (3+1)

EC 333 Microprocessor and Interfacing Techniques (3+1) EC 333 Microprocessor and Interfacing Techniques (3+1) Lecture 6 8086/88 Microprocessor Programming (Arithmetic Instructions) Dr Hashim Ali Fall 2018 Department of Computer Science and Engineering HITEC

More information

On 386 and later machines, segment had a size of 64 KB. Therefore, to get the actual physical address, we can calculate it in the following way:

On 386 and later machines, segment had a size of 64 KB. Therefore, to get the actual physical address, we can calculate it in the following way: Memory Structure Segment and Offset Actual addresses on the IBM PC are given as a pair of 16-bit numbers, the segment and the offset, written in the form segment:offset. We have ignored the segment because

More information

EC-333 Microprocessor and Interfacing Techniques

EC-333 Microprocessor and Interfacing Techniques EC-333 Microprocessor and Interfacing Techniques Lecture 3 The Microprocessor and its Architecture Dr Hashim Ali Fall - 2018 Department of Computer Science and Engineering HITEC University Taxila Slides

More information

EC 333 Microprocessor and Interfacing Techniques (3+1)

EC 333 Microprocessor and Interfacing Techniques (3+1) EC 333 Microprocessor and Interfacing Techniques (3+1) Lecture 7 8086/88 Microprocessor Programming (Data Movement Instructions) Dr Hashim Ali Spring 2018 Department of Computer Science and Engineering

More information

Assembling, Linking and Executing 1) Assembling: .obj obj .obj.lst .crf Assembler Types: a) One pass assembler:

Assembling, Linking and Executing 1) Assembling: .obj obj .obj.lst .crf Assembler Types: a) One pass assembler: Assembling, Linking and Executing 1) Assembling: - Assembling converts source program into object program if syntactically correct and generates an intermediate.obj file or module. - It calculates the

More information

Intel 8086: Instruction Set

Intel 8086: Instruction Set IUST-EE (Chapter 6) Intel 8086: Instruction Set 1 Outline Instruction Set Data Transfer Instructions Arithmetic Instructions Bit Manipulation Instructions String Instructions Unconditional Transfer Instruction

More information

ORG ; TWO. Assembly Language Programming

ORG ; TWO. Assembly Language Programming Dec 2 Hex 2 Bin 00000010 ORG ; TWO Assembly Language Programming OBJECTIVES this chapter enables the student to: Explain the difference between Assembly language instructions and pseudo-instructions. Identify

More information

BAHAR DÖNEMİ MİKROİŞLEMCİLER LAB3 FÖYÜ

BAHAR DÖNEMİ MİKROİŞLEMCİLER LAB3 FÖYÜ INTRODUCTION OF SEGMENT A typical program on 8086 consists of at least three segments Code segment: Contains instructions that accomplish certain tasks Data segment: Stores information to be processed

More information

CC411: Introduction To Microprocessors

CC411: Introduction To Microprocessors CC411: Introduction To Microprocessors OBJECTIVES this chapter enables the student to: Describe the Intel family of microprocessors from 8085 to Pentium. In terms of bus size, physical memory & special

More information

UMBC. A register, an immediate or a memory address holding the values on. Stores a symbolic name for the memory location that it represents.

UMBC. A register, an immediate or a memory address holding the values on. Stores a symbolic name for the memory location that it represents. Intel Assembly Format of an assembly instruction: LABEL OPCODE OPERANDS COMMENT DATA1 db 00001000b ;Define DATA1 as decimal 8 START: mov eax, ebx ;Copy ebx to eax LABEL: Stores a symbolic name for the

More information

CS401 Assembly Language Solved MCQS From Midterm Papers

CS401 Assembly Language Solved MCQS From Midterm Papers CS401 Assembly Language Solved MCQS From Midterm Papers May 14,2011 MC100401285 Moaaz.pk@gmail.com MC100401285@gmail.com PSMD01(IEMS) Question No:1 ( Marks: 1 ) - Please choose one The first instruction

More information

Intel 8086 MICROPROCESSOR ARCHITECTURE

Intel 8086 MICROPROCESSOR ARCHITECTURE Intel 8086 MICROPROCESSOR ARCHITECTURE 1 Features It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 2 20 memory locations (1 MB). It can support up to 64K I/O ports. It provides 14, 16

More information

Code segment Stack segment

Code segment Stack segment Registers Most of the registers contain data/instruction offsets within 64 KB memory segment. There are four different 64 KB segments for instructions, stack, data and extra data. To specify where in 1

More information

Intel 8086 MICROPROCESSOR. By Y V S Murthy

Intel 8086 MICROPROCESSOR. By Y V S Murthy Intel 8086 MICROPROCESSOR By Y V S Murthy 1 Features It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 2 20 memory locations (1 MB). It can support up to 64K I/O ports. It provides 14,

More information

9/25/ Software & Hardware Architecture

9/25/ Software & Hardware Architecture 8086 Software & Hardware Architecture 1 INTRODUCTION It is a multipurpose programmable clock drive register based integrated electronic device, that reads binary instructions from a storage device called

More information

Assembler Programming. Lecture 2

Assembler Programming. Lecture 2 Assembler Programming Lecture 2 Lecture 2 8086 family architecture. From 8086 to Pentium4. Registers, flags, memory organization. Logical, physical, effective address. Addressing modes. Processor Processor

More information

Addressing Modes on the x86

Addressing Modes on the x86 Addressing Modes on the x86 register addressing mode mov ax, ax, mov ax, bx mov ax, cx mov ax, dx constant addressing mode mov ax, 25 mov bx, 195 mov cx, 2056 mov dx, 1000 accessing data in memory There

More information

Experiment 8 8 Subroutine Handling Instructions and Macros

Experiment 8 8 Subroutine Handling Instructions and Macros Introduction Experiment 8 8 Subroutine Handling Instructions and Macros In this experiment you will be introduced to subroutines and how to call them. You will verify the exchange of data between a main

More information

Assembly Language. Dr. Esam Al_Qaralleh CE Department Princess Sumaya University for Technology. Overview of Assembly Language

Assembly Language. Dr. Esam Al_Qaralleh CE Department Princess Sumaya University for Technology. Overview of Assembly Language 4345 Assembly Language Assembly Language Dr. Esam Al_Qaralleh CE Department Princess Sumaya University for Technology Assembly Language 3-1 Overview of Assembly Language Advantages: Faster as compared

More information

VARDHAMAN COLLEGE OF ENGINEERING (AUTONOMOUS) Shamshabad, Hyderabad

VARDHAMAN COLLEGE OF ENGINEERING (AUTONOMOUS) Shamshabad, Hyderabad Introduction to MS-DOS Debugger DEBUG In this laboratory, we will use DEBUG program and learn how to: 1. Examine and modify the contents of the 8086 s internal registers, and dedicated parts of the memory

More information

Computer Architecture 1 ح 303

Computer Architecture 1 ح 303 Lecture 4 A. Addressing MODES 1. Introduction to assembly language programming: Program is a sequence of commands used to tell a microcomputer what to do. Each command in a program is an instruction Programs

More information

if 2 16bit operands multiplied the result will be

if 2 16bit operands multiplied the result will be how many operands in ADC? ans:3 how 32 bit word is defined? ans define double if 2 16bit operands multiplied the result will be ans 32bit if div by ero occurs then?? ans div by zero int for software int

More information

A4 Sample Solution Ch3

A4 Sample Solution Ch3 A4 Sample Solution Ch3 2. AL, AH, BL, BH,CL,CH,DLl, DH 3. AX, BX, CX, DX, SP, BP, SI, DI, CS, DS, ES, SS, FS, GS 4. EAX, EBX, ECX, EDX, ESP, EBP, EDI, ESI 5. RAX, RBX, RCX, RDX, RSP, RBP, RSI, RDI and

More information

MICROPROCESSOR TECHNOLOGY

MICROPROCESSOR TECHNOLOGY MICROPROCESSOR TECHNOLOGY Assis. Prof. Hossam El-Din Moustafa Lecture 6 Ch.3 Addressing Modes 1 Chapter Objectives Explain the operation of each data-addressing mode. Use data-addressing modes to form

More information

SHEET-2 ANSWERS. [1] Rewrite Program 2-3 to transfer one word at a time instead of one byte.

SHEET-2 ANSWERS. [1] Rewrite Program 2-3 to transfer one word at a time instead of one byte. SHEET-2 ANSWERS [1] Rewrite Program 2-3 to transfer one word at a time instead of one byte. TITLE PROG2-3 PURPOSE: TRANSFER 6 WORDS OF DATA PAGE 60,132.MODEL SMALL.STACK 64.DATA ORG 10H DATA_IN DW 234DH,

More information

4- MACHINE LANGUAGE CODING 4-1THE INSTRUCTION SET:

4- MACHINE LANGUAGE CODING 4-1THE INSTRUCTION SET: 4- MACHINE LANGUAGE CODING 4-1THE INSTRUCTION SET: The microprocessor's instruction set defines the basic operations that a programmer can specify to the device to perform. Table 4-1 contains list basic

More information

Computer Organization & Assembly Language Programming. CSE 2312 Lecture 15 Addressing and Subroutine

Computer Organization & Assembly Language Programming. CSE 2312 Lecture 15 Addressing and Subroutine Computer Organization & Assembly Language Programming CSE 2312 Lecture 15 Addressing and Subroutine 1 Sections in 8088 Code TEXT section, for the processor instructions. DATA section for the initialization

More information

EXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM

EXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM EXPERIMENT WRITE UP AIM: Assembly language program for 16 bit BCD addition LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM TOOLS/SOFTWARE

More information

Scott M. Lewandowski CS295-2: Advanced Topics in Debugging September 21, 1998

Scott M. Lewandowski CS295-2: Advanced Topics in Debugging September 21, 1998 Scott M. Lewandowski CS295-2: Advanced Topics in Debugging September 21, 1998 Assembler Syntax Everything looks like this: label: instruction dest,src instruction label Comments: comment $ This is a comment

More information

Lecture 16: Passing Parameters on the Stack. Push Examples. Pop Examples. CALL and RET

Lecture 16: Passing Parameters on the Stack. Push Examples. Pop Examples. CALL and RET Lecture 1: Passing Parameters on the Stack Push Examples Quick Stack Review Passing Parameters on the Stack Binary/ASCII conversion ;assume SP = 0202 mov ax, 124h push ax push 0af8h push 0eeeh EE 0E F8

More information

Microcomputer Architecture..Second Year (Sem.2).Lecture(2) مدرس المادة : م. سندس العزاوي... قسم / الحاسبات

Microcomputer Architecture..Second Year (Sem.2).Lecture(2) مدرس المادة : م. سندس العزاوي... قسم / الحاسبات 1) Input/output In computing, input/output or I/O, is the communication between an information processing system (such as a computer) and the outside world, possibly a human or another information processing

More information

THE UNIVERSITY OF TRINIDAD & TOBAGO

THE UNIVERSITY OF TRINIDAD & TOBAGO THE UNIVERSITY OF TRINIDAD & TOBAGO FINAL ASSESSMENT/EXAMINATIONS DECEMBER 2012 Course Code and Title: Microprocessor Architecture & Interfacing Programme: Computer Engineering Technician Date and Time:

More information

PESIT Bangalore South Campus

PESIT Bangalore South Campus INTERNAL ASSESSMENT TEST 2 Date : 02/04/2018 Max Marks: 40 Subject & Code : Microprocessor (15CS44) Section : IV A and B Name of faculty: Deepti.C Time : 8:30 am-10:00 am Note: Note: Answer any five complete

More information

SRI VENKATESWARA COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ECE EC6504 MICROPROCESSOR AND MICROCONTROLLER (REGULATION 2013)

SRI VENKATESWARA COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ECE EC6504 MICROPROCESSOR AND MICROCONTROLLER (REGULATION 2013) SRI VENKATESWARA COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ECE EC6504 MICROPROCESSOR AND MICROCONTROLLER (REGULATION 2013) UNIT I THE 8086 MICROPROCESSOR PART A (2 MARKS) 1. What are the functional

More information

MODE (mod) FIELD CODES. mod MEMORY MODE: 8-BIT DISPLACEMENT MEMORY MODE: 16- OR 32- BIT DISPLACEMENT REGISTER MODE

MODE (mod) FIELD CODES. mod MEMORY MODE: 8-BIT DISPLACEMENT MEMORY MODE: 16- OR 32- BIT DISPLACEMENT REGISTER MODE EXERCISE 9. Determine the mod bits from Figure 7-24 and write them in Table 7-7. MODE (mod) FIELD CODES mod 00 01 10 DESCRIPTION MEMORY MODE: NO DISPLACEMENT FOLLOWS MEMORY MODE: 8-BIT DISPLACEMENT MEMORY

More information

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY BACKGROUND Segment The "SEGMENT" and "ENDS" directives indicate to the assembler the beginning and ending of a segment and have the following format label SEGMENT [options] ;place the statements belonging

More information

CS-202 Microprocessor and Assembly Language

CS-202 Microprocessor and Assembly Language CS-202 Microprocessor and Assembly Language Lecture 2 Introduction to 8086 Assembly Language Dr Hashim Ali Spring - 2019 Department of Computer Science and Engineering HITEC University Taxila!1 Lecture

More information

The Stack. Lecture 15: The Stack. The Stack. Adding Elements. What is it? What is it used for?

The Stack. Lecture 15: The Stack. The Stack. Adding Elements. What is it? What is it used for? Lecture 15: The Stack The Stack What is it? What is it used for? A special memory buffer (outside the CPU) used as a temporary holding area for addresses and data The stack is in the stack segment. The

More information

PHY4635/5635 Spring Lecture 8: Program Control Instructions

PHY4635/5635 Spring Lecture 8: Program Control Instructions PHY4635/5635 Spring 2009 Lecture 8: Program Control Instructions Short, Near and Far Jumps Short jump: jump is within +127 to -128 bytes from the address following the jump. Relative jumps : moves with

More information

3- ADDRESSING MODES in 8086: In this section we use the MOV instruction to describe the data-addressing modes. Figure 3-1 shows the MOV instruction.

3- ADDRESSING MODES in 8086: In this section we use the MOV instruction to describe the data-addressing modes. Figure 3-1 shows the MOV instruction. 3- ADDRSING MOD in 8086: In this section we use the MOV instruction to describe the data-addressing modes. Figure 3-1 shows the MOV instruction. Fig 3-1 The MOV instruction An addressing mode is a method

More information

Microprocessor. By Mrs. R.P.Chaudhari Mrs.P.S.Patil

Microprocessor. By Mrs. R.P.Chaudhari Mrs.P.S.Patil Microprocessor By Mrs. R.P.Chaudhari Mrs.P.S.Patil Chapter 1 Basics of Microprocessor CO-Draw Architecture Of 8085 Salient Features of 8085 It is a 8 bit microprocessor. It is manufactured with N-MOS technology.

More information

Lecture 15 Intel Manual, Vol. 1, Chapter 3. Fri, Mar 6, Hampden-Sydney College. The x86 Architecture. Robb T. Koether. Overview of the x86

Lecture 15 Intel Manual, Vol. 1, Chapter 3. Fri, Mar 6, Hampden-Sydney College. The x86 Architecture. Robb T. Koether. Overview of the x86 Lecture 15 Intel Manual, Vol. 1, Chapter 3 Hampden-Sydney College Fri, Mar 6, 2009 Outline 1 2 Overview See the reference IA-32 Intel Software Developer s Manual Volume 1: Basic, Chapter 3. Instructions

More information

Data Movement Instructions

Data Movement Instructions Segment 3B Data Movement Instructions PUSH/POP Contents Load-Effective address (LEA, LDS, LES) String Data Transfer (LODS, STOS, MOVS) XCHG, XLAT IN and OUT Course Instructor Mohammed Abdul kader Lecturer,

More information

1. Introduction to Assembly Language

1. Introduction to Assembly Language www.vchowk.com 1. Introduction to Assembly Language Solved EXERCISE 1 Note: Dear fellows I tried my best to solve this exercise questions if there s any mistake or doubt in any question correct it and

More information

CS401 - Computer Architecture and Assembly Language Programming Glossary By

CS401 - Computer Architecture and Assembly Language Programming Glossary By CS401 - Computer Architecture and Assembly Language Programming Glossary By absolute address : A virtual (not physical) address within the process address space that is computed as an absolute number.

More information

icroprocessor istory of Microprocessor ntel 8086:

icroprocessor istory of Microprocessor ntel 8086: Microprocessor A microprocessor is an electronic device which computes on the given input similar to CPU of a computer. It is made by fabricating millions (or billions) of transistors on a single chip.

More information

The x86 Architecture

The x86 Architecture The x86 Architecture Lecture 24 Intel Manual, Vol. 1, Chapter 3 Robb T. Koether Hampden-Sydney College Fri, Mar 20, 2015 Robb T. Koether (Hampden-Sydney College) The x86 Architecture Fri, Mar 20, 2015

More information

Computer Processors. Part 2. Components of a Processor. Execution Unit The ALU. Execution Unit. The Brains of the Box. Processors. Execution Unit (EU)

Computer Processors. Part 2. Components of a Processor. Execution Unit The ALU. Execution Unit. The Brains of the Box. Processors. Execution Unit (EU) Part 2 Computer Processors Processors The Brains of the Box Computer Processors Components of a Processor The Central Processing Unit (CPU) is the most complex part of a computer In fact, it is the computer

More information

Chapter 4: Data Movement Instructions. 4 1 MOV Revisited

Chapter 4: Data Movement Instructions. 4 1 MOV Revisited Chapter 4: Data Movement Instructions 4 1 MOV Revisited In this chapter, the MOV instruction introduces machine language instructions available with various addressing modes and instructions. It may be

More information

Transfer of Control. Lecture 10 JMP. JMP Formats. Jump Loop Homework 3 Outputting prompts Reading single characters

Transfer of Control. Lecture 10 JMP. JMP Formats. Jump Loop Homework 3 Outputting prompts Reading single characters Lecture 10 Jump Loop Homework 3 Outputting prompts Reading single characters Transfer of Control The CPU loads and executes programs sequentially. You d like to be able to implement if statements, gotos,

More information

db "Please enter up to 256 characters (press Enter Key to finish): ",0dh,0ah,'$'

db Please enter up to 256 characters (press Enter Key to finish): ,0dh,0ah,'$' PA4 Sample Solution.model large.stack 100h.data msg1 db "This programs scans a string of up to 256 bytes and counts the repetitions of the number 4206 and sums them.",0dh,0ah,'$' msg2 db "Please enter

More information

Hardware and Software Architecture. Chapter 2

Hardware and Software Architecture. Chapter 2 Hardware and Software Architecture Chapter 2 1 Basic Components The x86 processor communicates with main memory and I/O devices via buses Data bus for transferring data Address bus for the address of a

More information

Computer Architecture and System Software Lecture 06: Assembly Language Programming

Computer Architecture and System Software Lecture 06: Assembly Language Programming Computer Architecture and System Software Lecture 06: Assembly Language Programming Instructor: Rob Bergen Applied Computer Science University of Winnipeg Announcements Assignment 3 due thursday Midterm

More information

Experiment 3 3 Basic Input Output

Experiment 3 3 Basic Input Output Experiment 3 3 Basic Input Output Introduction The aim of this experiment is to introduce the use of input/output through the DOS interrupt. Objectives: INT Instruction Keyboard access using DOS function

More information

Basic characteristics & features of 8086 Microprocessor Dr. M. Hebaishy

Basic characteristics & features of 8086 Microprocessor Dr. M. Hebaishy Basic characteristics & features of 8086 Microprocessor Dr. M. Hebaishy Digital Logic Design Ch1-1 8086 Microprocessor Features: The 8086 microprocessor is a 16 bit microprocessor. The term 16 bit means

More information

Assembly Language Lab # 9

Assembly Language Lab # 9 Faculty of Engineering Computer Engineering Department Islamic University of Gaza 2011 Assembly Language Lab # 9 Stacks and Subroutines Eng. Doaa Abu Jabal Assembly Language Lab # 9 Stacks and Subroutines

More information

Dr. Ramesh K. Karne Department of Computer and Information Sciences, Towson University, Towson, MD /12/2014 Slide 1

Dr. Ramesh K. Karne Department of Computer and Information Sciences, Towson University, Towson, MD /12/2014 Slide 1 Dr. Ramesh K. Karne Department of Computer and Information Sciences, Towson University, Towson, MD 21252 rkarne@towson.edu 11/12/2014 Slide 1 Intel x86 Aseembly Language Assembly Language Assembly Language

More information

Tutorial Letter 103/3/2012 Computer Organization COS2621 Semesters 1 & 2

Tutorial Letter 103/3/2012 Computer Organization COS2621 Semesters 1 & 2 COS2621/103/3/2012 Tutorial Letter 103/3/2012 Computer Organization COS2621 Semesters 1 & 2 School of Computing Solutions to self tests Bar code 2 Self-test A Question 1 Alternative 1 Which one of the

More information

Come and join us at WebLyceum

Come and join us at WebLyceum Come and join us at WebLyceum For Past Papers, Quiz, Assignments, GDBs, Video Lectures etc Go to http://www.weblyceum.com and click Register In Case of any Problem Contact Administrators Rana Muhammad

More information

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY BACKGROUND 8086 CPU has 8 general purpose registers listed below: AX - the accumulator register (divided into AH / AL): 1. Generates shortest machine code 2. Arithmetic, logic and data transfer 3. One

More information

x86 Assembly Tutorial COS 318: Fall 2017

x86 Assembly Tutorial COS 318: Fall 2017 x86 Assembly Tutorial COS 318: Fall 2017 Project 1 Schedule Design Review: Monday 9/25 Sign up for 10-min slot from 3:00pm to 7:00pm Complete set up and answer posted questions (Official) Precept: Monday

More information

We can study computer architectures by starting with the basic building blocks. Adders, decoders, multiplexors, flip-flops, registers,...

We can study computer architectures by starting with the basic building blocks. Adders, decoders, multiplexors, flip-flops, registers,... COMPUTER ARCHITECTURE II: MICROPROCESSOR PROGRAMMING We can study computer architectures by starting with the basic building blocks Transistors and logic gates To build more complex circuits Adders, decoders,

More information

UNIT 4. Modular Programming

UNIT 4. Modular Programming 1 UNIT 4. Modular Programming Program is composed from several smaller modules. Modules could be developed by separate teams concurrently. The modules are only assembled producing.obj modules (Object modules).

More information

Module 3 Instruction Set Architecture (ISA)

Module 3 Instruction Set Architecture (ISA) Module 3 Instruction Set Architecture (ISA) I S A L E V E L E L E M E N T S O F I N S T R U C T I O N S I N S T R U C T I O N S T Y P E S N U M B E R O F A D D R E S S E S R E G I S T E R S T Y P E S O

More information

Microprocessors & Assembly Language Lab 1 (Introduction to 8086 Programming)

Microprocessors & Assembly Language Lab 1 (Introduction to 8086 Programming) Microprocessors & Assembly Language Lab 1 (Introduction to 8086 Programming) Learning any imperative programming language involves mastering a number of common concepts: Variables: declaration/definition

More information

Chapter Three Addressing Mode MOV AX, BX

Chapter Three Addressing Mode MOV AX, BX Chapter Three The 8086 The 8086 When the 8086 executes an instruction, it performs the specified function on data. The data are called its operands and may be part of the instruction reside in one of the

More information

Basic Assembly SYSC-3006

Basic Assembly SYSC-3006 Basic Assembly Program Development Problem: convert ideas into executing program (binary image in memory) Program Development Process: tools to provide people-friendly way to do it. Tool chain: 1. Programming

More information

Project 1: Bootloader. COS 318 Fall 2015

Project 1: Bootloader. COS 318 Fall 2015 Project 1: Bootloader COS 318 Fall 2015 Project 1: Schedule Design Review - Monday, 9/28-10- min Ime slots from 1:30pm- 6:20pm - Write funcions print_char and print_string! - Answer the quesions: ü How

More information

Experiment N o 8. String Handling Instructions

Experiment N o 8. String Handling Instructions Experiment N o 8 String Handling Instructions Introduction: In this experiment you will deal with string handling instructions, such as reading a string, moving a string from one memory location to another,

More information

Registers. Ray Seyfarth. September 8, Bit Intel Assembly Language c 2011 Ray Seyfarth

Registers. Ray Seyfarth. September 8, Bit Intel Assembly Language c 2011 Ray Seyfarth Registers Ray Seyfarth September 8, 2011 Outline 1 Register basics 2 Moving a constant into a register 3 Moving a value from memory into a register 4 Moving values from a register into memory 5 Moving

More information

reply db y prompt db Enter your favourite colour:, 0 colour db 80 dup(?) i db 20 k db? num dw 4000 large dd 50000

reply db y prompt db Enter your favourite colour:, 0 colour db 80 dup(?) i db 20 k db? num dw 4000 large dd 50000 Declaring Variables in Assembly Language As in Java, variables must be declared before they can be used Unlike Java, we do not specify a variable type in the declaration in assembly language Instead we

More information

Intel x86 Memory. Architecture. The x86 isn't all that complex it just doesn't make a lot of sense. Program Segments. x86 Data and Address Ranges

Intel x86 Memory. Architecture. The x86 isn't all that complex it just doesn't make a lot of sense. Program Segments. x86 Data and Address Ranges 1 2 Intel x86 Memory The x86 isn't all that complex it just doesn't make a lot of sense. Architecture Mike Johnson, Leader of 80x86 Design at AMD, Microprocessor Report (1994) 3 4 Program Segments x86

More information

MICROPROCESSOR PROGRAMMING AND SYSTEM DESIGN

MICROPROCESSOR PROGRAMMING AND SYSTEM DESIGN MICROPROCESSOR PROGRAMMING AND SYSTEM DESIGN ROAD MAP SDK-86 Intel 8086 Features 8086 Block Diagram 8086 Architecture Bus Interface Unit Execution Unit 8086 Architecture 8086 Programmer s Model Flag Register

More information

CS499. Intel Architecture

CS499. Intel Architecture CS499 Intel Architecture Intel Architecture References IA-32 Intel Architecture Software Developer s Manual, Volume 1: Basic Architecture Volume 2: Instruction Set Reference www.intel.com/design/pentiumii/manuals/

More information

Week 2 The 80x86 Microprocessor Architecture

Week 2 The 80x86 Microprocessor Architecture Week 2 The 80x86 Microprocessor Architecture OBJECTIVES this chapter enables the student to: Describe the Intel family of microprocessors from 8085 to Pentium. In terms of bus size, physical memory & special

More information

Week /8086 Microprocessor Programming II

Week /8086 Microprocessor Programming II Week 5 8088/8086 Microprocessor Programming II Quick Review Shift & Rotate C Target register or memory SHL/SAL 0 C SHR 0 SAR C Sign Bit 2 Examples Examples Ex. Ex. Ex. SHL dest, 1; SHL dest,cl; SHL dest,

More information

8086 INTERNAL ARCHITECTURE

8086 INTERNAL ARCHITECTURE 8086 INTERNAL ARCHITECTURE Segment 2 Intel 8086 Microprocessor The 8086 CPU is divided into two independent functional parts: a) The Bus interface unit (BIU) b) Execution Unit (EU) Dividing the work between

More information

Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions.

Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions. 8086 Microprocessor Microprocessor Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions. It is used as CPU (Central Processing Unit) in computers.

More information

.code. lea dx,msg2. Page 1/8. Problem 1: Programming in Assembly [25 Points]

.code. lea dx,msg2. Page 1/8. Problem 1: Programming in Assembly [25 Points] Problem : Programming in Assembly [ Points] The following assembly program is supposed to: receive three integer numbers from the console, call a function, name sort, function sort arranges the three input

More information

Interfacing Compiler and Hardware. Computer Systems Architecture. Processor Types And Instruction Sets. What Instructions Should A Processor Offer?

Interfacing Compiler and Hardware. Computer Systems Architecture. Processor Types And Instruction Sets. What Instructions Should A Processor Offer? Interfacing Compiler and Hardware Computer Systems Architecture FORTRAN 90 program C++ program Processor Types And Sets FORTRAN 90 Compiler C++ Compiler set level Hardware 1 2 What s Should A Processor

More information

Lesson 1. Fundamentals of assembly language

Lesson 1. Fundamentals of assembly language Lesson 1. Fundamentals of assembly language Computer Structure and Organization Graduate in Computer Sciences Graduate in Computer Engineering Graduate in Computer Sciences Graduate in Computer Engineering

More information

CG2007 Microprocessor systems.

CG2007 Microprocessor systems. CG2007 Microprocessor systems Tutorial 1 Semester 2 AY 2011-12 Ganesh Iyer ganesh.vigneswara@gmail.com http://ganeshniyer.com About Me I have 3 years of Industry work experience in Bangalore, India. I

More information

CS401 Assembly Language Solved Subjective MAY 03,2012 From Midterm Papers. MC

CS401 Assembly Language Solved Subjective MAY 03,2012 From Midterm Papers. MC CS401 Assembly Language Solved Subjective MAY 03,2012 From Midterm Papers MC100401285 Moaaz.pk@gmail.com Mc100401285@gmail.com PSMD01 MIDTERM FALL 2011 CS401 Assembly Language Q: Affected flag of AND operation

More information

Experiment N o 3 Segmentation and Addressing Modes

Experiment N o 3 Segmentation and Addressing Modes Introduction: Experiment N o 3 Segmentation and Addressing Modes In this experiment you will be introduced to physical segmentation of the memory, and the logical segmentation of programs. You will also

More information

Assembly Language: g Part III. First Semester 2013 Department of Computer Science Faculty of Science Chiang Mai University

Assembly Language: g Part III. First Semester 2013 Department of Computer Science Faculty of Science Chiang Mai University System Programming with Assembly Language: g Part III First Semester 2013 Department of Computer Science Faculty of Science Chiang Mai University Outline A Few Basic Instructions Translation of high Level

More information

INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI

INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI Note: PUSHF / POPF have no operands The figure below shows that if (SS) = 3000H, (SP) = 0042H, so the execution of POP CX loads CX by the word 4050H form the stack segment. The SP is incremented by 2.

More information

Objectives. ICT106 Fundamentals of Computer Systems Topic 8. Procedures, Calling and Exit conventions, Run-time Stack Ref: Irvine, Ch 5 & 8

Objectives. ICT106 Fundamentals of Computer Systems Topic 8. Procedures, Calling and Exit conventions, Run-time Stack Ref: Irvine, Ch 5 & 8 Objectives ICT106 Fundamentals of Computer Systems Topic 8 Procedures, Calling and Exit conventions, Run-time Stack Ref: Irvine, Ch 5 & 8 To understand how HLL procedures/functions are actually implemented

More information

Lecture (02) The Microprocessor and Its Architecture By: Dr. Ahmed ElShafee

Lecture (02) The Microprocessor and Its Architecture By: Dr. Ahmed ElShafee Lecture (02) The Microprocessor and Its Architecture By: Dr. Ahmed ElShafee ١ INTERNAL MICROPROCESSOR ARCHITECTURE Before a program is written or instruction investigated, internal configuration of the

More information

Assignment no:4 on chapter no :3 : Instruction set of 8086

Assignment no:4 on chapter no :3 : Instruction set of 8086 Assignment no:4 on chapter no :3 : Instruction set of 8086 1) Describe any two string operation instruction of 8086 with syntax & one example of each. 1] REP: REP is a prefix which is written before one

More information

ADVANCE MICROPROCESSOR & INTERFACING

ADVANCE MICROPROCESSOR & INTERFACING VENUS INTERNATIONAL COLLEGE OF TECHNOLOGY Gandhinagar Department of Computer Enggineering ADVANCE MICROPROCESSOR & INTERFACING Name : Enroll no. : Class Year : 2014-15 : 5 th SEM C.E. VENUS INTERNATIONAL

More information

8086 ALP TOOLS (CH 2) CHAPTER 2

8086 ALP TOOLS (CH 2) CHAPTER 2 1 CHAPTER 2 In this chapter, we shall discuss the Assembly Language Program development tools, PC memory structure and Assembler directives. Books to be Referred: 1. Microprocessors and Interfacing 2nd

More information

Marking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313)

Marking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313) Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 02/06/2018 Section 1 Weighting 40% of

More information

INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI

INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI 8 Unsigned and Signed Integer Numbers 1. Unsigned integer numbers: each type of integer can be either byte-wide or word-wide. This data type can be used to represent decimal numbers in the range 0 through

More information

Experiment 3. TITLE Optional: Write here the Title of your program.model SMALL This directive defines the memory model used in the program.

Experiment 3. TITLE Optional: Write here the Title of your program.model SMALL This directive defines the memory model used in the program. Experiment 3 Introduction: In this experiment the students are exposed to the structure of an assembly language program and the definition of data variables and constants. Objectives: Assembly language

More information

Ex: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans.

Ex: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans. INSTRUCTOR: ABDULMUTTALIB A H ALDOURI Conditional Jump Cond Unsigned Signed = JE : Jump Equal JE : Jump Equal ZF = 1 JZ : Jump Zero JZ : Jump Zero ZF = 1 JNZ : Jump Not Zero JNZ : Jump Not Zero ZF = 0

More information