Winter Compiler Construction T9 IR part 2 + Runtime organization. Announcements. Today. Know thy group s code

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1 Winter Compiler Construction T9 IR part 2 + Runtime organization Mool Sagiv and Roman Manevich School of Computer Science Tel-Aviv Universit Announcements What is epected in PA3 documentation (5 pts) Testing strateg: lists of tests and what the check (scope rules, tpe rules etc.) How did ou conduct the semantic analsis in which order do ou do things Don t document the most obvious things ( The input to CUP is in IC.cup ), don t repeat stuff alread in PA3.pdf Document non-obvious choices ( We build the tpe table after parsing, we do not handle situation X, we handle special situation Y like so ) Output format (e.g., first we print tpe table then we print ) Know th group s code 2 Toda ic IC Language Leical Analsis Snta Analsis Parsing AST Smbol Table etc. Inter. Rep. (IR) Code Generation ee Eecutable code Toda: IR Specific LIR language Translating HIR nodes Runtime organization Objects Polmorphism Net time: Simple lowering techniques Runtime organization Activation records (frames) PA4 3

2 Recap tomatoes + potatoes + carrots Leical analzer tomatoes,plus,potatoes,plus,carrots,eof Parser AddEpr left right Smtab hierarch Global tpe table AddEpr left right smbol tomatoes kind var tpe int Id int Tpe obj O potatoes var int boolean O2 LocationEpr id=tomatoes LocationEpr id=potatoes LocationEpr id=carrots carrots var int Foo O3 Tpe checking A d E : T[] A d E.length : int Additional semantic checks Move tomatoes,r Move potatoes,r2 Add R2,R... LIR 4 Low-level IR (LIR) An abstract machine language Generic instruction set Not specific to a particular machine Low-level language constructs No looping structures, onl labels + jumps/conditional jumps We will use two-operand instructions Advantage close to Intel assembl language LIR spec. available on web-site Will be used in PA4 Subject to changes LIR from T8 onl for demonstration purposes 5 LIR instructions Instruction Move c,rn Move,Rn Move Rn, Add Rm,Rn Sub Rm,Rn Mul Rm,Rn Meaning Rn = c Rn = = Rn Rn = Rn + Rm Rn = Rn Rm Rn = Rn * Rm... Immediate (constant) Memor (variable) Note : rightmost operand = operation destination Note 2: two register instr - second operand doubles as source and destination 6 2

3 Eample = 42; while ( > ) { = - ; Compare results stored in global compare register (implicit register) Condition depends on compare register Move 42,R Move R, _test_label: Move,R Compare,R JumpLE _end_label Move,R Move,R2 Sub R,R2 Move R2, Jump _test_label (warning: code shown is a naïve translation) 7 Translating epressions eample TR[ + 42] visit visit (left) Add R2, R AddEpr left right visit (right) Move, R Move 42, R2 Add R2, R LocationE id = Move, R ValueEpr val = 42 Move 42, R2 Ver inefficient translation can we do better? 8 Translation (IR lowering) How to translate HIR to LIR? Assuming HIR has AST form (ignore non-computation nodes) Define how each HIR node is translated Recursivel translate HIR (HIR tree traversal) TR[e] = LIR translation of HIR construct e A sequence of LIR instructions Temporar variables = new locations Use temporar variables (LIR registers) to store intermediate values during translation 9 3

4 Translating epressions Fresh virtual (LIR) register generated b translation Binar operations (arithmetic and comparisons) TR[e OP e2] Unar operations TR[OP e] R := TR[e] R2 := TR[e2] R3 := R OP R2 Shortcut notation to indicate target register NOT LIR instruction R := TR[e] R2 := OP R Translating (short-circuit) OR TR[e OR e2] R := T[e] Compare,R JumpTrue _end_label R2 := T[e2] Or R2,R (OR can be replaced b Move operation since R is ) Translating (short-circuit) AND TR[e AND e2] R := T[e] Compare,R JumpTrue _end_label R2 := T[e2] And R2,R (AND can be replaced b Move operation since R is ) 2 4

5 Translating arra and field access TR[e[e2]] Give class tpe of e need to compute offset of field f R := TR[e] R2 := TR[e2] MoveArra R[R2], R3 TR[e.f] Need to identif class tpe of e from semantic analsis phase R := TR[e] MoveField R.c f,r3 Constant representing offset of field f in objects of class tpe of e (we shall discuss object representation soon) 3 Translating statement block TR[s; s2; ; sn] TR[s] TR[s2] TR[s3] TR[sN] 4 Translating if-then-else TR[if (e) then s else s2] Fresh labels generated during translation R := TR[e] Compare,R JumpTrue _false_label T[s] Jump _end_label _false_label: T[s2] 5 5

6 Translating if-then TR[if (e) then s] Can avoid generating labels unnecessaril R := TR[e] Compare,R JumpTrue _end_label TR[s] 6 Translating while TR[while (e) s] _test_label: R := TR[e] Compare,R JumpTrue _end_label TR[s] Jump _test_label _end_label 7 Translating call/return TR[C.foo(e,,en)] R := TR[e] formal parameter name Rn := TR[en] StaticCall C_foo(=R,,n=Rn),R TR[e.foo(e2)] actual argument register R := TR[e] R2 := TR[e2] VirtualCall R.c foo (=R2),R TR[return e] R := TR[e] Return R Constant representing offset of method f in dispatch table of class tpe of e 8 6

7 Translation implementation Define classes for LIR instructions Define LoweringVisitor Appl visitor to translate each method Mechanism to generate new LIR registers (keep track of registers for net phase) Mechanism to generate new labels For each node tpe translation returns List of LIR instructions TR[e] Target register Splice lists: instructions.addall(tr[e]) (input is a tree, output is a flat list) 9 Eample revisited TR[ = 42; while ( > ) { =-; ] Move 42,R Move R, _test_label: Move,R Compare,R JumpLE _end_label TR[=-] Jump _test_label TR[ = 42] TR[ while ( > ) { =-; ] Move 42,R Move R, _test_label: Move,R Compare,R JumpLE _end_label Move,R Move,R2 Sub R2,R Move R, Jump _test_label Move 42,R Move R, TR[ while ( > ) { =-; ] spliced list for TR[=-] (actuall a DFS walk) 2 Naïve translation Pretend all LIR registers are local variables Increases memor needed for each procedure during runtime Epensive access vs. accessing real registers (spilling) Generate fresh LIR register per HIR node Lifetime of registers ver limited Allow consecutive labels Code bloat 2 7

8 Better translation Pretend all LIR registers are local variables Ideall: leave it to register allocation phase to store LIR registers in machine registers In this project we ignore this inefficienc Limit register allocation to single LIR instructions Generate fresh LIR register per HIR node Reuse registers Avoid generating registers for HIR leaves Allow consecutive labels Avoid generating consecutive labels Optimizations techniques discussed net time 22 Runtime organization Representation of basic tpes Representation of allocated objects Class instances Dispatch vectors Strings Arras Procedures Activation records (frames) Discussed net time (relevant mostl for PA5) 23 Representing data at runtime Source language tpes int, boolean, string, object tpes, arras etc. Target language tpes Single btes, integers, address representation Compiler maps source tpes to some combination of target tpes Implement source tpes using target tpes Compiler maps basic operations on source tpes to combinations of operations on target tpes We will limit our discussion to IC 24 8

9 Representing basic tpes in IC int, boolean, string Simplified representation: 32 bit for all tpes boolean tpe could be more efficientl implemented with single bte Arithmetic operations Addition, subtraction, multiplication, division, remainder Could be mapped directl to target language tpes and operations Eception: string concatenation implemented using librar function stringcat 25 Pointer tpes Represent addresses of source language data structures Usuall implemented as an unsigned integer (4 btes) Pointer dereferencing retrieves pointed value Ma produce an error Null pointer dereference Insert code to check fragile operations (in PA5) Onl implicit in our case 26 Object tpes Basic operations Field selection computing address of field, dereferencing address Method invocation Identifing method to be called, calling it How does it look at runtime? 27 9

10 Object tpes class Foo { int ; int ; void rise() { void shine() { 2 DispacthVectorPtr Runtime memor laout for object of class Foo Field offsets DispacthVectorPtr Method offsets rise shine Compile time information for Foo class tpe 28 Field selection Foo f; int q; q = f.; Move f,r MoveField R.,R2 Move R2,q 2 DispacthVectorPtr Runtime memor laout for object of class Foo Field offsets DispacthVectorPtr Method offsets rise shine Compile time information for Foo class tpe generated during LIR translation 29 Implementation Store map for each ClassTpe From field to offset (starting from, since reserved for DispatchVectorPtr) From method to offset 3

11 Object tpes and inheritance class Foo { int ; int ; void rise() { void shine() { class Bar etends Foo { int z; void twinkle() { void rise() { 2 3 DispacthVectorPtr z Runtime memor laout for object of class Bar Field offsets DispacthVectorPtr z rise shine twinkle Compile time information for Bar class tpe prefi from Foo prefi from Foo 3 Object tpes and polmorphism class Foo { Pointer to Bar void rise() { void shine() { f DVPtr class Bar etends Foo { void rise() { Initializes value of DVPtr for Bar class Main { void main() { Foo f = new Bar(); f.rise(); z Runtime memor laout for object of class Bar Foo dispatch vector Bar dispatch vector _Foo_rise _Bar_rise _Foo_shine _Foo_shine _Bar_twinkle Runtime static information 32 Dnamic binding class Foo { void rise() { void shine() { class Bar etends Foo { void rise() { class Main { void main() { Foo f = new Bar(); f.rise(); Foo dispatch vector Bar dispatch vector _Foo_rise _Foo_shine _Bar_rise _Foo_shine _Bar_twinkle Finding the right method implementation Done at runtime according to object tpe Using the Dispatch Vector (a.k.a. Dispatch Table) 33

12 Dispatch vectors in depth class Foo { void rise() { void shine() { class Bar etends Foo { void rise() { class Main { void main() { Foo f = new Bar(); f.rise(); Pointer to Bar f Pointer to Foo inside Bar DVPtr z Object laout rise _Bar_rise shine _Bar_shine Bar Dispatch Method vector code Vector contains addresses of methods Indeed b method-id number A method signature has the same id number for all subclasses 34 Dispatch vectors in depth class Foo { void rise() { void shine() { class Bar etends Foo { void rise() { class Main { void main() { Foo f = new Foo(); f.rise(); Pointer to Foo f DVPtr Object laout rise shine Foo Dispatch vector _Foo_rise _Foo_shine 35 Object creation Foo f = new Bar(); LIR translation computes object for each class tpe size of object Foo = + + z + DVPtr = ++ += 4 (6 btes) LIR translation computes object for each class tpe field offsets and method offsets for DispatchVector Librar allocateobject(6),r MoveField R.,_Bar_DV Move R,f 2 DispacthVectorPtr Runtime memor laout for object of class Foo Field offsets DispacthVectorPtr Method offsets rise shine Label generated for class tpe Bar during LIR translation Compile time information for Foo class tpe generated during LIR translation 36 2

13 See ou net week 37 3