Working with the Compute Block
|
|
- Debra Benson
- 6 years ago
- Views:
Transcription
1 Tackled today Working with the Compute Block M. R. Smith, ECE University of Calgary Canada Problems with using I-ALU as an integer processor TigerSHARC processor architecture What features are available for DSP optimization, and what do we have to worry about when using these features? Moving the DCremoval( ) over to the X Compute block Using test macros useful to know, real time waster for the labs in this class. Canada DCRemoval( ) Memory intensive Set up time In principle 1 cycle / instruction Addition intensive Loops for main code FIFO implemented as circular buffer ot as complex as FIR, but many of the same requirements Easier to handle You use same ideas in optimizing FIR over Labs and 3 Two issues speed and accuracy. Develop suitable tests for CPP code and check that various assembly language versions satisfy the same tests + 4 instructions Canada 3 Canada 4
2 First key element Sum Loop -- Order () Second key element Shift Loop Order (log ) 4 instructions Third key element FIFO circular buffer -- Order () * 5 instructions 3 * 1 + * log Canada 5 Canada Time in theory Set up pointers to buffers Insert values into buffers SUM LOOP SHIFT LOOP Update outgoing parameters Update FIFO Function return * * log 3 + * log = 18 instructions = cycles delay cycles C++ debug mode 9500 cycles??????? Is the code too slow? Code is slow IFF (if and only if) you don t have,500 cycles available to perform this part of the software defined radio algorithm. Other components of SDR + other components of complete system must complete within the time between samples at 48 khz 48,000 interrupts per second 500,000,000 cycles available every second 10,500 cycles available per interrupt My ball-park ever design code that at the design stage takes more than 50% of available cycles. From take-home quiz 1 DCremoval( ) 17% of code time eed *,500 cycles = 15,000 for SDR component alone Canada 7 Canada 8
3 The code is too slow because we are not taking advantage of the available resources Bring in up to 18 bits (4 instructions) per cycle Ability to bring in 4 3-bit values along J data bus (data1) and 4 along K bus (data) Perform address calculations in J and K ALU single cycle hardware circular buffers Perform math operations on both X and Y compute blocks Background DMA activity Off-load some of the processing to the second processor Version Move the algorithm component from I-ALU over to Compute Block Canada 9 Canada 10 Steps for faster code development Cut and paste old code Change name only Change Add timing and execution tests _DCremovalASM_JALU FPiT1 Becomes _DCremovalASM_Compute FPiT1 Run test to confirm Canada 11 Canada 1
4 Element we want to change Perform sum using I-ALU void DCremovalASM(int *, int *) Setting up the static arrays Defining and then setting pointers Moving incoming parameters in FIFO Summing the FIFO values Performing (FAST) division Returning the correct values Updating the FIFO in preparation for next time this function is called discarding oldest value, and rippling the FIFO to make the newest FIFO slot empty Canada 13 Canada 14 Perform sum using Compute Block Final sum code #define left_sum_xr XR left_sum_xr = 0;; #define left_xr XR Don t use XR = J31 J31 is OT A ZERO if used with COMPUTE block condition code reg. left_xr = [left_buffpt_j0 + i_j8];; left_sum_xr = R + R;; OTE SYTAX left_sum_xr = ASHIFT R BY -7;; Canada 15 Canada 1
5 Other necessary changes Time in theory Set up pointers to buffers Insert values into buffers SUM LOOP SHIFT LOOP Update outgoing parameters Update FIFO Function return * 5 1 Was 1 + * log 3 + * Was log = 18 instructions = 1430 Was 500 cycles 1444 cycles delay cycles Canada 17 Canada 18 Time in Practice Set up pointers to buffers Insert values into buffers SUM LOOP SHIFT LOOP Update outgoing parameters Update FIFO Function return * 5 1 Was 1 + * log 3 + * Was log = 18 instructions = 1430 Possible explanation of speed improvement Must wait for value to arrive from memory Must wait for I-ALU to become available so can calculate address or do add Remember working in a loop delay cycles = 1730 cycles Was,500 cycles 1444 cycles delay cycles Improved more than expected as accidentally making better use of available resources Canada 19 Must wait for value to arrive from memory Wait for I-ALU Savings * = 5 Actual 700 = * Canada 0
6 ext stage in improving code speed Software and hardware circular buffers Making the tests quicker to develop Set up pointers to buffers Insert values into buffers SUM LOOP SHIFT LOOP Update outgoing parameters Update FIFO Function return * 5 1 Was 1 + * log 3 + * Was log = 18 instructions = 1430 Is there an alternative to cut-and-paste? Do you want to bother to learn and then use it? delay cycles = 1730 cycles Canada 1 Canada Develop Call-RETUR test macro Develop Validate operation test macro In practice: ot as trivial an exercise as it looks Acts as 1 long C++ line. Any error message unspecific My favourite error Tabs and / or spaces after final \ on each line Solution use Home / End keys to check that \ is at the end of the line Canada 3 Canada 4
7 Timing test macro not trivial eed a new special loop control function generated for each test Some standard C++ macro issues A #define must be one line by definition So cheat use final \ -- says newline that follows the \ is not a new-line character ame must change Print statement contents must change #define FOO_MACRO(FEE, FUM) \ /* Must have C like comments */ \ /* # character means turn parameter to string array */ \ puts(#fee); \ /* ## character means concatenate parameter \ DoLoop##FUM( ); \ /* Watch out for trailing ; and } may be required / definitely not wanted */ \ THIS BREAK OVER LIES -- ILLEGAL ; Canada 5 Canada Using macros Learning how to do the concatenation and print formatting macros took me about 10 times as long as just cut-and-pasting In the labs you use test macros at your own risk the T.A.s and myself will not help you debug them In the exams you can t use macros Please note, I have defined macros and am now using them Exam macro -- PLEASE_ASWER_EXAMQUESTIO_FOR_ME( ) causes the marker macro ZERO_OUT_OF_100( ) to be activated Personal opinion learn the concept for use at a later time don t worry about them in the labs Canada 7 Canada 8
8 Tackled today Problems with using I-ALU as an integer processor TigerSHARC processor architecture What features are available for DSP optimization, and what do we have to worry about when using these features? Moving the DCremoval( ) over to the X Compute block Using test macros useful to know, real time waster for the labs in this class. Canada 9
Introduction to Test Driven Development (To be used throughout the course)
Introduction to Test Driven Development (To be used throughout the course) Building tests and code for a software radio Concepts Stages in a conventional radio Stages in a software radio Goals for the
More informationMicroprocessor or Microcontroller Not just a case of you say tomarto and I say tomayto
Microprocessor or Microcontroller Not just a case of you say tomarto and I say tomayto Discussion of the capabilities of the Analog Devices ADSP-5333 Evaluation Board used in this course M. Smith, ECE
More informationTigerSHARC processor and evaluation board
Concepts tackled TigerSHARC processor and evaluation board Different capabilities Different functionality Differences between processor and evaluation board Functionality present on TigerSHARC evaluation
More informationMicrocontroller Not just a case of you say tomarto and I say tomayto
Microprocessor or Microcontroller Not just a case of you say tomarto and I say tomayto M. Smith, ECE University of Calgary, Canada Information taken from Analog Devices On-line Manuals with permission
More informationMicroprocessor or Microcontroller Not just a case of you say tomarto and I say tomayto
Microprocessor or Microcontroller Not just a case of you say tomarto and I say tomayto Discussion of the capabilities of the Analog Devices ADSP-5333 Evaluation Board used in this course M. Smith, ECE
More informationGetting the O in I/O to work on a typical microcontroller
Getting the O in I/O to work on a typical microcontroller Ideas of how to send output signals to the radio controlled car. The theory behind the LED controller used in the Familiarization Lab Agenda Processors
More informationGetting the O in I/O to work on a typical microcontroller
Getting the O in I/O to work on a typical microcontroller Ideas of how to send output signals to the radio controlled car. The theory behind the LED controller used in the Familiarization Lab Agenda Processors
More informationEECS 452 Lab 2 Basic DSP Using the C5515 ezdsp Stick
EECS 452 Lab 2 Basic DSP Using the C5515 ezdsp Stick 1. Pre-lab Q1. Print the file you generated (and modified) as described above. Q2. The default structure of the FIR filter is Direct-Form FIR a. How
More informationOutline: System Development and Programming with the ADSP-TS101 (TigerSHARC)
Course Name: Course Number: Course Description: Goals/Objectives: Pre-requisites: Target Audience: Target Duration: System Development and Programming with the ADSP-TS101 (TigerSHARC) This is a practical
More informationCircular Buffers D 1 D.1 INTRODUCTION D.2 DECLARING CIRCULAR BUFFERS D.3 ACCESSING CIRCULAR BUFFERS
Circular Buffers D D.1 INTRODUCTION A circular buffer is an array whose pointer wraps around to the first member of the array when the pointer is incremented past the last member. The file macros.h contains
More informationGenerating Rectify( ) Test driven development approach to TigerSHARC
Generating Rectify( ) Test driven development approach to TigerSHARC assembly code production Assembly code examples Part 1 of 3 Concepts Concepts of C++ stubs Forcing the test to fail test of test Generating
More informationCS 112 Introduction to Computing II. Wayne Snyder Computer Science Department Boston University
CS 11 Introduction to Computing II Wayne Snyder Department Boston University Today Object-Oriented Programming Concluded Stacks, Queues, and Priority Queues as Abstract Data Types Reference types: Basic
More informationIP-AD Channel 500 khz Simultaneous IndustryPack Module REFERENCE MANUAL Version 1.4 June 2003
IP-AD4500 4 Channel 500 khz Simultaneous IndustryPack Module REFERENCE MANUAL 799-14-000-4000 Version 1.4 June 2003 ALPHI TECHNOLOGY CORPORATION 6202 S. Maple Avenue #120 Tempe, AZ 85283 USA Tel: (480)
More informationCS 450 Exam 2 Mon. 11/7/2016
CS 450 Exam 2 Mon. 11/7/2016 Name: Rules and Hints You may use one handwritten 8.5 11 cheat sheet (front and back). This is the only additional resource you may consult during this exam. No calculators.
More informationATC-AD8100K. 8 Channel 100 khz Simultaneous Burst A/D in 16 bits IndustryPack Module REFERENCE MANUAL Version 1.
ATC-AD8100K 8 Channel 100 khz Simultaneous Burst A/D in 16 bits IndustryPack Module REFERENCE MANUAL 791-16-000-4000 Version 1.6 May 2003 ALPHI TECHNOLOGY CORPORATION 6202 S. Maple Avenue #120 Tempe, AZ
More informationThe SHARC in the C. Mike Smith
M. Smith -- The SHARC in the C Page 1 of 9 The SHARC in the C Mike Smith Department of Electrical and Computer Engineering, University of Calgary, Alberta, Canada T2N 1N4 Contact Person: M. Smith Phone:
More informationNO CALCULATORS ARE ALLOWED IN THIS EXAM
Department of Electrical and Computer Engineering, University of Calgary ENCM415 DECEMBER 18 th, 2001 3 HOURS NAME:- ID#:- PLEASE WRITE CLEARLY. USE AN HB GRADE OR SOFTER (DARKER) PENCIL! WHAT I CAN=T
More informationTMS320C3X Floating Point DSP
TMS320C3X Floating Point DSP Microcontrollers & Microprocessors Undergraduate Course Isfahan University of Technology Oct 2010 By : Mohammad 1 DSP DSP : Digital Signal Processor Why A DSP? Example Voice
More informationGE420 Laboratory Assignment 3 More SYS/BIOS
GE420 Laboratory Assignment 3 More SYS/BIOS Goals for this Lab Assignment: 1. Introduce Software Interrupt Objects (Swis) 2. Introduce 2 X 20 character LCD functions. 3. Investigate an issue with 32 bit
More informationAn introduction to Digital Signal Processors (DSP) Using the C55xx family
An introduction to Digital Signal Processors (DSP) Using the C55xx family Group status (~2 minutes each) 5 groups stand up What processor(s) you are using Wireless? If so, what technologies/chips are you
More informationKey elements in DSP algorithms. for DSP algorithms on. To be tackled today. Instruction fetches must be efficient.
Efficient Loop Handling for DSP algorithms on CISC, RISC and DSP processors M. Smith, Electrical and Computer Engineering, University of Calgary, Alberta, Canada smithmr @ ucalgary.ca Key elements in DSP
More informationMemory management, part 2: outline
Memory management, part 2: outline Page replacement algorithms Modeling PR algorithms o Working-set model and algorithms Virtual memory implementation issues 1 Page Replacement Algorithms Page fault forces
More informationFEATURE ARTICLE. Michael Smith
In a recent project, Mike set out to develop DSP algorithms suitable for producing an improved sound stage for headphones. Using the Analog Devices 21061 SHARC, he modified the phase and amplitude of the
More informationThis section covers the MIPS instruction set.
This section covers the MIPS instruction set. 1 + I am going to break down the instructions into two types. + a machine instruction which is directly defined in the MIPS architecture and has a one to one
More informationMechatronics Laboratory Assignment 2 Serial Communication DSP Time-Keeping, Visual Basic, LCD Screens, and Wireless Networks
Mechatronics Laboratory Assignment 2 Serial Communication DSP Time-Keeping, Visual Basic, LCD Screens, and Wireless Networks Goals for this Lab Assignment: 1. Introduce the VB environment for PC-based
More informationCS 102 Lab 3 Fall 2012
Name: The symbol marks programming exercises. Upon completion, always capture a screenshot and include it in your lab report. Email lab report to instructor at the end of the lab. Review of built-in functions
More informationHash Tables COS 217 1
Hash Tables COS 217 1 Goals of Today s Lecture Motivation for hash tables o Examples of (key, value) pairs o Limitations of using arrays o Example using a linked list o Inefficiency of using a linked list
More informationENCM 369 Winter 2017 Lab 3 for the Week of January 30
page 1 of 11 ENCM 369 Winter 2017 Lab 3 for the Week of January 30 Steve Norman Department of Electrical & Computer Engineering University of Calgary January 2017 Lab instructions and other documents for
More informationAn Introduction to MATLAB
An Introduction to MATLAB Day 1 Simon Mitchell Simon.Mitchell@ucla.edu High level language Programing language and development environment Built-in development tools Numerical manipulation Plotting of
More informationEat (we provide) link. Eater. Goal: Eater(Self) == Self()
15-251: Great Theoretical Ideas Guru: Yinmeng Zhang Assignment 12 Due: December 6, 2005 1 Reading Comprehension (0 points) Read the accompanying handout containing Ken Thompson s Turing Award Lecture,
More informationComputer Organization and Assembly Language. Lab Session 01
Objective: Lab Session 01 Introduction to Assembly Language Tools and Familiarization with Emu8086 environment To be able to understand Data Representation and perform conversions from one system to another
More informationCISC220 Lab 2: Due Wed, Sep 26 at Midnight (110 pts)
CISC220 Lab 2: Due Wed, Sep 26 at Midnight (110 pts) For this lab you may work with a partner, or you may choose to work alone. If you choose to work with a partner, you are still responsible for the lab
More informationHey there, I m (name) and today I m gonna talk to you about rate of change and slope.
Rate and Change of Slope A1711 Activity Introduction Hey there, I m (name) and today I m gonna talk to you about rate of change and slope. Slope is the steepness of a line and is represented by the letter
More informationEXAM 1 SOLUTIONS. Midterm Exam. ECE 741 Advanced Computer Architecture, Spring Instructor: Onur Mutlu
Midterm Exam ECE 741 Advanced Computer Architecture, Spring 2009 Instructor: Onur Mutlu TAs: Michael Papamichael, Theodoros Strigkos, Evangelos Vlachos February 25, 2009 EXAM 1 SOLUTIONS Problem Points
More informationLab 03 - x86-64: atoi
CSCI0330 Intro Computer Systems Doeppner Lab 03 - x86-64: atoi Due: October 1, 2017 at 4pm 1 Introduction 1 2 Assignment 1 2.1 Algorithm 2 3 Assembling and Testing 3 3.1 A Text Editor, Makefile, and gdb
More informationAssembly Language Programming. CPSC 252 Computer Organization Ellen Walker, Hiram College
Assembly Language Programming CPSC 252 Computer Organization Ellen Walker, Hiram College Instruction Set Design Complex and powerful enough to enable any computation Simplicity of equipment MIPS Microprocessor
More informationQUIZ: What is the output of this MATLAB code? >> A = [2,4,10,13;16,3,7,18; 8,4,9,25;3,12,15,17]; >> length(a) >> size(a) >> B = A(2:3, 1:3) >> B(5)
QUIZ: What is the output of this MATLAB code? >> A = [2,4,10,13;16,3,7,18; 8,4,9,25;3,12,15,17]; >> length(a) >> size(a) >> B = A(2:3, 1:3) >> B(5) QUIZ Ch.3 Introduction to MATLAB programming 3.1 Algorithms
More informationThe simplest form of storage is a register file. All microprocessors have register files, which are known as registers in the architectural context.
1 In this lecture, we will consider the various type of storage (memory) that FPGAs allow us to implement. The major advantage of FPGAs is that it contains lots of small blocks of memory modules, which
More informationCS 6371: Advanced Programming Languages
CS 6371: Advanced Programming Languages Dr. Kevin Hamlen Spring 2017 Fill out, sign, and return prereq forms: Course number: CS 6371 Section: 1 Prerequisites: CS 5343: Algorithm Analysis & Data Structures
More informationGeneral Purpose Signal Processors
General Purpose Signal Processors First announced in 1978 (AMD) for peripheral computation such as in printers, matured in early 80 s (TMS320 series). General purpose vs. dedicated architectures: Pros:
More informationI/O Management and Disk Scheduling. Chapter 11
I/O Management and Disk Scheduling Chapter 11 Categories of I/O Devices Human readable used to communicate with the user video display terminals keyboard mouse printer Categories of I/O Devices Machine
More informationAutomated Testing Environment
Automated Testing Environment Concepts required for testing embedded systems adopted in this course (quizzes, assignments and laboratories) 1 To be tackled today Why test, and what kinds of tests are there?
More informationCSCI 141 Computer Programming I. Filip Jagodzinski
Filip Jagodzinski Announcement Using online resources for help I want you to learn from others I want you to learn how to use (good) online resources Learning on your own is a good thing Announcement Using
More informationPointers, Arrays and Parameters
Pointers, Arrays and Parameters This exercise is different from our usual exercises. You don t have so much a problem to solve by creating a program but rather some things to understand about the programming
More informationCS5460: Operating Systems
CS5460: Operating Systems Lecture 2: OS Hardware Interface (Chapter 2) Course web page: http://www.eng.utah.edu/~cs5460/ CADE lab: WEB L224 and L226 http://www.cade.utah.edu/ Projects will be on Linux
More informationMemory management, part 2: outline. Operating Systems, 2017, Danny Hendler and Amnon Meisels
Memory management, part 2: outline 1 Page Replacement Algorithms Page fault forces choice o which page must be removed to make room for incoming page? Modified page must first be saved o unmodified just
More informationAP Computer Science Summer Work Mrs. Kaelin
AP Computer Science Summer Work 2018-2019 Mrs. Kaelin jkaelin@pasco.k12.fl.us Welcome future 2018 2019 AP Computer Science Students! I am so excited that you have decided to embark on this journey with
More informationTopics. Computer Organization CS Exam 2 Review. Infix Notation. Reverse Polish Notation (RPN)
Computer Organization CS 231-01 Exam 2 Review Dr. William H. Robinson October 11, 2004 http://eecs.vanderbilt.edu/courses/cs231/ Topics Education is a progressive discovery of our own ignorance. Will Durant
More informationProject 1. due date Sunday July 8, 2018, 12:00 noon
Queens College, CUNY, Department of Computer Science Object-oriented programming in C++ CSCI 211 / 611 Summer 2018 Instructor: Dr. Sateesh Mane c Sateesh R. Mane 2018 Project 1 due date Sunday July 8,
More informationQUIZ. What is wrong with this code that uses default arguments?
QUIZ What is wrong with this code that uses default arguments? Solution The value of the default argument should be placed in either declaration or definition, not both! QUIZ What is wrong with this code
More informationUniversity of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Science
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Science EECS 150 Fall 2000 Original Lab By: J.Wawrzynek and N. Weaver Edited by B. Choi, R.
More informationIntroduction to: Computers & Programming: Review prior to 1 st Midterm
Introduction to: Computers & Programming: Review prior to 1 st Midterm Adam Meyers New York University Summary Some Procedural Matters Summary of what you need to Know For the Test and To Go Further in
More informationUnit 1 Integers, Fractions & Order of Operations
Unit 1 Integers, Fractions & Order of Operations In this unit I will learn Date: I have finished this work! I can do this on the test! Operations with positive and negative numbers The order of operations
More informationTopic Notes: MIPS Instruction Set Architecture
Computer Science 220 Assembly Language & Comp. Architecture Siena College Fall 2011 Topic Notes: MIPS Instruction Set Architecture vonneumann Architecture Modern computers use the vonneumann architecture.
More informationSwapping. Operating Systems I. Swapping. Motivation. Paging Implementation. Demand Paging. Active processes use more physical memory than system has
Swapping Active processes use more physical memory than system has Operating Systems I Address Binding can be fixed or relocatable at runtime Swap out P P Virtual Memory OS Backing Store (Swap Space) Main
More informationCS21: INTRODUCTION TO COMPUTER SCIENCE. Prof. Mathieson Fall 2018 Swarthmore College
CS21: INTRODUCTION TO COMPUTER SCIENCE Prof. Mathieson Fall 2018 Swarthmore College Outline Oct 24: Sit somewhere new! Recap reading files String and List methods TDD: Top Down Design word_guesser.py Notes
More information20-EECE-4029 Operating Systems Fall, 2015 John Franco
20-EECE-4029 Operating Systems Fall, 2015 John Franco Final Exam name: Question 1: Processes and Threads (12.5) long count = 0, result = 0; pthread_mutex_t mutex; pthread_cond_t cond; void *P1(void *t)
More informationCS61C : Machine Structures
inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures Lecture 4 C Pointers 2004-09-08 Lecturer PSOE Dan Garcia www.cs.berkeley.edu/~ddgarcia Cal flies over Air Force We re ranked 13 th in the US and
More informationChapter 11 I/O Management and Disk Scheduling
Operating Systems: Internals and Design Principles, 6/E William Stallings Chapter 11 I/O Management and Disk Scheduling Patricia Roy Manatee Community College, Venice, FL 2008, Prentice Hall 1 2 Differences
More informationLecture 8 " INPUT " Instructor: Craig Duckett
Lecture 8 " INPUT " Instructor: Craig Duckett Assignments Assignment 2 Due TONIGHT Lecture 8 Assignment 1 Revision due Lecture 10 Assignment 2 Revision Due Lecture 12 We'll Have a closer look at Assignment
More informationECEN 449: Microprocessor System Design Department of Electrical and Computer Engineering Texas A&M University
ECEN 449: Microprocessor System Design Department of Electrical and Computer Engineering Texas A&M University Prof. Sunil P Khatri (Lab exercise created and tested by Ramu Endluri, He Zhou, Andrew Douglass
More information02 - Numerical Representation and Introduction to Junior
02 - Numerical Representation and Introduction to Junior September 10, 2013 Todays lecture Finite length effects, continued from Lecture 1 How to handle overflow Introduction to the Junior processor Demonstration
More informationEE445L Fall 2014 Final Version A Page 1 of 7
EE445L Fall 2014 Final Version A Page 1 of 7 Jonathan W. Valvano First: Last: This is the closed book section. You must put your answers in the boxes. When you are done, you turn in the closed-book part
More informationLAB 7 Writing Assembly Code
Goals To Do LAB 7 Writing Assembly Code Learn to program a processor at the lowest level. Implement a program that will be used to test your own MIPS processor. Understand different addressing modes of
More informationCompilers CS S-01 Compiler Basics & Lexical Analysis
Compilers CS414-2017S-01 Compiler Basics & Lexical Analysis David Galles Department of Computer Science University of San Francisco 01-0: Syllabus Office Hours Course Text Prerequisites Test Dates & Testing
More informationContents. Slide Set 2. Outline of Slide Set 2. More about Pseudoinstructions. Avoid using pseudoinstructions in ENCM 369 labs
Slide Set 2 for ENCM 369 Winter 2014 Lecture Section 01 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Winter Term, 2014 ENCM 369 W14 Section
More informationDiscussion 2C Notes (Week 3, January 21) TA: Brian Choi Section Webpage:
Discussion 2C Notes (Week 3, January 21) TA: Brian Choi (schoi@cs.ucla.edu) Section Webpage: http://www.cs.ucla.edu/~schoi/cs32 Abstraction In Homework 1, you were asked to build a class called Bag. Let
More informationECE4703 Laboratory Assignment 5
ECE4703 Laboratory Assignment 5 The goals of this laboratory assignment are: to develop an understanding of frame-based digital signal processing, to familiarize you with computationally efficient techniques
More informationA framework for verification of Program Control Unit of VLIW processors
A framework for verification of Program Control Unit of VLIW processors Santhosh Billava, Saankhya Labs, Bangalore, India (santoshb@saankhyalabs.com) Sharangdhar M Honwadkar, Saankhya Labs, Bangalore,
More informationIn either case, remember to delete each array that you allocate.
CS 103 Path-so-logical 1 Introduction In this programming assignment you will write a program to read a given maze (provided as an ASCII text file) and find the shortest path from start to finish. 2 Techniques
More informationIntroduction to Computer Systems
Introduction to Computer Systems Today: Welcome to EECS 213 Lecture topics and assignments Next time: Bits & bytes and some Boolean algebra Fabián E. Bustamante, Spring 2010 Welcome to Intro. to Computer
More informationFunction Calling Conventions 1 CS 64: Computer Organization and Design Logic Lecture #9
Function Calling Conventions 1 CS 64: Computer Organization and Design Logic Lecture #9 Ziad Matni Dept. of Computer Science, UCSB Lecture Outline More on MIPS Calling Convention Functions calling functions
More informationCS 3516: Advanced Computer Networks
Welcome to CS 3516: Advanced Computer Networks Prof. Yanhua Li Time: 9:00am 9:50am M, T, R, and F Location: Fuller 320 Fall 2017 A-term 1 Some slides are originally from the course materials of the textbook
More informationOutline. Writing Functions and Subs. Review Immediate (1-line) Errors. Quiz Two on Thursday (2/23) Same Code Without Option Explicit
Writing Functions and Subs Larry Caretto Mechanical Engineering 209 Computer Programming for Mechanical Engineers February 21, 2017 Outline Review Debugging and Option Explicit What are functions and subs?
More informationCS252 Graduate Computer Architecture Lecture 8. Review: Scoreboard (CDC 6600) Explicit Renaming Precise Interrupts February 13 th, 2010
CS252 Graduate Computer Architecture Lecture 8 Explicit Renaming Precise Interrupts February 13 th, 2010 John Kubiatowicz Electrical Engineering and Computer Sciences University of California, Berkeley
More informationDSP Platforms Lab (AD-SHARC) Session 05
University of Miami - Frost School of Music DSP Platforms Lab (AD-SHARC) Session 05 Description This session will be dedicated to give an introduction to the hardware architecture and assembly programming
More informationMemory Management Outline. Operating Systems. Motivation. Paging Implementation. Accessing Invalid Pages. Performance of Demand Paging
Memory Management Outline Operating Systems Processes (done) Memory Management Basic (done) Paging (done) Virtual memory Virtual Memory (Chapter.) Motivation Logical address space larger than physical
More informationCMSC 201 Fall 2017 Lab 12 File I/O
CMSC 201 Fall 2017 Lab 12 File I/O Assignment: Lab 12 File I/O Due Date: During discussion, November 27th through November 30th Value: 10 points (8 points during lab, 2 points for Pre Lab quiz) This week
More informationLaboratory Exercise 3 Comparative Analysis of Hardware and Emulation Forms of Signed 32-Bit Multiplication
Laboratory Exercise 3 Comparative Analysis of Hardware and Emulation Forms of Signed 32-Bit Multiplication Introduction All processors offer some form of instructions to add, subtract, and manipulate data.
More informationCS 104 Computer Organization and Design
CS 104 Computer Organization and Design Exceptions and Interrupts CS104: Exceptions and Interrupts 1 Exceptions and Interrupts App App App System software Mem CPU I/O Interrupts: Notification of external
More informationFloating Point Arithmetic
Floating Point Arithmetic Clark N. Taylor Department of Electrical and Computer Engineering Brigham Young University clark.taylor@byu.edu 1 Introduction Numerical operations are something at which digital
More informationComputer Science II Lab 3 Testing and Debugging
Computer Science II Lab 3 Testing and Debugging Introduction Testing and debugging are important steps in programming. Loosely, you can think of testing as verifying that your program works and debugging
More informationT02 Tutorial Slides for Week 2
T02 Tutorial Slides for Week 2 ENEL 353: Digital Circuits Fall 2017 Term Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary 19 September, 2017
More informationComputer Architecture. Lecture 8: Virtual Memory
Computer Architecture Lecture 8: Virtual Memory Dr. Ahmed Sallam Suez Canal University Spring 2015 Based on original slides by Prof. Onur Mutlu Memory (Programmer s View) 2 Ideal Memory Zero access time
More informationCS S-01 Compiler Basics & Lexical Analysis 1
CS414-2017S-01 Compiler Basics & Lexical Analysis 1 01-0: Syllabus Office Hours Course Text Prerequisites Test Dates & Testing Policies Projects Teams of up to 2 Grading Policies Questions? 01-1: Notes
More informationUniversity of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Science. EECS 150 Spring 2000
University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Science EECS 150 Spring 2000 Lab 1 Introduction to Xilinx Design Software 1 Objectives In this
More informationCSE 504: Compiler Design
http://xkcd.com/303/ Compiler Design Course Organization CSE 504 1 / 20 CSE 504: Compiler Design http://www.cs.stonybrook.edu/~cse504/ Mon., Wed. 2:30pm 3:50pm Harriman Hall 116 C. R. Ramakrishnan e-mail:
More informationComputer Arithmetic Multiplication & Shift Chapter 3.4 EEC170 FQ 2005
Computer Arithmetic Multiplication & Shift Chapter 3.4 EEC170 FQ 200 Multiply We will start with unsigned multiply and contrast how humans and computers multiply Layout 8-bit 8 Pipelined Multiplier 1 2
More informationVIII. DSP Processors. Digital Signal Processing 8 December 24, 2009
Digital Signal Processing 8 December 24, 2009 VIII. DSP Processors 2007 Syllabus: Introduction to programmable DSPs: Multiplier and Multiplier-Accumulator (MAC), Modified bus structures and memory access
More informationCompsFromSpreadsheet Version 5.1 user guide
CompsFromSpreadsheet Version 5.1 user guide CompsFromSpreadsheet is an After Effects script that will allow you to create limitless copies of your original comp, filling in text and replacing layers based
More informationCS61C Machine Structures. Lecture 4 C Pointers and Arrays. 1/25/2006 John Wawrzynek. www-inst.eecs.berkeley.edu/~cs61c/
CS61C Machine Structures Lecture 4 C Pointers and Arrays 1/25/2006 John Wawrzynek (www.cs.berkeley.edu/~johnw) www-inst.eecs.berkeley.edu/~cs61c/ CS 61C L04 C Pointers (1) Common C Error There is a difference
More informationAdministrivia. ECE/CS 5780/6780: Embedded System Design. FIFO with Infinite Memory. Introduction to FIFOs
Administrivia ECE/CS 5780/6780: Embedded System Design Scott R. Little Lecture 9: FIFOs CodeWarrior IDE compiler optimization configuration. No labs are scheduled next week. Please contact your TA if you
More informationIntroduction to MiniSim A Simple von Neumann Machine
Math 121: Introduction to Computing Handout #19 Introduction to MiniSim A Simple von Neumann Machine Programming languages like C, C++, Java, or even Karel are called high-level languages because they
More informationCS370 Operating Systems
CS370 Operating Systems Colorado State University Yashwant K Malaiya Spring 2018 L20 Virtual Memory Slides based on Text by Silberschatz, Galvin, Gagne Various sources 1 1 Questions from last time Page
More informationPIETRO, GIORGIO & MAX ROUNDING ESTIMATING, FACTOR TREES & STANDARD FORM
PIETRO, GIORGIO & MAX ROUNDING ESTIMATING, FACTOR TREES & STANDARD FORM ROUNDING WHY DO WE ROUND? We round numbers so that it is easier for us to work with. We also round so that we don t have to write
More informationCISC 7310X. C08: Virtual Memory. Hui Chen Department of Computer & Information Science CUNY Brooklyn College. 3/22/2018 CUNY Brooklyn College
CISC 7310X C08: Virtual Memory Hui Chen Department of Computer & Information Science CUNY Brooklyn College 3/22/2018 CUNY Brooklyn College 1 Outline Concepts of virtual address space, paging, virtual page,
More informationCOMP 250. Lecture 7. Sorting a List: bubble sort selection sort insertion sort. Sept. 22, 2017
COMP 250 Lecture 7 Sorting a List: bubble sort selection sort insertion sort Sept. 22, 20 1 Sorting BEFORE AFTER 2 2 2 Example: sorting exams by last name Sorting Algorithms Bubble sort Selection sort
More informationCS 150 Introduction to Computer Science 1
CS 150 Introduction to Computer Science 1 Professor: Chadd Williams CS150 Introduction to Computer Science 1 Chadd Williams http://zeus.cs.pacificu.edu/chadd chadd@pacificu.edu Office 202 Strain Office
More informationINSTALLING AN SSH / X-WINDOW ENVIRONMENT ON A WINDOWS PC. Nicholas Fitzkee Mississippi State University Updated May 19, 2017
INSTALLING AN SSH / X-WINDOW ENVIRONMENT ON A WINDOWS PC Installing Secure Shell (SSH) Client Nicholas Fitzkee Mississippi State University Updated May 19, 2017 The first thing you will need is SSH. SSH
More informationSCPI measuring device
SCPI measuring device Jernej Dolžan 2, Dušan Agrež 1 1 Faculty of Electrical Engineering, University of Ljubljana, Tržaška 25, 1001 Ljubljana, Slovenia Phone: +386 1 4768 220, Fax: +386 1 4768 426, E-mail:
More information