Working with the Compute Block

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1 Tackled today Working with the Compute Block M. R. Smith, ECE University of Calgary Canada Problems with using I-ALU as an integer processor TigerSHARC processor architecture What features are available for DSP optimization, and what do we have to worry about when using these features? Moving the DCremoval( ) over to the X Compute block Using test macros useful to know, real time waster for the labs in this class. Canada DCRemoval( ) Memory intensive Set up time In principle 1 cycle / instruction Addition intensive Loops for main code FIFO implemented as circular buffer ot as complex as FIR, but many of the same requirements Easier to handle You use same ideas in optimizing FIR over Labs and 3 Two issues speed and accuracy. Develop suitable tests for CPP code and check that various assembly language versions satisfy the same tests + 4 instructions Canada 3 Canada 4

2 First key element Sum Loop -- Order () Second key element Shift Loop Order (log ) 4 instructions Third key element FIFO circular buffer -- Order () * 5 instructions 3 * 1 + * log Canada 5 Canada Time in theory Set up pointers to buffers Insert values into buffers SUM LOOP SHIFT LOOP Update outgoing parameters Update FIFO Function return * * log 3 + * log = 18 instructions = cycles delay cycles C++ debug mode 9500 cycles??????? Is the code too slow? Code is slow IFF (if and only if) you don t have,500 cycles available to perform this part of the software defined radio algorithm. Other components of SDR + other components of complete system must complete within the time between samples at 48 khz 48,000 interrupts per second 500,000,000 cycles available every second 10,500 cycles available per interrupt My ball-park ever design code that at the design stage takes more than 50% of available cycles. From take-home quiz 1 DCremoval( ) 17% of code time eed *,500 cycles = 15,000 for SDR component alone Canada 7 Canada 8

3 The code is too slow because we are not taking advantage of the available resources Bring in up to 18 bits (4 instructions) per cycle Ability to bring in 4 3-bit values along J data bus (data1) and 4 along K bus (data) Perform address calculations in J and K ALU single cycle hardware circular buffers Perform math operations on both X and Y compute blocks Background DMA activity Off-load some of the processing to the second processor Version Move the algorithm component from I-ALU over to Compute Block Canada 9 Canada 10 Steps for faster code development Cut and paste old code Change name only Change Add timing and execution tests _DCremovalASM_JALU FPiT1 Becomes _DCremovalASM_Compute FPiT1 Run test to confirm Canada 11 Canada 1

4 Element we want to change Perform sum using I-ALU void DCremovalASM(int *, int *) Setting up the static arrays Defining and then setting pointers Moving incoming parameters in FIFO Summing the FIFO values Performing (FAST) division Returning the correct values Updating the FIFO in preparation for next time this function is called discarding oldest value, and rippling the FIFO to make the newest FIFO slot empty Canada 13 Canada 14 Perform sum using Compute Block Final sum code #define left_sum_xr XR left_sum_xr = 0;; #define left_xr XR Don t use XR = J31 J31 is OT A ZERO if used with COMPUTE block condition code reg. left_xr = [left_buffpt_j0 + i_j8];; left_sum_xr = R + R;; OTE SYTAX left_sum_xr = ASHIFT R BY -7;; Canada 15 Canada 1

5 Other necessary changes Time in theory Set up pointers to buffers Insert values into buffers SUM LOOP SHIFT LOOP Update outgoing parameters Update FIFO Function return * 5 1 Was 1 + * log 3 + * Was log = 18 instructions = 1430 Was 500 cycles 1444 cycles delay cycles Canada 17 Canada 18 Time in Practice Set up pointers to buffers Insert values into buffers SUM LOOP SHIFT LOOP Update outgoing parameters Update FIFO Function return * 5 1 Was 1 + * log 3 + * Was log = 18 instructions = 1430 Possible explanation of speed improvement Must wait for value to arrive from memory Must wait for I-ALU to become available so can calculate address or do add Remember working in a loop delay cycles = 1730 cycles Was,500 cycles 1444 cycles delay cycles Improved more than expected as accidentally making better use of available resources Canada 19 Must wait for value to arrive from memory Wait for I-ALU Savings * = 5 Actual 700 = * Canada 0

6 ext stage in improving code speed Software and hardware circular buffers Making the tests quicker to develop Set up pointers to buffers Insert values into buffers SUM LOOP SHIFT LOOP Update outgoing parameters Update FIFO Function return * 5 1 Was 1 + * log 3 + * Was log = 18 instructions = 1430 Is there an alternative to cut-and-paste? Do you want to bother to learn and then use it? delay cycles = 1730 cycles Canada 1 Canada Develop Call-RETUR test macro Develop Validate operation test macro In practice: ot as trivial an exercise as it looks Acts as 1 long C++ line. Any error message unspecific My favourite error Tabs and / or spaces after final \ on each line Solution use Home / End keys to check that \ is at the end of the line Canada 3 Canada 4

7 Timing test macro not trivial eed a new special loop control function generated for each test Some standard C++ macro issues A #define must be one line by definition So cheat use final \ -- says newline that follows the \ is not a new-line character ame must change Print statement contents must change #define FOO_MACRO(FEE, FUM) \ /* Must have C like comments */ \ /* # character means turn parameter to string array */ \ puts(#fee); \ /* ## character means concatenate parameter \ DoLoop##FUM( ); \ /* Watch out for trailing ; and } may be required / definitely not wanted */ \ THIS BREAK OVER LIES -- ILLEGAL ; Canada 5 Canada Using macros Learning how to do the concatenation and print formatting macros took me about 10 times as long as just cut-and-pasting In the labs you use test macros at your own risk the T.A.s and myself will not help you debug them In the exams you can t use macros Please note, I have defined macros and am now using them Exam macro -- PLEASE_ASWER_EXAMQUESTIO_FOR_ME( ) causes the marker macro ZERO_OUT_OF_100( ) to be activated Personal opinion learn the concept for use at a later time don t worry about them in the labs Canada 7 Canada 8

8 Tackled today Problems with using I-ALU as an integer processor TigerSHARC processor architecture What features are available for DSP optimization, and what do we have to worry about when using these features? Moving the DCremoval( ) over to the X Compute block Using test macros useful to know, real time waster for the labs in this class. Canada 9

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