02 - Numerical Representation and Introduction to Junior

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1 02 - Numerical Representation and Introduction to Junior September 10, 2013

2 Todays lecture Finite length effects, continued from Lecture 1 How to handle overflow Introduction to the Junior processor

3 Demonstration of rounding effects Most of the time you will gain about half a bit when doing proper rounding However, in some cases you will get significantly better results Example: Iterated vector rotation

4 Demonstration of rounding effects: Iterated vector rotation ( ) 1 X 0 = 0 a = ( cos(a) sin(a) X n+1 = sin(a) cos(a) ) X n If you don t round the rotation matrix and X properly you ll get pretty bad results

5 Demonstration of rounding effects: Iterated vector rotation 1 12 bits, no rounding 12 bits, rounding 16 bits, no rounding Ideally: X follows the unit circle In practice: Rounding effects causes X to deviate as seen in the figure

6 Another cautionary tale Saudi Arabia, february 25th, 1991 An incoming Iraqi Scud missile impacts an army barracks killing 28 soldiers Cause: A software bug in the fixed point math:

7 Patriot missile bug Time is stored as a fixed point value Time is incremented every 100 ms by 1/10 1/10 cannot be represented exactly using a binary fixed point number (nor as a floating point number) After the missile battery had been operational for over 100 hours the time has drifted by approximately 0.34 seconds An incoming Scud travels at 1.7km/s, thus the missile battery s tracking was off by over half a kilometer, causing the range gate of the radar to be missed For more information, see: engineering/it/~alum/patriot_bug.html

8 Overflow, saturation, and guard bits Overflow: if the result of a calculation (X ) is not in the range 1 X < 1 Common reasons for overflow: When the result is too large (or small) Too many accumulations

9 Ways to deal with fixed point overflow Ignore it Use a floating point processor instead Redo calculation with scaled down input data Tricky for realtime systems Exception System restart Great for debugging Not so great for mission critical systems (Ariane 501 launch) Use guard bits and saturation arithmetic

10 Managing overflow: Saturation/guard Most popular way in DSP systems What is guard Add more sign extension bits to operands Increasing the range to: 2 G x < 2 G 1

11 Managing overflow: Saturation/guard if(result > 1.0) { final_result = ; } else if(result <= -1.0) { final_result = -1.0 } else { final_result = result; } Performed after an iterative accumulation Do not do it during a convolution Often better than exception for hard-real time system

calculations DCT (32 point transform) Windowing (16 tap FIR filter)

12 Managing overflow: Saturation/guard Huffman decoder and sample decoding Misc calculations Memory IMDCT (18 point transform) Misc calculations DCT (32 point transform) Windowing (16 tap FIR filter) Example of overflow vs saturation Same DCT example as for block floating point

13 Corner cases When verifying a system it makes sense to concentrate on corner cases that exercises the system in unusual ways Example: Corner cases for a divider may be MAX VAL/MAX VAL, MAX VAL/1, 1/MAX VAL, 0/1, 0/MAX VAL, 1/0, 0/0, MAX VAL/0, and similar cases

14 Corner case, fractional multiplication Remember, a fractional number can be between 1 and 1 2 n 1 (inclusive) Do you see any problems with a fractional multiplier which gives a fractional result? Expression for fractional multiplication: tmp[2*n-1:0] = $signed(a)*$signed(b) result=tmp[2*n-2:n-1]

15 Corner case, fractional multiplication ( 1) ( 1) = 1 (Answer cannot be represented in fractional!) (If not taken into account, the fractional multiplier will produce a 1 in this case.) How to handle? Probably best to saturate the result to (Do you think it is unlikely that you will get a 1? What about a broken sensor?)

16 Corner case, absolute operation Same problem, what about 1? Without guard/saturation: ABS(1000) = INV(1000)+0001 = = 1000 (?!)

17 Corner case, absolute operation With guard bits/saturation: ABS(1000) calculated as TRUNC(SAT(ABS(GUARD(1000) = TRUNC(SAT(ABS(11000))) TRUNC(SAT(ABS(11000))) = TRUNC(SAT(01000)) = TRUNC(00111) = 0111

18 Correct execution order Add guard bits Kernel iteration and scaling Round Truncate and saturate Remove guard bits

19 Designing an instruction set First try: Start with the operations available in C Goal: ASIP DSP for real-time iterative computing Assumption: RISC-like instructions move-load-store, ALU/MAC, and program flow control

20 Instruction classification Instruction Operands Operations Mathematical Flags Clock group/type description cycles Load, store, Register name Data transfer DST(ADR)<=SRC(ADR) No flag 1 and move ALU Register names, Arithmetic and OpW <= OpA op OpB ALU Flags 1 instructions or immediate data Flow control Way to get the Jump taken if(condition) No flags 1 or 3 target address decision PC <= target

21 Move-load-store instructions RISC processor: Simple architecture Data and parameters of a subroutine are loaded to the register file first Operands come either from register file or from immediate data (carried by an instruction) Results in the register file need to be written back to the data memory

22 Move-load-store instructions Mnemonic Operands Description Operation Cycles load OpW, DA Load data OpW<= DM(DA) 1 from mem 0/1 store DA,OpA Store data DM(DA) <= OpA 1 to mem 0/1 move OpW,OpA Copy between OpW <= OpA 1 two registers move OpW,imm Copy immediate OpW <= imm 1 to registers

23 Addressing modes Name DA Algorithm Direct D 16-bit constant as the direct memory address Register indirect R A register containing the memory address Post increment R++ R gives the address, R=R+1 after addressing Pre decrement R R=R-1 before addressing, R gives address

24 Arithmetic instructions Basic arithmetic operations in C: add, subtract, multiply, division, and modulo Division operation can usually be avoided by for example multiplying with the reciprocal. We can implement it using a subroutine. Modulo operation is not used very often for DSP arithmetic computing, we can implement it using a subroutine

25 Arithmetic instructions Mnemonic Operands Operation Flags ADD OpA, OpB OpW <= OpA + OpB C,Z,N,V SUB OpA, OpB OpW <= OpA - OpB C,Z,N,V ABS OpA, OpB OpW <= ABS(OpA) Z,N,V INC OpA, OpB OpW <= OpA + 1 C,Z,N,V DEC OpA, OpB OpW <= OpA - 1 C,Z,N,V MPL OpA, OpB A <= OpA * OpB Z,N,V MAC A,OpA, OpB A <= A + OpA * OpB Z,N,V RND A OpW <= SAT(ROUND(A)) Z,N,V CAC A A <= 0 Z,N,V Note: MAC, RND, and CAC or operating on the wide accumulator register. (Not a typical RISC instruction)

26 Logic and shift operations Mnemonic Operands Operation Flags AND OpA, OpB OpW <= OpA & OpB N,V,Z OR OpA, OpB OpW <= OpA OpB N,V,Z NOT OpA OpW <= ~OpA N,V,Z XOR OpA, OpB OpW <= OpA ^ OpB N,V,Z LS OpA, OpB OpW <= OpA << OpB[3:0] N,V,Z RS OpA, OpB OpW <= OpA >> OpB[3:0] N,V,Z Note: The C standard allows shifts to be implemented like this. That is: The following program has undefined behavior: uint16_t a,b; a = 12345; b = 19; a = a >> b; // Undefined, shifting more than 16 bits for // on a 16 bit datatype

27 Logic operators in C < Less than <= Less than or equal to == Equal to >= Greater than or equal to > Greater than!= Not equal to && Boolean AND Boolean OR! Boolean NOT Do we need special ALU instructions for these? Probably not, we can handle these by conditional branch instruction

28 Program flow control in assembler In assembly language Subroutine calls Unconditional jumps Conditional jumps Condition test and conditional jump are (often) separated The first instruction computes the flags The second instruction does a conditional jump

29 Program flow control instructions Description Condition Expression Jump when less than < N=1 Jump when less than or equal to <= N=1 or Z=1 Jump when equal to == Z=1 Jump when greater than or equal to >= N=0 Jump when greater than > N=0 and Z=0 Jump when not equal to!= Z=0 Unconditional jump - - Jump, push return address - - Set PC from popped return address - - Note: &&,, and! are handled by multiple conditional branches

30 Target addressing for jumping Absolute: 16 bits constant Indirect: In a general register Note: Required for C programs (function pointers)

31 Ok, now what? We have now specified an instruction set based on C (although some details are missing, see Chapter 5 in the textbook for more information) Now we need to check the quality of this instruction set through benchmarking

32 BDTI Benchmarks An example of a widely used benchmark for DSP processors Block transfer: Transfer a data block from one memory to another memory Single FIR: N-tap FIR filter running one data sample Frame FIR: N-tap FIR filter running K data samples IIR: Biquad IIR (2nd order IIR) running one data sample 16-bit division: A positive 16 bit value divided by another positive 16 bit value DCT: 8x8 2D DCT 256-FFT: 256 point FFT Vector add Windowing Vector Max

33 Benchmark results Benchmark Junior TSMD Block transfer of 40 samples: Single sample 16-tap FIR sample Frame 16-tap FIR etc Bad Good

34 Study of single sample 16-tap FIR assembler code Convolution: y[n] = N 1 k=0 h[k]x[n k] Samples stored in a circular buffer // C code for 16 tap FIR filter (single sample) result = 0 for (i=0; i < 16; i++) { if(ptr1 == TOP){ ptr1 = BOTTOM; } result = result + mem[ptr1++]*mem[ptr2++]; }

35 Study of single sample 16-tap FIR assembler code Convolution: y[n] = N 1 k=0 h[k]x[n k] Samples stored in a circular buffer // R0: Pointer into x, R2: Pointer into h // R4: Iteration count // R5: TOP of circular buffer, R7: Bottom of circular buffe Loop SUB R6,R0,R5 // R6 = R0-R5 JNE FIFO FIFO MOVE R0, R7 Load R1, DM0(R0++) Load R3, DM0(R2++) MAC A,R1,R3 DEC R4 JGT LOOP

36 Improved Instruction Set Add a loop instruction, shave off 2 cycles per iteration Alternative: Loop unrolling (although inefficient if unrolled too many times) REPEAT 16, ENDLOOP SUB R6,R0,R5 JNE FIFO // R6 = R0-R5 MOVE R0, R7 FIFO Load R1, DM0(R0++) Load R3, DM0(R2++) MAC A,R1,R3 ENDLOOP

03 - The Junior Processor

03 - The Junior Processor September 8, 2015 Designing a minimal instruction set What is the smallest instruction set you can get away with while retaining the capability to execute all possible programs you can encounter? Designing