Distributed Real-Time Control Systems. Chapter 10 Real-Time Digital Control

Transcription

1 Distributed Real-Time Control Systems Chapter 10 Real-Time Digital Control 1

2 Real-Time Digital Control Hardware Digital Controllers are usually designed as periodic tasks with fixed period and synchronized A/D-D/A operations. Depending on the computational (hardware/software architectures), there maybe: Latencies (delays) that degrade the performance Variations in the sampling period, also called Jitter Clock A/D Control Algorithm D/A Process 2

3 Computational Delay Loop wait for next sampling time y = read A/D e = ref y p = K1*ref Kp*y i = i_ant + K2*(e + e_ant) d = K3*d_ant K4*(y - y_ant) u = p+i+d y_ant = y i_ant = i d_ant = d e_ant = e write u to D/A u y time 3

4 Minimize Computational delays Arrange code so that delay in feedback is minimized Loop wait for next sampling time y = read A/D e = ref y p = K1*ref Kp*y i = i_ant + K2*(e + e_ant) d = K3*d_ant K4*(y - y_ant) u = p+i+d y_ant = y i_ant = i d_ant = d e_ant = e write u to D/A Loop wait for next sampling time y = read A/D e = ref y p = K1*ref Kp*y i = i_ant + K2*(e + e_ant) d = K3*d_ant K4*(y - y_ant) u = p+i+d write u to D/A y_ant = y i_ant = i d_ant = d e_ant = e 4

5 Approximate Analysis of Delays A delay DT can be interpreted as an additional phase Df(w) = w*dt. Controller Delay System C(s) e -st G(s) This reduces the controller phase margin PM by Df(w c ), where w c is the crossover frequency. Since the damping factor x is approximately given by x = PM/100, a delay reduces damping and increases overshoot in the step response. 5

6 Step Example : No Delay PID Zero-Order Zero-Order Hold1 Discrete Hold PID Controller Scope4 Transport Delay1 1 s 2+s Transfer Fcn Scope Kp = 3 Kd = 3 Td = 0.05 Ts = 0.2 output control 6

7 Step Example : Delay ½ T PID Zero-Order Zero-Order Hold1 Discrete Hold PID Controller Scope4 Transport Delay1 1 s 2+s Transfer Fcn Scope Kp = 3 Kd = 3 Td = 0.05 Ts = 0.2 output control 7

8 Influence of Delay: Output Increasing Delay Time [sec] Step response. 8

9 Step Example : Delay ½ T + PID Retune PID Zero-Order Zero-Order Hold1 Discrete Hold PID Controller Scope4 Transport Delay1 1 s 2+s Transfer Fcn Scope Kp = 2 Kd = 2 Td = 0.05 Ts = output control 9

10 Jitter Jitter = spurious variations of the pre-defined sampling time. 10

11 Causes of Jitter Non adequate use of temporal primitives. Variation in the length of the running code due to different branching The control algorithm may change as a function of its state and external events. Preemption of the controller by higher priority processes or threads. In multi-threaded applications, the scheduler may delay the control thread due to higher priority tasks. Preemption of the real-time clock (tick) due to higher priority interrupts. Execution of higher priority tasks and/or interrupts. Networking delays: In distributed systems, where the control computation, sensor sampling, and actuator drive are processed in different physical nodes. In this case, implementation delays also include communication delays that may change due to bus traffic or message loss. 11

12 Influence of Jitter 2.5 Effect of Jitter in Trajectory Generation output t 12

13 Minimize Jitter Use real-time clocks. Avoid branching during control computation Minimize pre-emptions by higher priority interrupts (e.g external interrupts) 13

14 Arduino Timing Primitives delay(ms) - Pauses the program for the amount of time (in miliseconds) specified. Uses TIMER 0. unsigned long millis() - Returns the number of milliseconds since the Arduino board began running the current program. This number will overflow (go back to zero), after approximately 50 days. Uses TIMER 0. micros() - Returns the number of microseconds since the Arduino board began running the current program. This number will overflow (go back to zero), after approximately 70 minutes. Has a resolution of about 4 microseconds. Uses TIMER 0. delaymicroseconds(us) - Pauses the program for the amount of time (in microseconds) specified. The largest value that will produce an accurate delay is Performs accurately down to 3 microseconds. Does not use timers. 14

15 Control loop with timer polling unsigned long prevtime = 0; // milliseconds unsigned long sampinterval = 10; // milliseconds void setup() { / *whatever needed */} void loop() { unsigned long currenttime = millis(); if(currenttime - previoustime > sampinterval) { //... // perform the control operations here //... // save the previous time for next cycle previoustime = currenttime; } } WHAT ARE THE DISADVANTAGES OF THIS APPROACH? 15

16 Control loop with delay unsigned long prevtime = 0; // milliseconds unsigned long sampinterval = 10; // milliseconds void setup() { / *whatever needed */} void loop() { unsigned long starttime = millis(); //... // perform the control operations here //... } unsigned long endtime = millis(); delay(sampinterval (endtime starttime)); WHAT ARE THE DISADVANTAGES OF THIS APPROACH? 16

17 Real-Time Timers The ATMega has Three Hardware Timers/Counters Timer 0 (8 bit) Used for delay(), millis() and PWM analogwrite() on pins 5 and 6. Timer 1 (16 bit) Used for PWM analogwrite() on pins 9 and 10, and for the Servo library. Timer 2 (8 bit) Used for tone() and analogwrite() on pins 3 and

18 Timer Overview Timers are counters that count pulses from a timebase. Using the timebase of the Arduino (16MHz) the resolution is 62.5 ns, but this can be configured by a pre-scaler. Timers can generate interrupts when they overflow or reach certain values. Timers can generate PWM signals with configurable frequency and duty cycle. Timer s operation is controlled via a set of registers. 18

19 Timer Registers (TCCRnA) Timer Counter Control Register A - Determines the operating mode (TCCRnB) Timer Counter Control Register B - Determines the prescale value (TCNTn) Timer Counter Register - Contains the timer count (OCRnA) Output Compare Register A - Interrupt can be triggered on this count (OCRnB) Output Compare Register B - Interrupt can be triggered on this count (TIMSKn) Timer/Counter Interrupt Mask Register - Sets the conditions for triggering an interrupt (TIFRn) Timer/Counter 0 Interrupt Flag Register - Indicates if the trigger condition has occurred n timer number 19

20 Timer Resolution CSxm m th bit of the Clock Select bits in the TCCRnB register All timers are initialized for a pre-scale of 64 Setting CSx0:2 to 000 will stop counting 20

21 AVR Timer Hardware Diagram 21

22 Timer Control Registers Timer Counter Control Register A Timer Counter Control Register B 22

23 Changing Timer 1 frequency const byte mask= B ; // mask bits that are not prescale int prescale = 1; //fastest possible void setup() { TCCR1B = (TCCR1B & mask) prescale; } void loop() { analogwrite(9,128); //check waveform analogwrite(10,128); //with osciloscope } Warning: Changing frequency of Timer 0 will change the behaviour of delay() and millis()! 23

24 Modes of Operation 24

25 Normal Mode Counting direction always up. Counter goes from BOTTOM (0x00) to MAX (0xFF or 0xFFFF) Overflow flag (TOV) is set when the timer overflows (same clock cycle as timer goes from MAX to BOTTOM). Via Timer Overflow Interrupt, TOV flag can be cleared automatically. 25

26 Clear Timer on Compare (CTC) OCRnA defines the TOP of the timer. Counter is cleared to 0x00 when counter matches TOP. Wave generation: OCnA can toggle its logical level on each compare match (COMnA = 1). 26

27 Fast PWM mode Counts from 0x00 to 0xFF (mode 3) or OCRnA (mode 7). Output compare pin (OCnx) is cleared/set at counter match with OCRnx, via COMnx = 2/3. 27

28 Phase Correct PWM mode Shifts the PWM signal so that it is symmetric around the half period point. 28

29 Using Timer Interrupts TIMSKn Bits 0,1 and 2 enable Timer/Counter interrupts: BIT 0: Overflow BIT 1: Output Compare Match A BIT 2: Output Compare Match B. Interrupts will be generated when: BIT 0: a timer overflow occurs BIT 1: a Compare Match occurs between the Timer/Counter and the data in OCRnA Output Compare Register A. BIT 2: a Compare Match occurs between the Timer/Counter and the data in OCRnB Output Compare Register B. 29

30 Timer Interrupt Registers Timer/Counter Interrupt Mask Register Timer/Counter 0 Interrupt Flag Register 30

31 ATMega 328 Interrupts 31

32 Control loop with interrupts Setting interrupt on Timer 1 at 1Hz. #include <avr/io.h> #include <avr/interrupt.h> void setup() { cli(); //stop interrupts TCCR1A = 0;// clear register TCCR1B = 0;// clear register TCNT1 = 0;//reset counter OCR1A = 15624; //must be <65536 // = (16*10^6) / (1*1024) 1 TCCR1B = (1 << WGM12); //CTC On // Set prescaler for 1024 TCCR1B = (1<<CS12) (1<<CS10); // enable timer compare interrupt TIMSK1 = (1 << OCIE1A); sei(); //allow interrupts } volatile bool flag; ISR(TIMER1_COMPA_vect){ //... //put here control operations // flag = 1; //notify main loop } void loop() { if(flag) { //post-interrupt operations flag = 0; } //other operations } 32

33 Guidelines for ISR s Enable global interrupts ISR s should be as fast as possible: Do not use delay() Do not call functions. Use direct register access if possible. Use flags to communicate with the main loop. Shared variables should be declared volatile. Shared data that cannot be accessed atomically needs to be protected by disabling interrupts during the access. Only byte-sized data can be accessed atomically. Anything larger than a byte needs to be protected. 33