Embedded Systems. October 2, 2017

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Elinor Short
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1 Embedded Systems October 2, 2017

2 Announcements Read pages

3 The Plan! Timers and Counter Interrupts

4 A little review of timers How do we keep track of seconds using a timer? We have several different ways one way is: Wait for a roll over Calculate time taken for one complete roll over Count number of roll overs Calculate how many roll overs make 1 second

5 Timer flowchart Timer Init COUNT BIT = 1 Yes No Timer rolls over every seconds Around 5 rolls = 1 second Clear Timer Count If counter is 5, its been 1 second, set counter to 0

6 Is the fraction important? What fraction do we lose every second? seconds How much do we lose every hour? 175 seconds Everyday? 70 minutes

7 How can we get the fraction back? Bus clock is 80MHz / COUNT is set every seconds To keep seconds we increment every 4 or 5 roll overs We can used fixed point to keep fractions Keep a 64 bit long (long current_time;) Upper 32 bits are the seconds Lower 32 bits are the fractions of seconds Each count of the lower bit is 1/2 32 seconds = For each COUNT set add / = fractional seconds COUNT is set then current_time += ; Seconds are current_time >> 32

8 Timing Accurary After 1000 seconds, what is our accuracy? COUNT has been set: 1000 * / = 4768 times fractional seconds added 4768 times * 4768 = = 0x3E7EC0CFB20 Top 32 bits are $3E7= 999 seconds Accuracy 999/1000

9 On to Interrupts Keeping track of timer COUNT bit was tricky Interrupts are better approach Extremely important to understand how interrupts work for systems development

10 Interrupts a concept It would be nice if, instead of continually checking (polling), we are notified of (interrupted for) a condition Examples: Wristwatch Check every 5 minutes Alarm ring at the end of class Cell phone Check for message Message alert Making Tea Polling to check if the water is boiling A whistling tea kettle

11 Interrupts Two kinds of interrupts Hardware Software Hardware Interrupt CPU triggers interrupt based on some condition Finish the current instruction Save current state of the CPU on the stack Execute Interrupt Service Routine Acknowledge the interrupts Resume execution of the main program Software Interrupt Instruction within code causes an interrupt

12 Hardware Interrupt Some piece of hardware generates an interrupt CPU executes an interrupt instruction Execute Interrupt handing software (ISR) Return from ISR Resume normal operation

13 What generates an interrupt Source:

14 Back to our Timer Example Polled Example: Loop until TCNT rolls over count the number of rolls C Implementation for( ; ; ) { } Wait for COUNT flag to be set timer_count += <fraction_value>;

15 Interrupt driven approach C implementation for (;;) { } Do whatever you want to do timer_count is the number of sec ISR keeps track of COUNT flag set ISR will increment timer_count by fractional value How do we execute ISR when timer counts down to 0?

16 Configuring SysTick Timer Three main registers NVIC_ST_CTRL_R Count 1 means SysTick timer has counted to 0 CLK_SRC 0 PIOSC divided by 4 (16MHz/4) 1 System clock (80Mhz) INTEN Interrupts enabled (later) ENABLE Enable this timer

17 C Program with interrupts unsigned long timer_val=0; // extern so ISR can see symbol void main(void) { NVIC_ST_CTRL_R = 9; NVIC_ST_RELOAD_R = 0x00FFFFFF; NVIC_ST_CURRENT_R = 0; NVIC_ST_CTRL_R = 0x ; for(;;) { // code goes here to copy (timer_val>>16) to display } /* loop forever */ }

18 How do I set the Vector Table to call my ISR? tm4c123gh6pm_startup_ccs.c // To be added by user extern void SysTickHandler(void); #pragma DATA_SECTION(g_pfnVectors, ".intvecs") void (* const g_pfnvectors[])(void) = { (void (*)(void))((uint32_t)& STACK_TOP), // The initial stack pointer ResetISR, // The reset handler NmiSR, // The NMI handler FaultISR, // The hard fault handler IntDefaultHandler, // The MPU fault handler IntDefaultHandler, // The bus fault handler IntDefaultHandler, // The usage fault handler 0, // Reserved 0, // Reserved 0, // Reserved 0, // Reserved IntDefaultHandler, // SVCall handler IntDefaultHandler, // Debug monitor handler 0, // Reserved IntDefaultHandler, // The PendSV handler SysTickHandler, // The SysTick handler IntDefaultHandler, // GPIO Port A IntDefaultHandler, // GPIO Port B IntDefaultHandler, // GPIO Port C IntDefaultHandler, // GPIO Port D IntDefaultHandler, // GPIO Port E

19 ISR for timer overflow void SysTickHandler() { timer_val += ; }

20 What happens at an Interrupt? When an interrupt occurs: The current instruction is finished Eight registers PSR, PC, LR, R12, R3, R2, R1, R0 are pushed on the stack The Address for ISR is loaded in the PC IPSR register holds the Interrupt number Top 24 bits of LR are set to 0xFFFFFF indicating ISR mode Next 7 bits specify how to return from interrupt 0xF1 Return to another interrupt (Handler mode) 0xF9 Return to normal execution (Thread mode)

21 When you return from an interrupt ISR executes BX LR Since top 24 bits are 0xFFFFFF, processor knows that code is returning from an interrupt Pops the eight registers Returns to thread mode or Handler mode depending on bits 1-7 of LR

22 Interrupt Priority You can set the priority of an interrupt Priority registers Each register holds 8 bits for each interrupt priority Priority is between 0 and 7 depending on which bit is set 0 highest, 7 lowest High priority interrupts, interrupt ISR for low priority interrupts

23 Next topic Input capture Read pages:

24 Some Background Frequency Shift Keying: A frequency modulation scheme where data is encoded and transmitted by changing the frequency of a carrier channel

25 FSK An Example: Image Source - Wikipedia

26 Decoding FSK Lets say we have a means of converting Analog signal to digital data?

27 Decoding FSK If we can measure the pulse width, we can tell if the data is 1 or

28 TV remotes

29 Input Capture Used to measure Pulse width Pulse Period An external signal is connected to IC pin IC an generate an interrupt at Rising edge at IC pin Falling edge at IC pin Both edges The current value of Timer (16 or 24 bit) is saved in IC register during the interrupt event

30 Uses of Input Capture Request an ISR based on an external signal Calculate period of a pulse by interrupting on rising edge and subtracting the two timer values Calculate pulse width by interrupting first on rising edge and then on falling edge

31 Input Capture Pins Timer 0-5, each with two channels T0CCP0 PF0 T0CCP1 PB7 T1CCP0 PF1 T1CCP1 PF3 T2CCP0 PF4 T2CCP1 PB1 T3CCP0 PB2 T3CCP1 PB3 T4CCP0 PD4 T4CCP1 PD5 T5CCP0 PD6 T5CCP1 PD7

32 IO Ain PA2 Port SSI0Clk PA3 Port SSI0Fss PA4 Port SSI0Rx PA5 Port SSI0Tx PA6 Port I 2 C1SCL M1PWM2 PA7 Port I 2 C1SDA M1PWM3 PB0 Port U1Rx T2CCP0 PB1 Port U1Tx T2CCP1 PB2 Port I 2 C0SCL T3CCP0 PB3 Port I 2 C0SDA T3CCP1 PB4 Ain10 Port SSI2Clk M0PWM2 T1CCP0 CAN0Rx PB5 Ain11 Port SSI2Fss M0PWM3 T1CCP1 CAN0Tx PB6 Port SSI2Rx M0PWM0 T0CCP0 PB7 Port SSI2Tx M0PWM1 T0CCP1 PC4 C1- Port U4Rx U1Rx M0PWM6 IDX1 WT0CCP0 U1RTS PC5 C1+ Port U4Tx U1Tx M0PWM7 PhA1 WT0CCP1 U1CTS PC6 C0+ Port U3Rx PhB1 WT1CCP0 USB0epen PC7 C0- Port U3Tx WT1CCP1 USB0pflt PD0 Ain7 Port SSI3Clk SSI1Clk I 2 C3SCL M0PWM6 M1PWM0 WT2CCP0 PD1 Ain6 Port SSI3Fss SSI1Fss I 2 C3SDA M0PWM7 M1PWM1 WT2CCP1 PD2 Ain5 Port SSI3Rx SSI1Rx M0Fault0 WT3CCP0 USB0epen PD3 Ain4 Port SSI3Tx SSI1Tx IDX0 WT3CCP1 USB0pflt PD6 Port U2Rx M0Fault0 PhA0 WT5CCP0 PD7 Port U2Tx PhB0 WT5CCP1 NMI PE0 Ain3 Port U7Rx PE1 Ain2 Port U7Tx PE2 Ain1 Port PE3 Ain0 Port PE4 Ain9 Port U5Rx I 2 C2SCL M0PWM4 M1PWM2 CAN0Rx PE5 Ain8 Port U5Tx I 2 C2SDA M0PWM5 M1PWM3 CAN0Tx PF0 Port U1RTS SSI1Rx CAN0Rx M1PWM4 PhA0 T0CCP0 NMI C0o PF1 Port U1CTS SSI1Tx M1PWM5 PhB0 T0CCP1 C1o TRD1 PF2 Port SSI1Clk M0Fault0 M1PWM6 T1CCP0 TRD0 PF3 Port SSI1Fss CAN0Tx M1PWM7 T1CCP1 TRCLK PF4 Port M1Fault0 IDX0 T2CCP0 USB0epen

33 Input Capture Registers SYSCTL_RCGCTIMER_R - 1 bit for each timer TIMER0_CTL_R Enable/Disable a timer TIMER0_CFG_R Configure 16/24 bit timer TIMER0_TAMR_R Enable Capture TIMER0_CTL_R Rising/Falling Edge, Enable timer TIMER0_TAILR_R Start value 24 bits TIMER0_TAPR_R TIMER0_IMR_R Enable capture match interrupt TIMER0_ICR_R Flag to clear to ack interrupt

What generates an interrupt Source: http://users.ece.

34 What generates an interrupt Source:

35 In the interrupt TImer0A_Handler: Acknowledge the interrupt Write 1 to bit 2 of TIMER0_ICR_R TIMER0_TAR_R hold the timer at which interrupt occured

Interrupts (Exceptions) Gary J. Minden September 11, 2014

Interrupts (Exceptions) Gary J. Minden September 11, 2014 1 Interrupts Motivation Implementation Material from Stellaris LM3S1968 Micro-controller Datasheet Sections 2.5 and 2.6 2 Motivation Our current