ECE 450:DIGITAL SIGNAL. Lecture 10: DSP Arithmetic

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1 ECE 450:DIGITAL SIGNAL PROCESSORS AND APPLICATIONS Lecture 10: DSP Arithmetic

2 Last Session Floating Point Arithmetic Addition Block Floating Point format Dynamic Range and Precision 2

3 Today s Session Guard Bits Sources of Error in DSP Implementations DSP Architectures 3

4 Block Floating Point format Increases the range & precision of fixed point format A group or block of fixed point numbers are represented as though they were floating point numbers with same exponent and different mantissa Mantissa are stored and handled similar to fixed point numbers The common exponent of the block is stored separately and is used to multiply the numbers as they are read off the memory The exponent is decided by the smallest number of leading zeros in the fixed point representation of the given block of numbers 4

5 Block Floating Point format The numbers are then shifted by this value to accommodate the maximum number of non zero bits using the given fixed point format Increases the range & precision of a given fixed point format by retaining as many lower bits as possible Does not require any extra hardware resources except an extra memory to store th eblock exponent Increases the complexity of the programs Also works on block of integers if there are zeros to the right 5

6 Example Following 14 bit binary fractions are to be stored in an 8-bit memory. (a) Represent using 8 bit fixed point format (b) Represent using block floating point format (c) Show how the precision is increased using block floating point format

7 Dynamic Range & Precision Dynamic Range: Ratio of maximum value to the minimum value that the signal can take in the given number representation scheme Dynamic Range Number of bits It increases by 6 db for every additional bit Resolution: Minimum value that can be represented using a number representation format Resolution/Precision Number of bits If N bits are used to represent a number between 0 N and 1 the smallest value is resolution = 2 7

8 Normally expressed as number of bits used. Precision affects speed Precision 1 Speed In floating point format: Exponent determines range Since exponent in floating point is a power, dynamic range is very large Resolution is determined by Mantissa Since speed is affected the precision is to be chosen carefully 8

9 Range of fractional numbers With N bits for mantissa M, the range of fractional numbers that can be represented in the mantissa is (2-2 -N ) to +(2-2 -N ) Ex1: Using 16 bits for the mantissa & 8 bits for the exponent,what is the range of numbers that can be represented using the floating point format similar to IEEE 754? Ex2: Compute the dynamic range & % resolution for a block floating point format with 4 bit exponent and 16 bit fixed point processor. 9

10 Guard Bits(Improve accuracy & range) 10

11 Example Consider the subtraction(floating point data) X-Y where : X= *2 1 Y= *2 0 Equalize Exponent & Subtract X= *2 1 Y= *2 1 Z= *2 1 Normalize Z= *

12 Example Cont.. Now add few bits extra to mantissa X= *2 1 Y= *2 0 Equalize Exponent & Subtract X= *2 1 Y= *2 1 Z= *2 1 Normalize Z= *2-23 Thus Guard bits have increased the precision of data 12

13 Floating Point Processor Guard Bits Capture the bits at LSB Guard the accuracy in intermittent results Improve the accuracy (precision) 13

14 Fixed Point Processors Guard Bits Capture the bits at MSB Guard bits before MSB Improves the range 14

15 Comparison Since Fixed Point DS processor operates using integer format, range of numbers get limited leading to overflow problems. More coding effort is needed to deal with such a problem Choice for ASIC DSP (performance & small slice area) Floating point offers wide range of data, but requires complex circuitry hence more expensive and slower than fixed point. Choice for prototyping or proof-of-concept development 15

16 Most floating point numbers perform automatic normalization so that numbers are properly shifted & aligned. The programmer just needs to take care of overflow problem. But due to enormous dynamic range,scaling is rarely needed. Floating point processors are easier to use than fixed point processors but are more expensive 16

17 Comparison between fixed & floating point processors 16 or 24 bit devices Limited dynamic range Overflow & quantization errors must be resolved Poorer C compiler efficiency. Normally programed in assmbely Long product developement time Faster clock rate Less silicon area is required Cheaper Low power consumption 32 bit devices Large dynamic range Easier to program since no scaling is required Better C compiler efficiency. Can be developed in C Quick time to market Slower clock rate More silicon area is required as functional units are complex More expensive High power consumption Bursty in nature High speed 17

18 Applications of fixed & floating point Processors Drive disc and motor control Consumer audio applications such as MP3 players,multimedia gaming and digital cameras Speech coding/decoding and channel coding Communication devices such as modems & cellular phones. In radar,sonar & seismic applications Highend audio applications Sound synthesis in professional audio vedio coding/decoding 18

19 Sources of Error in DSPs DSP System: ADC, DSP device, DAC Accuracy depends on number of factors contributed by ADC & DAC and how the calculations are done in DSP device Errors in ADC & DAC : Quantization errors (Limited by number of bits) Errors in DSP calculations: Finite word length (Can be reduced by using larger word length & by rounding instead of truncation) 19

20 Comparison between DSP and GPP Used for embedded applications Low power requirement Have features required for DSP applications (FFT, Convolution, Correlation etc.) Real time I/O High speed on chip memories Deals with infinite continuous stream of data. Slow Has a typical MAC unit. 11/ 02/ 12 Dr.Shikha Tripathi,ASE, Bangalore Desk top computing/servers High Power consumption Bursty in nature High speed 20

21 Digital Signal Processors Application Specific Designed to perform one function more accurately, faster and is more cost effective Ex.: Digital filters, FFT chips Programmable Can be programmed for different applications Cost effective than GPP Architecture is designed for repetitive nature of signal processing by pipelining & parallelism Performs certain operations like MAC faster than GPP 21

22 Next Session DSP Architectures Cont.. 22

23 Thank You 23 Amrita School of Engineering, Bangalore

Divide: Paper & Pencil

Divide: Paper & Pencil 1001 Quotient Divisor 1000 1001010 Dividend -1000 10 101 1010 1000 10 Remainder See how big a number can be subtracted, creating quotient bit on each step Binary => 1 * divisor or