McGill University Department of Electrical and Computer Engineering. Course ECSE-322A -- Computer Engineering. MidTerm Test Version 1 Solutions

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1 Signature: I.D. Number: Printed Name: McGill University Department of Electrical and Computer Engineering Course ECSE-322A -- Computer Engineering PLEASE NOTE CAREFULLY: MidTerm Test Version 1 Solutions Monday, October 27, 2008 Sign this paper, fill in your student ID number and print your name at the top of the first page as well as the mark sense sheets - If you do not do this, the exam may not be marked. Initial each page of the exam paper in case the sheets should get separated. Make sure the signed paper in its entirety is handed in at the end of the examination. INSTRUCTIONS: This exam consists of two parts: Part 1 consists of a set of 16 multiple choice questions. Part 2 consists of a set of 2 questions with short answers. The answers to the questions in Part 1 (the first 16 questions) should be entered on the computer marked sheets. The answers to Part 2 should be written on this question paper in the space provided. DO NOT USE ANY OTHER EXAM BOOKS FOR ANSWERS TO BE MARKED. The scoring method for the multiple choice part of the examination is as follows: 1 mark for each correct answer, 0 marks for a blank or wrong answer. All multiple choice questions will be weighted equally in scoring. Therefore, Part 1 is worth a total of 16 marks. Part 2 is worth 14 marks. The exam is out of 30 marks total. This is a closed book exam. However, the candidates are allowed to bring in one sheet of letter size paper which may have handwritten notes on both sides. Student answers in the multiple choice section will be subject to analysis by the McGill Exam Security Computer Monitoring Program in order to identify unusually similar answer patterns. Please sign this paper at the top of this page, write your name legibly, and read the important notice above. MidTerm 2008A- 1

2 TEST QUESTIONS PART 1 - This part consists of 16 multiple choice questions. Indicate the correct answer to each question on the computer readable sheets provided. 1. Which of the following is TRUE with regards to a light pen? It is a graphical output device that is useful in CAD design. It is a high resolution device. When you point it at the screen, the computer picks up the light it emits and converts it to a position. It is as comfortable to use as a pen and paper model. It is an absolute device. Answer: e 2. Which of the following is set by the CPU on the Device Status Register: Device on. Device busy. Interrupt enabled. Interrupt set. Vectored address LOAD. Answer: c 3. Out of the 25 lines in a full RS232 protocol, which of the following are NOT responsible for maintaining synchronization? Received Data Data Set Ready Clear To Send Data Terminal Ready Request to Send Answer: a MidTerm 2008A- 2

3 4. In a particular sorting process the first iteration places 1 data item in the correct position; the second places a further 2; by the fourth pass 15 items are correctly placed. The time complexity of this process is O (constant) O (log 2 N) O(N) O (Nlog 2 N) O(N 2 ) Answer. 5. In a serial communications system using a START/STOP protocol with 1 STOP bit, what is the maximum number of ASCII characters that can be transmitted per second on a baud connection? (to the nearest multiple of 10) Answer: c 6. A complete binary tree contains 10 nodes. What is the height of the tree? Impossible to determine. Answer: c 7. A graphics system is designed such that each pixel has 2 bits for red, 2 bits for green and 2 bits for blue. The system can display a total of: 6 colours 12 colours 64 colours 128 colours 256 colours Answer: c MidTerm 2008A- 3

4 8. The device status register (sometimes referred to as the status and control register) is best defined as: A location on the device interface used to pass information between the CPU and the device. A location in memory used by the CPU to communicate with a device. A location on the device used to store data from the bus lines. A pointer to data currently being processed. A location used to store the ISR (Interrupt Service Routine). Answer: a 9. Which of the following is TRUE? I/O is impossible without interrupts. Polled interrupts determine device priority through an interrupt acknowledge line. Priority interrupts cause the device which has waited the longest to be handled next. Interrupt service routines may themselves be interrupted. In programmed I/O, device priority is determined in software through a general ISR. Answer: d 10. A buffer is useful to speed up a slow device when: A buffer is only useful for a fast device. Data are transmitted in bursts and each burst has a limited number of characters. Data are continuously sent over the line. The speed of data transmission over the line is low. Used in conjunction with the RS-232 protocol. Answer: b 11. A Composite Video Signal is so named because: It includes color and/or grey scale picture information. It embeds both control and video data signals in one stream. It embeds the vertical synch pulse in the middle of the vertical blank. It provides an analog video signal. It provides both frame and line synchronization. Answer: b MidTerm 2008A- 4

5 12. The introduction of a dedicated graphics CPU (GPU) permitted: The frame buffer to be tightly coupled to the main CPU. The reduction of the communications speed requirement between the frame buffer and the CRT. The frame buffer to transform the instruction draw a line into bit patterns. The possibility of the CPU sending compact instructions in the form of graphics instructions over a serial line. The creation of a lookup ROM to store the optimal bit patterns for all possible graphical images. Answer: d 13. Numbers are added to an empty stack in the following order: 45, 29, 42, 11, 32. Which of the following statements is true? The stack pointer points to element 45. If the items are removed one at a time, they would be removed in the following order: 32, 11, 42, 29, 45. To access item 11, 3 items would have to be popped off the stack. The next data item to be added to the stack will be added after item 32. The next data item to be removed would be data item 45. Stacks cannot be implemented as linked lists. Solution: b 14. Threaded lists are: A set of independent linked lists (each with its own set of nodes). A linked list where each node has multiple entry points but only one exit point. A linked list with more than one chain of pointers that link the same nodes. Subsets of trees. A linked list where each node has a pointer to the next element. Answer: c 15. Which of the following is an abstract data type (and NOT a data structure)? A stack. A linked list. An array. A binary tree. IEEE-754 real number. MidTerm 2008A- 5

6 Answer: a 16. The advantage of using array vectoring with multi-dimensional arrays is: It provides a way to pre-store the exact address of each array element. It is a way to store arrays of vectors. Less memory is used. It speeds up the address polynomial computations. It speeds up the address polynomial computations only if the array is sparse. Answer: d PART 2 of this exam starts on the next page. Please turn over the page and begin Part 2 NOW! MidTerm 2008A- 6

7 B MidTerm Test Version 1 PART 2 - This part consists of 2 short answer questions. YOU MUST ANSWER BOTH QUESTIONS. Write your answers to the questions in the space provided on this exam paper. Do not use extra paper - any answers written outside of the allowed space will not be marked. Each question is worth 7 marks. 17. Give 2 characteristics of an Abstract Data Type (ADT) (0.5 marks each) 1. An ADT describes the form of the data (not its physical implementation) 2. An ADT defines how components of the data can be accessed (the operations on the data) (ii) What differentiates a data structure from an abstract data type? (1 mark) A data structure provides the physical implementation of the abstract data type. MidTerm 2007A - 7

8 (i) Consider the following list of numbers: 53, 22, 93, 23, 63, 56, 18. Show the results of one iteration of QuickSort given the first element as the pivot. (Write out all the steps to attain partial marks if there are errors.) Do not implement the method that uses an additional array. (1.5 marks) Solution: 53 is the pivot (ii) What is your estimate of the time complexity of running QuickSort to completion on this set of numbers? (0.5 marks) Solution: Since the first pivot is approximately in the center, we can estimate the time complexity is O(NlogN). MidTerm 2008A- 8

9 Consider a set of N data items. Fill in the table below with the expected time for each operation. Use big-o notation. The operations are delete (remove an item from the data structure, including determining the location of the item), member (test if a given item is in the data structure), and traverse (visit every element in the structure once). Try to use efficient methods when possible. (3 marks) Data Structure delete* member traverse Sorted array O(logN)+O(N) O(logN) O(N) Binary Search Tree O(logN)+O(1) O(logN) O(N) Sorted linked list O(N)+O(1) O(N) O(N) Unsorted linked list O(N)+O(1) O(N) O(N) *Note: Delete format should be: Search Time + Delete Time, e.g. O(N) + O(N). MidTerm 2008A- 9

10 18. i. One possible design of an interrupt system assigns each interface with its own interrupt line. Describe two problems with this approach. (1 mark) Possible Solutions: 1. As each interface is added, a change must take place in the CPU architecture. 2. Wiring complexity grows. 3. The CPU has many lines to check each time! ii. Draw the truth table (including filling in the signal names) for the logic that will generate the Interrupt Set signal within the Device Status Register. (0.5 mark) Answer: Signals: Device Busy and Interrupt Enable Device Busy Interrupt Enable Interrupt Set iii. During a vectored interrupt process, a LOAD signal is required to place the ISR address on the Data bus. Construct the truth table for the logic that will generate the LOAD signal (including filling in the signal names). (0.5 mark). Answer: Signals: Interrupt Set and Interrupt Acknowledge: Interrupt Set Interrupt Load Acknowledge MidTerm 2008A- 10

11 iv. Draw the digital logic circuit for generating the LOAD signal in (ii) above including all the signals in (i) label each signal clearly (1 mark): MidTerm 2008A- 11

12 A particular interrupt system takes (on the average) 60 microseconds to get to the pertinent ISR after the interrupt is received and the FETCH and EXECUTE cycle is broken. The overhead of the ISR itself (i.e. time taken up with restoring the contents of the CPU registers, etc.) takes 30 microseconds. i. If 20% of the interrupt time is associated with the overhead, determine how much ISR execution time it takes to actually service the I/O device on average. (1 mark) Solution: If the total time for the ISR to execute takes x microseconds on average, then (60+30)/(60+x) = 0.20 (0.2) * (60 + x) = x = 90 x = 390 microseconds. However, 30 microseconds of that time is spent on the overhead of the ISR. The time to service the I/O device is then: = 360 microseconds. Can be solved by: If the total time for the ISR to service the I/O device takes x microseconds on average, then (60+30)/(60+x+ 30) = 0.20 (0.2) * (60 + x + 30) = x = 90 x = 360 microseconds. ii. Measurements on a real system suggest that only 18% of the CPU time is spent on interrupts. What is the average number of interrupts received by the CPU each second? (1 mark). Solution: If there are n interrupts per second, then the time taken is n * 450*10-6 seconds. Thus : n * 450*10-6 = 0.18 n = 400 interrupts/second MidTerm 2008A- 12

13 A printer is designed to connect to a computer using a three wire (ground, send, receive) serial communications system. A large memory buffer is placed in the printer to allow the interface to send characters in a stream at a rate which is much higher than the printer can actually output them. It is also required to keep the printer running continuously, i.e. it should not have to wait for data to arrive. i. Describe a system which can be implemented to both avoid the buffer overflowing and keep the printer running. (1mark) Implement an XON/XOFF protocol. When the buffer is about 20% full send and XON character to the interface to begin transmission; when the buffer is about 80% full, send an XOFF character to the interface to stop transmission. ii. The printer can output 100 characters per second (ignoring carriage returns) and the computer is designed to output 1 page of text (5000 characters) in 0.5 seconds. If the computer is to send one page every minute, how much memory will be needed in the printer buffer? (Assuming that a character is 8 bits long). (1 mark) 5000 characters in 500 milliseconds is a rate of characters per second or one character takes 100 microseconds to send. The printer takes 10 milliseconds to print one character. In this time, 100 characters have arrived, i.e. 99 need to be stored. A page arrives in 0.5 seconds and only 1 page arrives per minute. On the printer side, at 100 characters per second, it will take 5000/100 = 50 seconds to print the page. Thus the buffer will be empty by the time the second page arrives and only enough space is needed to deal with a single page. There are 5000 characters in a page (or 50x100 characters = 50x100 bytes). Thus, from the above, the buffer needs to be 50*99 bytes = 4950 bytes. MidTerm 2008A- 13