SED1180F CMOS LCD 64-COMMON DRIVERS LCD CONTR 256SEG 64 COM DUTY: 1/64

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Allyson Scott
5 years ago
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1 CMOS LCD -COMMON DRIVERS DESCRIPTION The SED119 is a dot matrix LCD common (row) driver for driving high-capacity LCD panel at duty cycles higher than 1/. The LSI uses two serially connected, 32-bit shift registers to hold the display data, and level shifter converts the TTL level -bit parallel data from the shift registers to levels suitable for use by the LCD drive circuitry. The SED119 generates common drive signals using the voltages supplied to LCD drive voltages pins. The SED119 is used in conjunction with the (-bit row driver) to drive a large capacity dot matrix LCD panel. FEATURES Low-power CMOS technology -bit common (row) driver Display blanking Duty cycle: 1/ to 1/128 Daisy chain enable support Wide range of LCD voltage: 14V to 25V Supply voltage: 5.V ±1% Package:... QFP1-8 pin (FA) QFP5-8 pin (F5A) E: Al pad chip (DA) SYSTEM BLOCK AGRAM LCD CONTR D ~ D3 XSCL LP, YD F SED SEG COM DUTY: 1/ 75

2 BLOCK AGRAM 31 COM LCD Driver Latch Level Shifter Shift Register Voltage Control VSS V DD V2 V3 V SSH 5 Shift Register Level Shifter LCD Driver 32 COM PIN CONFIGURATION COM COM62 COM61 COM6 COM59 COM58 COM57 COM56 COM55 COM54 COM53 COM52 COM51 COM5 COM49 COM48 COM47 COM46 COM45 COM44 COM43 COM42 COM41 COM4 V SSH V 4 V 1 V SS V DD SED119 Index COM39 COM38 COM37 COM36 COM35 COM34 COM33 COM32 COM COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM31 COM3 COM29 COM28 COM27 COM26 COM25 COM24 COM23 COM22 COM21 COM2 COM19 COM18 COM17 COM16 COM15 COM14 COM13 COM12 COM11 COM1 COM9 COM8 76

3 Number Name Number Name Number Name Number Name 1 COM31 21 COM11 41 COM4 61 COM6 2 COM3 22 COM1 42 COM41 62 COM61 3 COM29 23 COM 9 43 COM42 COM62 4 COM28 24 COM 8 44 COM43 COM 5 COM27 25 COM 7 45 COM COM26 26 COM 6 46 COM45 66 VSSH 7 COM25 27 COM 5 47 COM46 67 V4 8 COM24 28 COM 4 48 COM COM23 29 COM 3 49 COM COM22 3 COM 2 5 COM COM21 31 COM 1 51 COM COM2 32 COM 52 COM51 72 V1 13 COM19 33 COM32 53 COM52 73 VSS 14 COM18 34 COM33 54 COM53 74 VDD 15 COM17 35 COM34 55 COM COM16 36 COM35 56 COM COM15 37 COM36 57 COM COM14 38 COM37 58 COM COM13 39 COM38 59 COM COM12 4 COM39 6 COM59 8 = Not connected PIN DESCRIPTION Pin Name COM to COM Function LCD common drive outputs Serial data input Transparent latch control input: latch output H H H L L L X latch Serial data output Serial data shift clock. Data is shifted through the controller on the falling edge of this clock LCD AC-drive signal input Active-low blanking input VDD, VSS Logic power supply inputs V1, V4, VSSH LCD drive power inputs VDD V1 V4 VSSH 77

4 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter Symbol Ratings Unit Supply voltage (1) VSS 7. to.3 V VSSH Supply voltage (2) V1, V4 28. to.3 V Input voltage VI VSS.3 to.3 V Operating temperature Topr 2 to 75 C Storage temperature Tstg 55 to 125 C Soldering temperature and time Tsol 26, 1 C, s Notes: 1. All voltages referenced to a VDD of V. 2. V1 and V4 must satisfy the relationship VDD V1, V4 VSSH 3. Exceeding the absolute maximum ratings can cause permanent damage to the device. Functional operation under these conditions is not implied. 4. Moisture resistance of flat packages can be reduced by the soldering process. Care should be taken to avoid thermally stressing the package during board assembly. 78

5 DC Characteristics (VDD = V, VSS = 5. V ±1%, Ta = 2 to 75 C) Parameter Symbol Conditions Rating Min Typ Max Unit Supply voltage (1) VSS V V1 VSSH VDD V V4 VSSH VDD V Supply voltage (2) Recommended VSSH V VSSH Operable VSSH (see note) V High level input voltage VIH.2VSS VDD.3 V Low level input voltage VIL VSS.3.8VSS V High level output voltage VOH IOH =.6 ma.4 V Low level output voltage VOL IOL =.6 ma VSS.4 V Input leakage current ILI V VI VSS.5 2. µa Output leakage current ILO V VO VSS.5 5. µa Shift clock 2.5 MHz Frame signal 1/6 s Input capacitance CI Ta = 25 C pf VSSH = 2. V.8 1. VOH = VDD.5 V Common output on RCOM VSSH = 14. V VOL = VSSH.5 V resistance kω COM bit VSSH = 9. V VSSH = 5. V Quiescent current SED VSSH = 25 V, VSSH = 5.5 V, IQ 119 VI = VDD.5 3 µa VSS = 5. V, VIH = VDD, VIL = VSS, cycle = Operating current for ISS cycle = 16.7 ms 13 µs µa the logic (duty 5%), All H output terminals are opened at every data input all 1/128 duty. VSS = 4.5 V, V1 = 2. V, V4 = 18. V, cycle = Operating current for LCD ISSH cycle = 16.7 ms 13 µs µa (duty 5%), All H output terminals are opened at every data input of 1/128 duty. Pull up MOS current Ip VSS = 5. V, VIL = 5. V Applicable to input terminals µa SED119 Note: Error free operation is guaranteed in this range but the output resistance of the LCD drivers is higher than in the recommended operating range. It is suggested that the driver is tested with the target LCD panel to determine if performance is acceptable. 79

6 AC Electrical Characteristics I/O Signal Timing DATA * * twlth tcyl twltl * is the data of COM * is the data of COM tds tdh tst tsth tds tcyc t DS t DH twclh twcll t D tpd VDD = V, VSS = 5.V ± 1%, Ta = 2 to 75 C Parameter Symbol Conditions Min Typ Max Unit Latch pulse cycle time tcyl 4 ns Latch pulse H width twlth 18 ns Latch pulse L width twll 18 ns Shift clock cycle time tcyc 4 ns Shift clock H time twclh 11 ns Shift clock L time twcll 11 (24) ns Data setup time tds 1 (7) ns Data hold time tdh 3 ns Data shift timing tst ns Data shift hold time tsth 125 ns Permissible frame signal delay td 5 5 ns Input signal rise time tr * ns Input signal fall time tf * ns Data output delay time tpd CL = 15pF 3 17 ns *tr, tf = (tcyl twlh twltl) / 2 where tf 5ns. 71

7 Common Drive V IL VIH V IL COM out t CLCD tcd Vn.5V Vn.5V VDD,V1 V1, V4, V SSH t IHCD VIH =.2 VSS VIL =.8 VSS VDD = V, VSS = 5.V ± 1%, Ta = 2 to 75 C Parameter Symbol Conditions Min Typ Max Unit COM output delay time tclcd VSSH = 14. to 3. µs RF COM output delay time tcd 25.V 3. µs COM output delay time tihcd CL = 1pF 3. µs 711

8 EXAMPLE OF APPLICATION ( pixels, 1/ duty ratio) LP YD YS V SS V DD R V1 R C V2 C 5R V3 C R V4 C R V SSH N VSSH SED119 VDD, V1, V4, VSS 4 *1 1Ω *2 V DD, V SS V 2, V 3 *1 1Ω COM LCD PANEL Full Dot Graphic Display SEG 1 EI EO LP SEG 2 EI EO LP SEG 3 EI EO LP 1 EI EO LP SEG LP ECL, XSCL D to D Notes: 1. Current limiting resistors 2. Bypass VSS and VSSH with capacitors of at least.1 µf 712

RW CH Segment Driver

RW CH Segment Driver Functions: Dot matrix LCD driver with two 40 channel outputs Bias voltage (V1 ~ V4) Input/output signals Input : Serial display data and control pulse from controller IC Output : 40 X 2 channels waveform