CMOS 16-BIT SINGLE CHIP MICROCONTROLLER S1C17W14/W16 Technical Manual

Transcription

1 CMOS 16-BIT SINGLE CHIP MICROCONTROLLER S1C17W14/W16 Technical Manual Rev. 1.1

2 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. When exporting the products or technology described in this material, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You are requested not to use, to resell, to export and/or to otherwise dispose of the products (and any technical information furnished, if any) for the development and/or manufacture of weapon of mass destruction or for other military purposes. All brands or product names mentioned herein are trademarks and/or registered trademarks of their respective companies. SEIKO EPSON CORPORATION 2014, All rights reserved.

3 CONFIGURATION OF PRODUCT NUMBER Configuration of product number Devices S1 C 17xxx F 00E1 00 Packing specifications 00 : Besides tape & reel 0A : TCP BL 2 directions 0B : Tape & reel BACK 0C : TCP BR 2 directions 0D : TCP BT 2 directions 0E : TCP BD 2 directions 0F : Tape & reel FRONT 0G : TCP BT 4 directions 0H : TCP BD 4 directions 0J : TCP SL 2 directions 0K : TCP SR 2 directions 0L : Tape & reel LEFT 0M : TCP ST 2 directions 0N : TCP SD 2 directions 0P : TCP ST 4 directions 0Q : TCP SD 4 directions 0R : Tape & reel RIGHT 99 : Specs not fixed Specification Package D: die form; F: QFP, B: BGA, WCSP Model number Model name C: microcomputer, digital products Product classification S1: semiconductor Development tools S5U1 C H Packing specifications 00: standard packing Version 1: Version 1 Tool type Hx : ICE Dx : Evaluation board Ex : ROM emulation board Mx : Emulation memory for external ROM Tx : A socket for mounting Cx : Compiler package Sx : Middleware package Yx : Writer software Corresponding model number 17xxx: for S1C17xxx Tool classification C: microcomputer use Product classification S5U1: development tool for semiconductor products S1C17W14/W16 Technical Manual Seiko Epson Corporation i

4 PREFACE Preface This is a technical manual for designers and programmers who develop a product using the S1C17W14/W16. This document describes the functions of the IC, embedded peripheral circuit operations, and their control methods. For the CPU functions and instructions, refer to the S1C17 Family S1C17 Core Manual. For the functions and operations of the debugging tools, refer to the respective tool manuals. (Our Products: Document Downloads website provides the downloadable manuals.) Notational conventions and symbols in this manual Register address Peripheral circuit chapters do not provide control register addresses. Refer to Peripheral Circuit Area in the Memory and Bus chapter or List of Peripheral Circuit Control Registers in the Appendix. Register and control bit names In this manual, the register and control bit names are described as shown below to distinguish from signal and pin names. XXX register: Represents a register including its all bits. XXX.YYY bit: Represents the one control bit YYY in the XXX register. XXX.ZZZ[1:0] bits: Represents the two control bits ZZZ1 and ZZZ0 in the XXX register. Register table contents and symbols Initial: Value set at initialization Reset: Initialization condition. The initialization condition depends on the reset group (H0, H1, or S0). For more information on the reset groups, refer to Initialization Conditions (Reset Groups) in the Power Supply, Reset, and Clocks chapter. R/W: R = Read only bit W = Write only bit WP = Write only bit with a write protection using the MSCPROT.PROT[15:0] bits R/W = Read/write bit R/WP = Read/write bit with a write protection using the MSCPROT.PROT[15:0] bits Control bit read/write values This manual describes control bit values in a hexadecimal notation except for one-bit values (and except when decimal or binary notation is required in terms of explanation). The values are described as shown below according to the control bit width. 1 bit: 0 or 1 2 to 4 bits: 0x0 to 0xf 5 to 8 bits: 0x00 to 0xff 9 to 12 bits: 0x000 to 0xfff 13 to 16 bits: 0x0000 to 0xffff Decimal: 0 to Binary: 0b to 0b Channel number Multiple channels may be implemented in some peripheral circuits (e.g., 16-bit timer, etc.). The peripheral circuit chapters use n as the value that represents the channel number in the register and pin names regardless of the number of channel actually implemented. Normally, the descriptions are applied to all channels. If there is a channel that has different functions from others, the channel number is specified clearly. Example) T16_nCTL register of the 16-bit timer If one channel is implemented (Ch.0 only): T16_nCTL = T16_0CTL only If two channels are implemented (Ch.0 and Ch.1): T16_nCTL = T16_0CTL and T16_1CTL For the number of channels implemented in the peripheral circuits of this IC, refer to Features in the Overview chapter. ii Seiko Epson Corporation S1C17W14/W16 Technical Manual

5 CONTENTS Contents Configuration of product number...i Preface... ii Notational conventions and symbols in this manual... ii 1 Overview Features Block Diagram Pins Pin Configuration Diagram (Package) Pad Configuration Diagram (Chip) Pin Descriptions Power Supply, Reset, and Clocks Power Generator (PWG2) Overview Pins Operations System Reset Controller (SRC) Overview Input Pin Reset Sources Initialization Conditions (Reset Groups) Clock Generator (CLG) Overview Input/Output Pins Clock Sources Operations Operating Mode Initial Boot Sequence Transition between Operating Modes Interrupts Control Registers PWG2 Control Register PWG2 Timing Control Register PWG2 Interrupt Flag Register PWG2 Interrupt Enable Register CLG System Clock Control Register CLG Oscillation Control Register CLG IOSC Control Register CLG OSC1 Control Register CLG OSC3 Control Register CLG Interrupt Flag Register CLG Interrupt Enable Register CLG FOUT Control Register CPU and Debugger Overview CPU Core CPU Registers Instruction Set Reading PSR I/O Area Reserved for the S1C17 Core S1C17W14/W16 Technical Manual Seiko Epson Corporation iii

6 CONTENTS 3.3 Debugger Debugging Functions Resource Requirements and Debugging Tools List of debugger input/output pins External Connection Flash Security Function Control Register MISC PSR Register Debug RAM Base Register Memory and Bus Overview Bus Access Cycle Flash Memory Flash Memory Pin Flash Bus Access Cycle Setting Flash Programming RAM Display Data RAM Peripheral Circuit Control Registers System-Protect Function Control Registers MISC System Protect Register MISC IRAM Size Register FLASHC Flash Read Cycle Register Interrupt Controller (ITC) Overview Vector Table Vector Table Base Address (TTBR) Initialization Maskable Interrupt Control and Operations Peripheral Circuit Interrupt Control ITC Interrupt Request Processing Conditions to Accept Interrupt Requests by the CPU NMI Software Interrupts Interrupt Processing by the CPU Control Registers MISC Vector Table Address Low Register MISC Vector Table Address High Register ITC Interrupt Level Setup Register x I/O Ports (PPORT) Overview I/O Cell Structure and Functions Schmitt Input Over Voltage Tolerant Fail-Safe Type I/O Cell Pull-Up/Pull-Down CMOS Output and High Impedance State Clock Settings PPORT Operating Clock Clock Supply in SLEEP Mode Clock Supply in DEBUG Mode iv Seiko Epson Corporation S1C17W14/W16 Technical Manual

7 CONTENTS 6.4 Operations Initialization Port Input/Output Control Interrupts Control Registers Px Port Data Register Px Port Enable Register Px Port Pull-up/down Control Register Px Port Interrupt Flag Register Px Port Interrupt Control Register Px Port Chattering Filter Enable Register Px Port Mode Select Register Px Port Function Select Register P Port Clock Control Register P Port Interrupt Flag Group Register Control Register and Port Function Configuration of this IC P0 Port Group P1 Port Group P2 Port Group P3 Port Group P4 Port Group Pd Port Group Common Registers between Port Groups Universal Port Multiplexer (UPMUX) Overview Peripheral Circuit I/O Function Assignment Control Registers Pxy xz Universal Port Multiplexer Setting Register Watchdog Timer (WDT) Overview Clock Settings WDT Operating Clock Clock Supply in DEBUG Mode Operations WDT Control Operations in HALT and SLEEP Modes Control Registers WDT Clock Control Register WDT Control Register Real-Time Clock (RTCA) Overview Output Pin and External Connection Output Pin Clock Settings RTCA Operating Clock Theoretical Regulation Function Operations RTCA Control Real-Time Clock Counter Operations Stopwatch Control Stopwatch Count-up Pattern Interrupts S1C17W14/W16 Technical Manual Seiko Epson Corporation v

8 CONTENTS 9.6 Control Registers RTC Control Register RTC Second Alarm Register RTC Hour/Minute Alarm Register RTC Stopwatch Control Register RTC Second/1Hz Register RTC Hour/Minute Register RTC Month/Day Register RTC Year/Week Register RTC Interrupt Flag Register RTC Interrupt Enable Register Supply Voltage Detector (SVD) Overview Input Pin and External Connection Input Pin External Connection Clock Settings SVD Operating Clock Clock Supply in SLEEP Mode Clock Supply in DEBUG Mode Operations SVD Control SVD Operations SVD Interrupt and Reset SVD Interrupt SVD Reset Control Registers SVD Clock Control Register SVD Control Register SVD Status and Interrupt Flag Register SVD Interrupt Enable Register bit Timers (T16) Overview Input Pin Clock Settings T16 Operating Clock Clock Supply in SLEEP Mode Clock Supply in DEBUG Mode Event Counter Clock Operations Initialization Counter Underflow Operations in Repeat Mode Operations in One-shot Mode Counter Value Read Interrupt Control Registers T16 Ch.n Clock Control Register T16 Ch.n Mode Register T16 Ch.n Control Register T16 Ch.n Reload Data Register T16 Ch.n Counter Data Register T16 Ch.n Interrupt Flag Register vi Seiko Epson Corporation S1C17W14/W16 Technical Manual

9 CONTENTS T16 Ch.n Interrupt Enable Register UART (UART) Overview Input/Output Pins and External Connections List of Input/Output Pins External Connections Input Pin Pull-Up Function Output Pin Open-Drain Output Function Clock Settings UART Operating Clock Clock Supply in SLEEP Mode Clock Supply in DEBUG Mode Baud Rate Generator Data Format Operations Initialization Data Transmission Data Reception IrDA Interface Receive Errors Framing Error Parity Error Overrun Error Interrupts Control Registers UART Ch.n Clock Control Register UART Ch.n Mode Register UART Ch.n Baud Rate Register UART Ch.n Control Register UART Ch.n Transmit Data Register UART Ch.n Receive Data Register UART Ch.n Status and Interrupt Flag Register UART Ch.n Interrupt Enable Register Synchronous Serial Interface (SPIA) Overview Input/Output Pins and External Connections List of Input/Output Pins External Connections Pin Functions in Master Mode and Slave Mode Input Pin Pull-Up/Pull-Down Function Clock Settings SPIA Operating Clock Clock Supply in DEBUG Mode SPI Clock (SPICLKn) Phase and Polarity Data Format Operations Initialization Data Transmission in Master Mode Data Reception in Master Mode Terminating Data Transfer in Master Mode Data Transfer in Slave Mode Terminating Data Transfer in Slave Mode S1C17W14/W16 Technical Manual Seiko Epson Corporation vii

10 CONTENTS 13.6 Interrupts Control Registers SPIA Ch.n Mode Register SPIA Ch.n Control Register SPIA Ch.n Transmit Data Register SPIA Ch.n Receive Data Register SPIA Ch.n Interrupt Flag Register SPIA Ch.n Interrupt Enable Register I 2 C (I2C) Overview Input/Output Pins and External Connections List of Input/Output Pins External Connections Clock Settings I2C Operating Clock Clock Supply in DEBUG Mode Baud Rate Generator Operations Initialization Data Transmission in Master Mode Data Reception in Master Mode bit Addressing in Master Mode Data Transmission in Slave Mode Data Reception in Slave Mode Slave Operations in 10-bit Address Mode Automatic Bus Clearing Operation Error Detection Interrupts Control Registers I2C Ch.n Clock Control Register I2C Ch.n Mode Register I2C Ch.n Baud-Rate Register I2C Ch.n Own Address Register I2C Ch.n Control Register I2C Ch.n Transmit Data Register I2C Ch.n Receive Data Register I2C Ch.n Status and Interrupt Flag Register I2C Ch.n Interrupt Enable Register bit PWM Timers (T16B) Overview Input/Output Pins Clock Settings T16B Operating Clock Clock Supply in SLEEP Mode Clock Supply in DEBUG Mode Event Counter Clock Operations Initialization Counter Block Operations Comparator/Capture Block Operations TOUT Output Control Interrupt Control Registers viii Seiko Epson Corporation S1C17W14/W16 Technical Manual

11 CONTENTS T16B Ch.n Clock Control Register T16B Ch.n Counter Control Register T16B Ch.n Max Counter Data Register T16B Ch.n Timer Counter Data Register T16B Ch.n Counter Status Register T16B Ch.n Interrupt Flag Register T16B Ch.n Interrupt Enable Register T16B Ch.n Comparator/Capture m Control Register T16B Ch.n Compare/Capture m Data Register Sound Generator (SNDA) Overview Output Pins and External Connections List of Output Pins Output Pin Drive Mode External Connections Clock Settings SNDA Operating Clock Clock Supply in SLEEP Mode Clock Supply in DEBUG Mode Operations Initialization Buzzer Output in Normal Buzzer Mode Buzzer Output in One-shot Buzzer Mode Output in Melody Mode Interrupts Control Registers SNDA Clock Control Register SNDA Select Register SNDA Control Register SNDA Data Register SNDA Interrupt Flag Register SNDA Interrupt Enable Register IR Remote Controller (REMC2) Overview Input/Output Pins and External Connections Output Pin External Connections Clock Settings REMC2 Operating Clock Clock Supply in SLEEP Mode Clock Supply in DEBUG Mode Operations Initialization Data Transmission Procedures REMO Output Waveform Continuous Data Transmission and Compare Buffers Interrupts Application Example: Driving EL Lamp Control Registers REMC2 Clock Control Register REMC2 Data Bit Counter Control Register REMC2 Data Bit Counter Register REMC2 Data Bit Active Pulse Length Register S1C17W14/W16 Technical Manual Seiko Epson Corporation ix

12 CONTENTS REMC2 Data Bit Length Register REMC2 Status and Interrupt Flag Register REMC2 Interrupt Enable Register REMC2 Carrier Waveform Register REMC2 Carrier Modulation Control Register LCD Driver (LCD8B) Overview Output Pins and External Connections List of Output Pins External Connections Clock Settings LCD8B Operating Clock Clock Supply in SLEEP Mode Clock Supply in DEBUG Mode Frame Frequency LCD Power Supply Internal Generation Mode External Voltage Application Mode External Voltage Application Mode LCD Voltage Regulator Settings LCD Voltage Booster Setting LCD Contrast Adjustment Operations Initialization Display On/Off Inverted Display Drive Duty Switching Drive Waveforms Partial Common Output Drive n-segment-line Inverse AC Drive Display Data RAM Display Area Selection Segment Pin Assignment Common Pin Assignment Interrupt Control Registers LCD8B Clock Control Register LCD8B Control Register LCD8B Timing Control Register LCD8B Timing Control Register LCD8B Power Control Register LCD8B Display Control Register LCD8B COM Pin Control Register LCD8B Interrupt Flag Register LCD8B Interrupt Enable Register R/F Converter (RFC) Overview Input/Output Pins and External Connections List of Input/Output Pins External Connections Clock Settings RFC Operating Clock Clock Supply in SLEEP Mode x Seiko Epson Corporation S1C17W14/W16 Technical Manual

13 CONTENTS Clock Supply in DEBUG Mode Operations Initialization Operating Modes RFC Counters Converting Operations and Control Procedure CR Oscillation Frequency Monitoring Function Interrupts Control Registers RFC Ch.n Clock Control Register RFC Ch.n Control Register RFC Ch.n Oscillation Trigger Register RFC Ch.n Measurement Counter Low and High Registers RFC Ch.n Time Base Counter Low and High Registers RFC Ch.n Interrupt Flag Register RFC Ch.n Interrupt Enable Register bit A/D Converter (ADC12A) Overview Input Pins and External Connections List of Input Pins External Connections Clock Settings ADC12A Operating Clock Sampling Time Operations Initialization Conversion Start Trigger Source Conversion Mode and Analog Input Pin Settings A/D Conversion Operations and Control Procedures Interrupts Control Registers ADC12A Ch.n Control Register ADC12A Ch.n Trigger/Analog Input Select Register ADC12A Ch.n Configuration Register ADC12A Ch.n Interrupt Flag Register ADC12A Ch.n Interrupt Enable Register ADC12A Ch.n Result Register m Multiplier/Divider (COPRO2) Overview Operation Mode and Output Mode Multiplication Division MAC Reading Operation Results Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions Current Consumption System Reset Controller (SRC) Characteristics Clock Generator (CLG) Characteristics Flash Memory Characteristics S1C17W14/W16 Technical Manual Seiko Epson Corporation xi

14 CONTENTS 22.7 Input/Output Port (PPORT) Characteristics Supply Voltage Detector (SVD) Characteristics UART (UART) Characteristics Synchronous Serial Interface (SPIA) Characteristics I 2 C (I2C) Characteristics LCD Driver (LCD8B) Characteristics R/F Converter (RFC) Characteristics bit A/D Converter (ADC12A) Characteristics Basic External Connection Diagram Package Appendix A List of Peripheral Circuit Control Registers... AP-A-1 0x4000 0x4008 Misc Registers (MISC)... AP-A-1 0x4020 0x4026 Power Generator (PWG2)... AP-A-1 0x4040 0x4050 Clock Generator (CLG)... AP-A-1 0x4080 0x4096 Interrupt Controller (ITC)... AP-A-3 0x40a0 0x40a2 Watchdog Timer (WDT)... AP-A-4 0x40c0 0x40d2 Real-time Clock (RTCA)... AP-A-4 0x4100 0x4106 Supply Voltage Detector (SVD)... AP-A-6 0x4160 0x416c 16-bit Timer (T16) Ch.0... AP-A-6 0x41b0 Flash Controller (FLASHC)... AP-A-7 0x4200 0x42e2 I/O Ports (PPORT)... AP-A-7 0x4300 0x431e Universal Port Multiplexer (UPMUX)... AP-A-11 0x4380 0x438e UART (UART) Ch.0... AP-A-13 0x43a0 0x43ac 16-bit Timer (T16) Ch.1... AP-A-14 0x43b0 0x43ba Synchronous Serial Interface (SPIA) Ch.0... AP-A-15 0x43c0 0x43d2 I 2 C (I2C)... AP-A-15 0x5000 0x501a 16-bit PWM Timer (T16B) Ch.0... AP-A-16 0x5040 0x505a 16-bit PWM Timer (T16B) Ch.1... AP-A-18 0x5200 0x520e UART (UART) Ch.1... AP-A-19 0x5260 0x526c 16-bit Timer (T16) Ch.2... AP-A-20 0x5270 0x527a Synchronous Serial Interface (SPIA) Ch.1... AP-A-21 0x5280 0x528c 16-bit Timer (T16) Ch.3 (S1C17W16 only)... AP-A-21 0x5290 0x529a Synchronous Serial Interface (SPIA) Ch.2 (S1C17W16 only)... AP-A-22 0x5300 0x530a Sound Generator (SNDA)... AP-A-23 0x5320 0x5332 IR Remote Controller (REMC2)... AP-A-23 0x5400 0x5412 LCD Driver (LCD8B)... AP-A-24 0x5440 0x5450 R/F Converter (RFC) Ch.0... AP-A-25 0x5460 0x5470 R/F Converter (RFC) Ch.1 (S1C17W16 only)... AP-A-26 0x5480 0x548c 16-bit Timer (T16) Ch.4 (S1C17W16 only)... AP-A-27 0x54a2 0x54b2 12-bit A/D Converter (ADC12A) (S1C17W16 only)... AP-A-28 0xffff90 Debugger (DBG)... AP-A-29 Appendix B Power Saving... AP-B-1 B.1 Operating Status Configuration Examples for Power Saving... AP-B-1 B.2 Other Power Saving Methods... AP-B-2 Appendix C Mounting Precautions... AP-C-1 Appendix D Measures Against Noise... AP-D-1 Appendix E Initialization Routine... AP-E-1 Revision History xii Seiko Epson Corporation S1C17W14/W16 Technical Manual

15 1 OVERVIEW 1 Overview The S1C17W14/W16 is a 16-bit MCU that features low-voltage operation from 1.2 V even though Flash memory is included. The embedded high-efficiency DC-DC converter generates the constant-voltage to drive the IC with lower power consumption than 4-bit MCUs. This IC includes a real-time clock, a stopwatch, an LCD driver, and a PWM timer capable of being used to generate drive waveforms for a motor driver as well as a high-performance 16-bit CPU. It is suitable for battery-driven applications that require an LCD display and timers. 1.1 Features Table Features Model S1C17W14 S1C17W16 CPU CPU core Seiko Epson original 16-bit RISC CPU core S1C17 Other On-chip debugger Embedded Flash memory Capacity 48K bytes (for both instructions and data) 64K bytes (for both instructions and data) Erase/program count 50 times (min.) * Programming by the debugging tool ICDmini Other Security function to protect from reading/programming by ICDmini On-board programming function using ICDmini Embedded RAM Capacity 4K bytes 8K bytes Embedded display RAM Capacity 108 bytes 120 bytes Clock generator (CLG) System clock source 4 sources (IOSC/OSC1/OSC3/EXOSC) System clock frequency (operating frequency) 1.1 MHz (max.) VDD = 1.2 to 1.6 V 4.2 MHz (max.) VDD = 1.6 to 3.6 V IOSC oscillator circuit (boot clock source) 700 khz (typ.) embedded oscillator 23 µs (max.) starting time (time from cancelation of SLEEP state to vector table read by the CPU) OSC1 oscillator circuit khz (typ.) crystal oscillator Oscillation stop detection circuit included OSC3 oscillator circuit 4.2 MHz (max.) crystal/ceramic oscillator 250, 384, 500 khz, 1, 2, and 4 MHz-switchable embedded oscillator 2.1 MHz (max.) CR oscillator (an external R is required) EXOSC clock input 4.2 MHz (max.) square or sine wave input Other Configurable system clock division ratio Configurable system clock used at wake up from SLEEP state Operating clock frequency for the CPU and all peripheral circuits is selectable. I/O port (PPORT) Number of general-purpose I/O ports Input/output port: 32 bits (max.) Input/output port: 39 bits (max.) Output port: 1 bit (max.) Pins are shared with the peripheral I/O. Number of input interrupt ports 28 bits 35 bits Number of ports that support universal port 24 bits 30 bits multiplexer (UPMUX) A peripheral circuit I/O function selected via software can be assigned to each port. Timers Watchdog timer (WDT) Generates watchdog timer reset. Real-time clock (RTCA) Hz counter, second/minute/hour/day/day of the week/month/year counters Theoretical regulation function for 1-second correction Alarm and stopwatch functions 16-bit timer (T16) 3 channels 5 channels Generates the SPIA master clock. Generates the SPIA master clocks and the ADC12A trigger signal. 16-bit PWM timer (T16B) 2 channels Event counter/capture function PWM waveform generation function Number of PWM output or capture input ports: 2 ports/channel Supply voltage detector (SVD) Detection level 30 levels (1.2 to 3.6 V) Detection accuracy ±3 % Other Intermittent operation mode Generates an interrupt or reset according to the detection level evaluation. S1C17W14/W16 Technical Manual Seiko Epson Corporation 1-1

16 1 OVERVIEW Serial interfaces UART (UART) 2 channels Baud-rate generator included, IrDA1.0 supported Synchronous Serial Interface (SPIA) 2 channels 3 channels 2 to 16-bit variable data length The 16-bit timer (T16) can be used for the baud-rate generator in master mode. I 2 C (I2C) 1 channel Baud-rate generator included Sound generator (SNDA) Buzzer output function 512 Hz to 16 khz output frequencies One-shot output function Melody generation function Pitch: 128 Hz to 16 khz C3 to C6 Duration: 7 notes/rests (Half note/rest to thirty-second note/rest) Tempo: 16 tempos (30 to 480) Tie/slur may be specified. IR remote controller (REMC2) Number of transmitter channels 1 channel Other EL lamp drive waveform can be generated for an application example. LCD driver (LCD8B) LCD output LCD contrast Other R/F converter (RFC) Conversion method Number of conversion channels Supported sensors 50 SEG 5 8 COM (max.), 56 SEG 5 8 COM (max.), 54 SEG 1 4 COM (max.) 60 SEG 1 4 COM (max.) 16 levels 1/3 bias power supply included, external voltage can be applied. CR oscillation type with 24-bit counters 1 channel (Up to two sensors can be connected.) connected to each channel.) 2 channels (Up to two sensors can be DC-bias resistive sensors, DC-bias resistive sensors, AC-bias resistive sensors AC-bias resistive sensors (Ch.0 only) 12-bit A/D converter (ADC12A) Conversion method Successive approximation type Resolution 12 bits Number of conversion channels 1 channel Number of analog signal inputs 4 ports/channel Multiplier/divider (COPRO2) Arithmetic functions Reset #RESET pin Power-on reset Key entry reset Watchdog timer reset Supply voltage detector reset Interrupt Non-maskable interrupt Programmable interrupt 16-bit 16-bit multiplier 16-bit 16-bit + 32-bit multiply and accumulation unit 32-bit 32-bit divider Reset when the reset pin is set to low. Reset at power on. Reset when the P00 to P01/P02/P03 keys are pressed simultaneously (can be enabled/disabled using a register). Reset when the watchdog timer overflows (can be enabled/disabled using a register). Reset when the supply voltage detector detects the set voltage level (can be enabled/ disabled using a register). 4 systems (Reset, address misaligned interrupt, debug, NMI) External interrupt: 1 system (8 levels) Internal interrupt: 18 systems (8 levels) Internal interrupt: 23 systems (8 levels) Power supply voltage VDD operating voltage 1.2 to 3.6 V VDD operating voltage for Flash programming 1.8 to 3.6 V (VPP = 7.5 V external power supply is required.) VDD operating voltage for super economy mode 2.5 to 3.6 V Operating temperature Operating temperature range -40 to 85 C Current consumption (Typ. value) SLEEP mode 0.15 µa IOSC = OFF, OSC1 = OFF, OSC3 = OFF HALT mode 0.5 µa OSC1 = 32 khz, RTC = ON 0.3 µa OSC1 = 32 khz, RTC = ON, super economy mode RUN mode 6 µa OSC1 = 32 khz, RTC = ON, CPU = OSC1 3 µa OSC1 = 32 khz, RTC = ON, CPU = OSC1, super economy mode 1-2 Seiko Epson Corporation S1C17W14/W16 Technical Manual

17 1 OVERVIEW Current consumption (Typ. value) RUN mode 200 µa OSC3 = 1 MHz (ceramic oscillator), OSC1 = 32 khz, RTC = ON, CPU = OSC3 Shipping form 1 QFP15-100pin (Lead pitch: 0.5 mm) TQFP15-128pin (Lead pitch: 0.4 mm) 2 Die form (Pad pitch: 80 µm (min.)) 1.2 Block Diagram S1C17W14 Coprocessor bus Multiplier/divider (COPRO2) DCLK DSIO DST2 CPU core & debugger (S1C17) 32-bit RAM bus Internal RAM 4K bytes Instruction bus Flash memory 48K bytes VPP System clock Interrupt request 16-bit internal bus Interrupt signal FOUT OSC1 OSC2 OSC3 OSC4 EXOSC #RESET VDD VSS VD1 VD2 CV1 CV2 Clock generator (CLG) IOSC oscillator OSC1 oscillator OSC3 oscillator EXOSC input circuit System reset controller (SRC) Power-on reset (POR) Power generator (PWG2) Interrupt controller (ITC) I/O port (PPORT) Watchdog timer (WDT) Real-time clock (RTCA) Supply voltage detector (SVD) 16-bit timer (T16) 3 Ch. 16-bit PWM timer (T16B) 2 Ch. P00 07 P10 17 P30 37 P40 43 PD0 D1 PD3 D4 PD2 RTC1S EXSVD TOUT00 01 TOUT10 11 CAP00 01 CAP10 11 EXCL00 01 EXCL10 11 UART (UART) 2 Ch. Synchronous serial interface (SPIA) 2 Ch. I2C (I2C) 1 Ch. R/F converter (RFC) 1 Ch. LCD driver (LCD8B) Display RAM 108 bytes Sound generator (SNDA) IR remote controller (REMC2) 1 Ch. USIN0 1 USOUT0 1 SDI0 1 SDO0 1 SPICLK0 1 #SPISS0 1 SDA0 SCL0 RFIN0 REF0 SENA0 SENB0 RFCLKO0 VC1 3 CP1 2 COM0 3(7) SEG0(4) 53 LFRO BZOUT #BZOUT REMO CLPLS Figure S1C17W14 Block Diagram S1C17W14/W16 Technical Manual Seiko Epson Corporation 1-3

18 1 OVERVIEW S1C17W16 Coprocessor bus Multiplier/divider (COPRO2) DCLK DSIO DST2 CPU core & debugger (S1C17) 32-bit RAM bus Internal RAM 8K bytes Instruction bus Flash memory 64K bytes VPP System clock Interrupt request 16-bit internal bus Interrupt signal FOUT OSC1 OSC2 OSC3 OSC4 EXOSC #RESET VDD VSS VD1 VD2 CV1 CV2 Clock generator (CLG) IOSC oscillator OSC1 oscillator OSC3 oscillator EXOSC input circuit System reset controller (SRC) Power-on reset (POR) Power generator (PWG2) Interrupt controller (ITC) I/O port (PPORT) Watchdog timer (WDT) Real-time clock (RTCA) Supply voltage detector (SVD) 16-bit timer (T16) 5 Ch. 16-bit PWM timer (T16B) 2 Ch. P00 07 P10 17 P20 25 P30 37 P40 44 PD0 D1 PD3 D4 PD2 RTC1S EXSVD TOUT00 01 TOUT10 11 CAP00 01 CAP10 11 EXCL00 01 EXCL10 11 UART (UART) 2 Ch. Synchronous serial interface (SPIA) 3 Ch. I2C (I2C) 1 Ch. R/F converter (RFC) 2 Ch. LCD driver (LCD8B) Display RAM 120 bytes Sound generator (SNDA) IR remote controller (REMC2) 1 Ch. USIN0 1 USOUT0 1 SDI0 2 SDO0 2 SPICLK0 2 #SPISS0 2 SDA0 SCL0 RFIN0 1 REF0 1 SENA0 1 SENB0 1 RFCLKO0 1 VC1 3 CP1 2 COM0 3(7) SEG0(4) 59 LFRO BZOUT #BZOUT REMO CLPLS 12-bit A/D converter (ADC12A) 1 Ch. ADIN00 03 VREFA0 #ADTRG0 Figure S1C17W16 Block Diagram 1-4 Seiko Epson Corporation S1C17W14/W16 Technical Manual

19 1 OVERVIEW S1C17W14/W16 Technical Manual Seiko Epson Corporation Pins Pin Configuration Diagram (Package) S1C17W14 (QFP15-100pin) VC1 VC2 VC3 VSS SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 COM7 COM6 COM5 COM4 COM3 VC1 VC2 VC3 VSS SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 COM7/SEG3 COM6/SEG2 COM5/SEG1 COM4/SEG0 COM Pin name SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 VDD CP1 CP2 Port function or signal assignment SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 VDD CP1 CP2 P43 N.C. P42 P41 P40 P37 P36 P35 P34 P33 P32 P31 P30 N.C. P17 P16 P15 P14 P13 P12 PD4 PD3 VD1 CV2 CV1 P43/SEG42 N.C. P42/SEG43 P41/SEG44 P40/SEG45 P37/UPMUX/SEG46 P36/LFRO/UPMUX/SEG47 P35/RTC1S/UPMUX/SEG48 P34/FOUT/UPMUX/SEG49 P33/UPMUX/SEG50 P32/UPMUX/SEG51 P31/UPMUX/SEG52 P30/RFCLKO0/UPMUX/SEG53 N.C. P17/CLPLS/UPMUX P16/REMO/UPMUX P15/UPMUX P14/UPMUX P13/EXCL11/UPMUX P12/EXCL10/UPMUX PD4/OSC4 PD3/OSC3 VD1 CV2 CV1 VD2 VDD VSS #RESET N.C. OSC1 OSC2 P11 P10 P07 P06 P05 P04 P03 P02 P01 P00 PD2 PD1 PD0 VPP COM0 COM1 N.C. COM2 VD2 VDD VSS #RESET N.C. OSC1 OSC2 P11/UPMUX/EXSVD P10/EXOSC/UPMUX P07/#BZOUT/UPMUX P06/BZOUT/UPMUX P05/EXCL01/UPMUX P04/EXCL00/UPMUX P03/RFIN0/UPMUX P02/REF0/UPMUX P01/SENA0/UPMUX P00/SENB0/UPMUX DCLK/PD2 DSIO/PD1 DST2/PD0 VPP COM0 COM1 N.C. COM2 Figure S1C17W14 Pin Configuration Diagram (QFP15-100pin)

20 1 OVERVIEW 1-6 Seiko Epson Corporation S1C17W14/W16 Technical Manual S1C17W16 (TQFP15-128pin) N.C. VC1 VC2 VC3 VSS SEG22 SEG21 N.C. SEG20 SEG19 SEG18 N.C. SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 N.C. COM7 COM6 COM5 COM4 COM3 N.C. VC1 VC2 VC3 VSS SEG22 SEG21 N.C. SEG20 SEG19 SEG18 N.C. SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 N.C. COM7/SEG3 COM6/SEG2 COM5/SEG1 COM4/SEG0 COM3 N.C. P44 P43 P42 P41 P40 N.C. P37 P36 P35 P34 P33 P32 N.C. P31 P30 P25 P24 P23 P22 P21 P20 P17 P16 P15 N.C. PD4 PD3 VD1 CV2 CV1 N.C. N.C. P44/SEG47 P43/RFIN1/SEG48 P42/REF1/SEG49 P41/SENA1/SEG50 P40/SENB1/SEG51 N.C. P37/UPMUX/SEG52 P36/LFRO/UPMUX/SEG53 P35/RTC1S/UPMUX/SEG54 P34/FOUT/UPMUX/SEG55 P33/UPMUX/SEG56 P32/UPMUX/SEG57 N.C. P31/RFCLKO1/UPMUX/SEG58 P30/RFCLKO0/UPMUX/SEG59 P25/UPMUX/ADIN03 P24/UPMUX/ADIN02 P23/UPMUX/ADIN01 P22/UPMUX/ADIN00 P21/UPMUX/VREFA0 P20/#ADTRG0/UPMUX P17/CLPLS/UPMUX P16/REMO/UPMUX P15/UPMUX N.C. PD4/OSC4 PD3/OSC3 VD1 CV2 CV1 N.C N.C. VD2 VDD VSS #RESET OSC1 N.C. OSC2 P14 P13 P12 P11 P10 N.C. P07 P06 P05 P04 P03 N.C. P02 P01 P00 PD2 PD1 N.C. PD0 VPP COM0 COM1 COM2 N.C. N.C. VD2 VDD VSS #RESET OSC1 N.C. OSC2 P14/UPMUX P13/EXCL11/UPMUX P12/EXCL10/UPMUX P11/UPMUX/EXSVD P10/EXOSC/UPMUX N.C. P07/#BZOUT/UPMUX P06/BZOUT/UPMUX P05/EXCL01/UPMUX P04/EXCL00/UPMUX P03/RFIN0/UPMUX N.C. P02/REF0/UPMUX P01/SENA0/UPMUX P00/SENB0/UPMUX DCLK/PD2 DSIO/PD1 N.C. DST2/PD0 VPP COM0 COM1 COM2 N.C. Pin name N.C. SEG46 SEG45 SEG44 SEG43 SEG42 N.C. SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 N.C. SEG27 SEG26 SEG25 SEG24 N.C. SEG23 VDD CP1 CP2 N.C. Port function or signal assignment N.C. SEG46 SEG45 SEG44 SEG43 SEG42 N.C. SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 N.C. SEG27 SEG26 SEG25 SEG24 N.C. SEG23 VDD CP1 CP2 N.C. Figure S1C17W16 Pin Configuration Diagram (TQFP15-128pin)

21 1 OVERVIEW Pad Configuration Diagram (Chip) S1C17W VD2 VDD VSS #RESET Y X (0, 0) mm SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 VDD CP1 CP2 VD2 VDD VSS #RESET OSC1 OSC2 P11/UPMUX/EXSVD P10/EXOSC/UPMUX P07/#BZOUT/UPMUX P06/BZOUT/UPMUX P05/EXCL01/UPMUX P04/EXCL00/UPMUX P03/RFIN0/UPMUX P02/REF0/UPMUX P01/SENA0/UPMUX P00/SENB0/UPMUX DCLK/PD2 DSIO/PD1 DST2/PD0 VPP COM0 COM1 COM2 Port function or signal assignment CV1 CV2 VD1 PD3/OSC3 PD4/OSC4 P12/EXCL10/UPMUX P13/EXCL11/UPMUX P14/UPMUX P15/UPMUX P16/REMO/UPMUX P17/CLPLS/UPMUX P30/RFCLKO0/UPMUX/SEG53 P31/UPMUX/SEG52 P32/UPMUX/SEG51 P33/UPMUX/SEG50 P34/FOUT/UPMUX/SEG49 P35/RTC1S/UPMUX/SEG48 P36/LFRO/UPMUX/SEG47 P37/UPMUX/SEG46 P40/SEG45 P41/SEG44 P42/SEG43 P43/SEG42 Pad name CV1 CV2 VD1 PD3 PD4 P12 P13 P14 P15 P16 P17 P30 P31 P32 P33 P34 P35 P36 P37 P40 P41 P42 P43 OSC1 OSC2 P11 P10 P07 P06 P05 P04 P03 P02 P01 P00 PD2 PD1 PD0 VPP COM0 COM1 COM2 Die No. CJxxxxxxx COM3 COM4 COM5 COM6 COM7 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 VSS VC3 VC2 VC1 COM3 COM4/SEG0 COM5/SEG1 COM6/SEG2 COM7/SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 VSS VC3 VC2 VC1 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 VDD CP1 CP mm Figure S1C17W14 Pad Configuration Diagram (Chip) Pad opening No. 1 25, 51 73: X = 68 µm, Y = 80 µm No , 74 96: X = 80 µm, Y = 68 µm Chip thickness 400 µm S1C17W14/W16 Technical Manual Seiko Epson Corporation 1-7

22 1 OVERVIEW Table S1C17W14 Pad Coordinates No. X µm Y µm No. X µm Y µm No. X µm Y µm No. X µm Y µm 1-1, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Seiko Epson Corporation S1C17W14/W16 Technical Manual

23 1 OVERVIEW S1C17W Y X (0, 0) VC1 VC2 VC3 VSS SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 COM7/SEG3 COM6/SEG2 COM5/SEG1 COM4/SEG0 COM3 VC1 VC2 VC3 VSS SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 COM7 COM6 COM5 COM mm COM3 P44/SEG47 P43/RFIN1/SEG48 P42/REF1/SEG49 P41/SENA1/SEG50 P40/SENB1/SEG51 P37/UPMUX/SEG52 P36/LFRO/UPMUX/SEG53 P35/RTC1S/UPMUX/SEG54 P34/FOUT/UPMUX/SEG55 P33/UPMUX/SEG56 P32/UPMUX/SEG57 P31/RFCLKO1/UPMUX/SEG58 P30/RFCLKO0/UPMUX/SEG59 P25/UPMUX/ADIN03 P24/UPMUX/ADIN02 P23/UPMUX/ADIN01 P22/UPMUX/ADIN00 P21/UPMUX/VREFA0 P20/#ADTRG0/UPMUX P17/CLPLS/UPMUX P16/REMO/UPMUX P15/UPMUX PD4/OSC4 PD3/OSC3 VD1 CV2 CV1 Port function or signal assignment SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 VDD CP1 CP2 Pad name SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 VDD CP1 CP2 P44 P43 P42 P41 P40 P37 P36 P35 P34 P33 P32 P31 P30 P25 P24 P23 P22 P21 P20 P17 P16 P15 PD4 PD3 VD1 Die No. CJxxxxx CV2 CV1 VD2 VDD VSS #RESET OSC1 OSC2 P14 P13 P12 P11 P10 P07 P06 P05 P04 P03 P02 P01 P00 PD2 PD1 PD0 VPP COM0 COM1 COM2 VD2 VDD VSS #RESET OSC1 OSC2 P14/UPMUX P13/EXCL11/UPMUX P12/EXCL10/UPMUX P11/UPMUX/EXSVD P10/EXOSC/UPMUX P07/#BZOUT/UPMUX P06/BZOUT/UPMUX P05/EXCL01/UPMUX P04/EXCL00/UPMUX P03/RFIN0/UPMUX P02/REF0/UPMUX P01/SENA0/UPMUX P00/SENB0/UPMUX DCLK/PD2 DSIO/PD1 DST2/PD0 VPP COM0 COM1 COM mm Figure S1C17W16 Pad Configuration Diagram (Chip) Pad opening No. 1 28, 55 81: X = 68 µm, Y = 80 µm No , : X = 80 µm, Y = 68 µm Chip thickness 400 µm S1C17W14/W16 Technical Manual Seiko Epson Corporation 1-9

24 1 OVERVIEW Table S1C17W16 Pad Coordinates No. X µm Y µm No. X µm Y µm No. X µm Y µm No. X µm Y µm 1-1, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Pin Descriptions Symbol meanings Assigned signal: The signal listed at the top of each pin is assigned in the initial state. The pin function must be switched via software to assign another signal (see the I/O Ports chapter). I/O: I = Input O = Output I/O = Input/output P = Power supply A = Analog signal Hi-Z = High impedance state Initial state: I (Pull-up) = Input with pulled up I (Pull-down) = Input with pulled down Hi-Z = High impedance state O (H) = High level output O (L) = Low level output Tolerant fail-safe structure: Pin/pad name Assigned signal I/O = Over voltage tolerant fail-safe type I/O cell included (see the I/O Ports chapter) Initial state Table Pin description Tolerant fail-safe structure Function S1C17W14 S1C17W16 VDD VDD P Power supply (+) VSS VSS P GND VPP VPP P Power supply for Flash programming VD1 VD1 A DC-DC converter output VD2 VD2 A DC-DC converter stabilization capacitor connect pin CV1 2 CV1 2 A DC-DC converter charge pump capacitor connect pins VC1 3 VC1 3 P LCD panel driver power supply 1-10 Seiko Epson Corporation S1C17W14/W16 Technical Manual

25 1 OVERVIEW Pin/pad name Assigned signal I/O Initial state Tolerant fail-safe structure Function S1C17W14 S1C17W16 CP1 2 CP1 2 A LCD power supply booster capacitor connect pins OSC1 OSC1 A OSC1 oscillator circuit input OSC2 OSC2 A OSC1 oscillator circuit output #RESET #RESET I I (Pull-up) Reset input P00 P00 I/O Hi-Z I/O port SENB0 A R/F converter Ch.0 sensor B oscillator pin UPMUX I/O User-selected I/O (universal port multiplexer) P01 P01 I/O Hi-Z I/O port SENA0 A R/F converter Ch.0 sensor A oscillator pin UPMUX I/O User-selected I/O (universal port multiplexer) P02 P02 I/O Hi-Z I/O port REF0 A R/F converter Ch.0 reference oscillator pin UPMUX I/O User-selected I/O (universal port multiplexer) P03 P03 I/O Hi-Z I/O port RFIN0 A R/F converter Ch.0 oscillation input UPMUX I/O User-selected I/O (universal port multiplexer) P04 P04 I/O Hi-Z I/O port EXCL00 I 16-bit PWM timer Ch.0 event counter input 0 UPMUX I/O User-selected I/O (universal port multiplexer) P05 P05 I/O Hi-Z I/O port EXCL01 I 16-bit PWM timer Ch.0 event counter input 1 UPMUX I/O User-selected I/O (universal port multiplexer) P06 P06 I/O Hi-Z I/O port BZOUT O Sound generator output UPMUX I/O User-selected I/O (universal port multiplexer) P07 P07 I/O Hi-Z I/O port #BZOUT O Sound generator inverted output UPMUX I/O User-selected I/O (universal port multiplexer) P10 P10 I/O Hi-Z I/O port EXOSC I Clock generator external clock input UPMUX I/O User-selected I/O (universal port multiplexer) P11 P11 I/O Hi-Z I/O port UPMUX I/O User-selected I/O (universal port multiplexer) EXSVD A External power supply voltage detection input P12 P12 I/O Hi-Z I/O port EXCL10 I 16-bit PWM timer Ch.1 event counter input 0 UPMUX I/O User-selected I/O (universal port multiplexer) P13 P13 I/O Hi-Z I/O port EXCL11 I 16-bit PWM timer Ch.1 event counter input 1 UPMUX I/O User-selected I/O (universal port multiplexer) P14 P14 I/O Hi-Z I/O port UPMUX I/O User-selected I/O (universal port multiplexer) P15 P15 I/O Hi-Z I/O port UPMUX I/O User-selected I/O (universal port multiplexer) P16 P16 I/O Hi-Z I/O port REMO O IR remote controller transmit data output UPMUX I/O User-selected I/O (universal port multiplexer) P17 P17 I/O Hi-Z I/O port CLPLS O IR remote controller clear pulse output UPMUX I/O User-selected I/O (universal port multiplexer) P20 P20 I/O Hi-Z I/O port #ADTRG0 I 12-bit A/D converter Ch.0 trigger input UPMUX I/O User-selected I/O (universal port multiplexer) P21 P21 I/O Hi-Z I/O port UPMUX I/O User-selected I/O (universal port multiplexer) VREFA0 A 12-bit A/D converter Ch.0 reference voltage input P22 P22 I/O Hi-Z I/O port UPMUX I/O User-selected I/O (universal port multiplexer) ADIN00 A 12-bit A/D converter Ch.0 analog signal input 0 S1C17W14/W16 Technical Manual Seiko Epson Corporation 1-11