TFT LCD Display Datasheet

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1 NMLCD LVDS-CTP-SB REV 1.4 February 20, 2017 Uncontrolled Copy when printed or downloaded For the latest version of this document, see

2 Revision History REVISION DATE COMMENT REMARKS Initial Release Internal Draft Version Formatting Changes Initial Public Release Modify the drawing and absolute maximum ratings Modify the drawing and absolute maximum ratings Modify the drawing Modify the drawing Change electrical parameters Change electrical parameters Table of Contents 1. General Specifications TFT LCD Drawing Absolute Maximum Ratings Electrical Characteristics Electro-Optical Characteristics Backlight Characteristics Interface Descriptions LCD Interface CTP Interface LCD Timing Details Timing Chart Timing Characteristic SY Mode Timing Diagram SY-DE Mode Timing Diagram Reset Timing Power-on Sequence Power-off Sequence Reliability Test Page 02 of 14

3 1. General Specifications is a colour active matrix LCD module incorporating amorphous silicon TFT (Thin Film Transistor). It is composed of a Capacitive Touch Panel (CTP), a colour TFT-LCD panel, driver IC, FPC and a back light unit. The module display area contains 800 x 480 pixels. This product accords with RoHS environmental criterion. ITEM CONTENTS UNIT LCD Type TFT / Transmissive / Normally white Size 7 Inch Viewing Direction 12:00 (without image inversion) O'Clock Gray Scale Inversion Direction 6:00 O'Clock LCD+CTP (W H D) x x7.83 mm Active Area (W H) mm Dot Pitch (W H) mm Number of Dots (Pixels) 800 (RGB) 480 Driver IC - Backlight Type 27 LEDs Surface Luminance 850 (typical) cd/m 2 Interface Type LVDS Color Depth 16.7M Pixel Arrangement RGB Vertical Stripe Surface Treatment AG Input Voltage 3.3 V With/Without TSP With Touch Panel (CTP) Weight - g Note 1: RoHS compliant Note 2: LCD weight tolerance: ± 5%. Part Number Details: NMLCD panadisplay LCD Display 7 inch, 800 x 480 Resolution LVDS LVDS Interface CTP Capacitive Touch SB Super Bright (High Brightness Model) Page 03 of 14

4 2. TFT LCD Drawing A B C D 1 *100.00±0.20 *89.79 (Bezel open) 2017-panadisplay *7.43 *2.62 (3.91) (85.92) AA *88.50±0.20 LENS VA (47.75) (9.29) TK (80.95) ±0.5 LED circuit Component area PIN NO. SYMBOL *164.90±0.20 * (Bezel open) (154.08) AA *153.90±0.20 LENS VA 7" TFT 800(RGB)*480 K A 1 40 W=0.30 P0.5*(40-1)= (71.11) (75.23) MAX PI+FPC T=*0.30±0.20 *7.83±0.20 *5.70±0.20 *0.30±0.20±0.03(Include PI) LABEL Page 04 of TAPE A K *109.34±0.20±0.5 Jimbo Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 RST VCC INT SDA SCL VCOM DVDD DVDD RESET STBYB LVDS_D0+ LVDS_D1+ LVDS_D2+ A LVDS_CLK+ B LED- LVDS_D0- LVDS_D1- LVDS_D2- LVDS_CLK- LVDS_D3- LVDS_D3+ AVDD LED- LED- L/R U/D VGL VGH LED+ LED+ C D

5 3. Absolute Maximum Ratings PARAMETER SYMBOL MIN MAX UNIT Supply Voltage for LCD Logic VDD/VCC V Supply Voltage for CTP Logic VDD/VCC-VSS - - V Input Voltage for Logic VIN VSS-0.5 VDD V LED forward voltage (each LED) IF - 25 ma Operating Temperature TOP C Storage Temperature TST C Humidity RH - 90% (Max 60 C) RH 4. Electrical Characteristics PARAMETER SYMBOL MIN TYP MAX UNIT Power Voltage VDD/DCC V Input Current IVDD ma Input Voltage H Level VIH 0.7 VDD - VDD V Input Voltage L Level VIL VDD V Positive Power for TFT VGH V Negative Power for TFT VGL V Analog Power AVDD V Common Voltage VCOM V 5. Electro-Optical Characteristics ITEM SYM CONDITION MIN TYP MAX UNIT REMARK Response Time Tr+Tf θ= ms Figure 1 (4) Contrast Ratio Cr Figure 2 (1) Luminance Uniformity δ WHITE = % Figure 2 (3) Surface Luminance Lv cd/m 2 Figure 2 (2) = deg Viewing Angle = deg θ Range = deg Figure 3 (6) = deg Red x y x Green θ=0 CIE (x,y) y =0 Cromacity x Blue Ta=25 y Figure 2 (5) White x y Page 05 of 14

6 6. Backlight Characteristics PARAMETER SYMBOL MIN TYP MAX UNIT Voltage for LED backlight Vl V Current for LED backlight Il ma LED Life Time Hrs Note: The LED life time is defined as the module brightness decrease to 50% original brightness at Ta=25 C. Note 1. Contrast Ratio(CR) is defined mathematically as below, for more information see Figure 1. Contrast Ratio = Average Surface Luminance with all white pixels (P1, P2, P3, P4, P5, P6, P7, P8, P9) Average Surface Luminance with all black pixels (P1, P2, P3, P4, P5, P6, P7, P8, P9) Note 2. Surface luminance is the LCD surface from the surface with all pixels displaying white. For more information, see Figure 2. Lv = Average Surface Luminance with all white pixels (P1, P2, P3, P4, P5, P6, P7, P8, P9) Note 3. The uniformity in surface luminance δ WHITE is determined by measuring luminance at each test position 1 through 5, and then dividing the maximum luminance of 5 points luminance by minimum luminance of 5 points luminance. For more information, see Figure 2. Minimum Surface Luminance with all white pixels (P1, P2, P3, P4, P5, P6, P7, P8, P9) δ WHITE = Maximum Surface Luminance with all white pixels (P1, P2, P3, P4, P5, P6, P7, P8, P9) Note 4. Response time is the time required for the display to transition from white to black (Rise Time, Tr) and from black to white (Decay Time, Tf). For additional information see FIG 1. The test equipment is Autronic- Melchers ConoScope series. Note 5. CIE (x, y) chromaticity, the x, y value is determined by measuring luminance at each test position 1 through 5, and then make average value. Note 6. Viewing angle is the angle at which the contrast ratio is greater than 2. For TFT module the contrast ratio is greater than 10. The angles are determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which is normal to the LCD surface. For more information, see Figure3. Note 7. For viewing angle and response time testing, the testing data is based on Autronic-Melchers ConoScope series. Instruments for Contrast Ratio, Surface Luminance, Luminance Uniformity, CIE the test data is based on TOPCONs BM-5 photo detector. Page 06 of 14

7 Figure 1. The definition of response time Figure 2. Measuring method for Contrast ratio, surface luminance, Luminance uniformity, CIE (x, y) chromaticity igure 3. The definition of viewing angle F Page 07 of 14

8 7. Interface Descriptions 7.1. LCD Interface PIN NO. SYMBOL DESCRIPTION REMARK 1 VCOM Common Voltage 2 DVDD Power Supply (3.3V) 3 DVDD Power Supply (3.3V) 4 No Connect 5 RESET Reset Signal Input pin 6 STBYB Standby mode, normally pull high 7 Ground 8 LVDS_D0- LVDS differential data input D0-9 LVDS_D0+ LVDS differential data input D0+ 10 Ground 11 LVDS_D1- LVDS differential data input D1-12 LVDS_D1+ LVDS differential data input D1+ 13 Ground 14 LVDS_D2- LVDS differential data input D2-15 LVDS_D2+ LVDS differential data input D2+ 16 Ground 17 LVDS_CLK- LVDS differential clock input CLK- 18 LVDS_CLK+ LVDS differential clock input CLK+ 19 Ground 20 LVDS_D3- LVDS differential data input D3-21 LVDS_D3+ LVDS differential data input D3+ 22 Ground 23 No Connect 24 No Connect 25 Ground 26 No Connect 27 No Connect 28 No Connect 29 AVDD Power supply for analog circuit 30 Ground 31 LED- Cathode of LED Backlight 32 LED- Cathode of LED Backlight 33 L/R Left/Right display control Note 1 34 U/D Up/Down display control Note 1 35 VGL Negative Power for TFT 36 No Connect 37 No Connect 38 VGH Positive Power for TFT 39 LED+ Anode of LED Backlight 40 LED+ Anode of LED Backlight Page 08 of 14

9 Note 1: Left/Right, Up/Down (pins 33, pin 34) U/D L/R Scanning Direction 0 0 Up to Down, Right to Left 0 1 Up to Down, Left to Right 1 0 Down to Up, Right to Left 1 1 Down to Up, Left to Right 7.2. CTP Interface PIN No. SYMBOL DESCRIPTION REMARK 1 RST Reset pin 2 VCC Power Supply (3.3V) 3 Ground 4 INT Interrupt signal from CTP 5 SDA I2C SDA 6 SCL I2C SCL Only connected to the CTP Panel, not connected to the LCD itself The Capacitive Touch is driven by a Goodix GT911 capacitive touch driver IC, which utilizes an I2C interface, and is capable of 5-point touch. Page 09 of 14

10 8. LCD Timing Details 8.1. Timing Chart PARAMETER SYMBOL MIN TYP MAX UNIT CONDITION CLK Clock Time Tclk 1/Max(FCLK) - 1/Min(FCLK) ns - CLK Pulse Duty Tchw % TCLK HSY to CLK Thc CLK - HSY Width Thwh CLK - VSY Width Tvwh ns - HSY Period Time Th ns - VSY Set-up Time Tvst ns - VSY Hold Time Tvhd ns - HSY Setup Time Thst ns - HSY Hold Time Thhd ns - Data Set-up Time Tdsu ns D00~D23 to CLK Data Hold Time Tdhd ns D00~D23 to CLK DEN Set-up Time Tesu ns DEN to CLK Timing parameter (VDD=3.3V, =0V, Ta=25 C) Page 10 of 14

11 8.2. Timing Characteristic ITEM SYMBOL MIN TYP MAX UNIT DCLK Frequency Fclk MHz DCLK Period Tclk Ns Period Time Th DCLK Display Period Thdisp DCLK Hsync To 1st Data input Thbp DCLK By H BLANKING setting Front Porch Thfp DCLK Pulse Width Thw DCLK Period Time Tv H Display Period Tvdisp H Vsync Delay to 1st Gate output Tvbp H By V BLANKING setting Front Porch Tvfp H Pulse Width Tvw H 8.3. SY Mode Timing Diagram 8.4. SY-DE Mode Timing Diagram Page 11 of 14

12 8.5. Reset Timing PARAMETER MIN TYP MAX UNIT CONDITIONS T resb Us VDD=3.3V 8.6. Power-on Sequence Page 12 of 14

13 8.7. Power-off Sequence Note: When normally-black LC is used, please send black pattern to discharge the panel. When normally-white LC is used, please send white pattern to discharge the panel Page 13 of 14

14 9. Reliability Test No. SYMBOL TEST CONDITION REMARK 1 High Temperature Storage 2 Low Temperature Storage 3 High Temperature Operation 4 Low Temperature Operation 5 High Temperature & Humidity Operation 80 ±2 96H Restore 2H at 25 Power off -30 ±2 96H Restore 2H at 25 Power off 70 ±2 96H Power on -20 ±2 96H Power on 60 ±2 90%RH 96H Power on min 5min 30min 6 Temperature Cycle After 10 cycles, restore 2H at 25 Power off 7 Vibration Test 10Hz~150Hz, 100m/s 2, 120min 8 Shock Test Half-sinewave, 300m/s 2, 11ms After test cosmetic and electrical defects should not happen. Page 14 of 14

TFT LCD Display Datasheet

TFT LCD Display Datasheet NMLCD-7080080-CTP-CLB NMLCD-7080080-RTP NMLCD-7080080-CLB NMLCD-7080080 REV.3 28 th May 20 Uncontrolled Copy when printed or downloaded For the latest version of this document, see www.panadisplay.com