TFT LCD Display Datasheet

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NMLCD-7080080-CTP-CLB NMLCD-7080080-RTP NMLCD-7080080-CLB NMLCD-7080080 REV.

1 NMLCD CTP-CLB NMLCD RTP NMLCD CLB NMLCD REV.3 28 th May 20 Uncontrolled Copy when printed or downloaded For the latest version of this document, see

2 NMLCD (RTP/CTP)-(CLB) Revision History REVISION DTE COMMENT REMRKS.0 0/03/20 Initial Draft Initial Draft Version. 08/03/20 Initial Release Formatting Change.2 /03/20 Updated with CLB drawing/version.3 28/0/20 dd brightness and weight Table of Contents. General Specification TFT LCD Display Drawing (Non Touch Version) TFT LCD Display Drawing (Resistive Touch Version).... TFT LCD Display Drawing (Cover Lens Bezel Version Non Touch).... TFT LCD Display Drawing (Cover Lens Bezel Version With Capacitive Touch)...7. bsolute Maximum Ratings Electrical Characteristics Electro-Optical Characteristics Backlight Characteristics Interface Descriptions LCD Interface CTP Interface LCD Timing Details Timing Chart Timing Characteristic SY Mode Timing Diagram..... SY-DE Mode Timing Diagram..... Reset Timing..... Power On Sequence Power-off Sequence Reliability Test...7 Page 02of 7

3 NMLCD (RTP/CTP)-(CLB). General Specification NMLCD is a colour active matrix LCD module incorporating amorphous silicon TFT (Thin Film Transistor). It is composed of a colour TFT-LCD panel, driver IC, FPC and a back light unit and with/without a Resistive/Capacitive Touch Panel (RTP or CTP), and with/without a Cover Lens Bezel (CLB). The module display area contains 800 x 80 pixels. This product accords with RoHS environmental criterion. ITEM CONTENTS UNIT LCD Type TFT / Transmissive / Normally white Size 7.0 Inch Viewing Direction 2:00 (without image inversion) O'Clock Gray Scale Inversion Direction :00 O'Clock LCD (W H).90 x mm 3 ctive rea (W H) mm 2 Dot Pitch (W H) mm 2 Number of Dots (Pixels) 800 (RGB) 80 Driver IC Source: EK73002 Gate: EK97 Backlight Type 27 LEDs NMLCD NMLCD CLB Surface Luminance NMLCD RTP NMLCD CTP-CLB 00 (typical) 8 (typical) 2 cd/m 00 (typical) 7 (typical) Interface Type TTL Color Depth.7M Pixel rrangement RGB Vertical Stripe Surface Treatment G Input Voltage 3.3 (typical) V NMLCD Without TP NMLCD CLB Without TP, with CLB With/Without TP (Touch Panel) NMLCD RTP With Resistive Touch NMLCD CTP-CLB Capacitive Touch CLB.8 NMLCD NMLCD CLB Weight.8 NMLCD RTP CTP-CLB 87.8 NMLCD g Note : RoHS compliant Note 2: LCD weight tolerance: ± %. Part Number Details: NMLCD panadisplay LCD Display inch, 800 x 80 Resolution RTP Resistive Touch CTP Capacitive Touch CLB Cover Lens Bezel Page 03 of 7

4 NMLCD (RTP/CTP)-(CLB) 2. TFT LCD Display Drawing (Non Touch Version) B C D 0 7" TFT 800(RGB)* PIN 2 3 Page 0 of 7 Jimbo DISP HS VS DE SYMBOL LED- LED- LED+ DVDD R0 R R2 R3 R R R R7 G0 G G2 G3 G G G G7 B0 B B2 B3 B B B B7 DCLK B C D

5 NMLCD (RTP/CTP)-(CLB) 3. TFT LCD Display Drawing (Resistive Touch Version) B C D 0 7" TFT 800(RGB)* PIN 2 3 Page 0of 7 Jimbo DISP HS VS DE XR YD XL YU SYMBOL LED- LED- LED+ DVDD R0 R R2 R3 R R R R7 G0 G G2 G3 G G G G7 B0 B B2 B3 B B B B7 DCLK B C D

6 NMLCD (RTP/CTP)-(CLB). TFT LCD Display Drawing (Cover Lens Bezel Version Non Touch) B C D 0 7" TFT 800(RGB)* PIN 2 3 Page 0of 7 Jimbo DISP HS VS DE SYMBOL LED- LED- LED+ DVDD R0 R R2 R3 R R R R7 G0 G G2 G3 G G G G7 B0 B B2 B3 B B B B7 DCLK B C D

7 NMLCD (RTP/CTP)-(CLB). TFT LCD Display Drawing (Cover Lens Bezel Version With Capacitive Touch) B C D bending area 0 FPC+PI Stiffeners =0.3±0.03 Transparent window ±0.3 7" TFT 800(RGB)* PIN PIN# SSIGNMENT ±0. RST INT SD 7 SCL VDD Page 07 of 7 ±0.3 ± ±0.0 W=0.3±0.0 PICTH0.*(0-)=..±0..8±0. Jimbo DISP HS VS DE SYMBOL LED- LED- LED+ DVDD R0 R R2 R3 R R R R7 G0 G G2 G3 G G G G7 B0 B B2 B3 B B B B7 DCLK B C D

8 NMLCD (RTP/CTP)-(CLB). bsolute Maximum Ratings PRMETER SYMBOL MIN MX UNIT Supply Voltage for LCD Logic VDD/VCC V Supply Voltage for TP Logic VDD/VCC-VSS - - V Input Voltage for Logic VIN VSS-0. VDD V LED forward voltage (each LED) IF - 2 m Operating Temperature TOP C Storage Temperature TST C Humidity RH - 90% (Max 0 C) RH 7. Electrical Characteristics PRMETER SYMBOL MIN TYP MX UNIT Power Voltage VDD/DCC V Input Current IVDD m Input Voltage H Level VIH 0.7 VDD - VDD V Input Voltage L Level VIL VDD V 8. Electro-Optical Characteristics ITEM SYM CONDITION MIN TYP MX UNIT REMRK Response Time Tr+Tf θ= ms Figure () Contrast Ratio Cr Figure 2 () Luminance Uniformity δ WHITE = % Figure 2 (3) Surface Luminance Viewing ngle Range CIE (x,y) Cromacity Red Green Blue White Lv θ DLCD DLCD RTP DLCD CLB DLCD CTP-CLB = deg = deg = deg = deg x y x θ= y = x Ta= y x y cd/m2 Figure 2 (2) Figure 3 () Figure 2 () Page 08of 7

9 NMLCD (RTP/CTP)-(CLB) 9. Backlight Characteristics PRMETER SYMBOL MIN TYP MX UNIT Voltage for LED backlight Vl V Current for LED backlight Il m LED Life Time Hrs Note: The LED life time is defined as the module brightness decrease to 0% original brightness at Ta=2 C. Note : Contrast Ratio(CR) is defined mathematically as below, for more information see Figure. Contrast Ratio = verage Surface Luminance with all white pixels (P, P2, P3, P, P) verage Surface Luminance with all black pixels (P, P2, P3, P, P) Note 2: Surface luminance is the LCD surface from the surface with all pixels displaying white. For more information, see Figure 2. Lv = verage Surface Luminance with all white pixels (P, P2, P3, P, P) Note 3: The uniformity in surface luminance δ WHITE is determined by measuring luminance at each test position through, and then dividing the maximum luminance of points luminance by minimum luminance of points luminance. For more information, see Figure 2. δ WHITE = Minimum Surface Luminance with all white pixels (P, P2, P3, P, P) Maximum Surface Luminance with all white pixels (P, P2, P3, P, P) Note : Response time is the time required for the display to transition from white to black (Rise Time, Tr) and from black to white (Decay Time, Tf). For additional information see FIG. The test equipment is utronic-melchers ConoScope series. Note : CIE (x, y) chromaticity, the x, y value is determined by measuring luminance at each test position through, and then make average value. Note : Viewing angle is the angle at which the contrast ratio is greater than 2. For TFT module the contrast ratio is greater than 0. The angles are determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which is normal to the LCD surface. For more information, see Figure3. Note 7: For viewing angle and response time testing, the testing data is based on utronic-melchers ConoScope series. Instruments for Contrast Ratio, Surface Luminance, Luminance Uniformity, CIE the test data is based on TOPCONs BM- photo detector. Page 09of 7

10 NMLCD (RTP/CTP)-(CLB) Figure. The definition of response time Figure 2. Measuring method for Contrast ratio, surface luminance, Luminance uniformity, CIE (x, y) chromaticity Figure 3. The definition of viewing angle Page 0 of 7

11 NMLCD (RTP/CTP)-(CLB) 0. Interface Descriptions 0.. LCD Interface PIN NO. SYMBOL DESCRIPTION REMRK LED- Cathode of LED Backlight 2 LED+ node of LED Backlight 3 Ground DVDD Power supply R0 Red data input R0. R Red data input R. 7 R2 Red data input R2. 8 R3 Red data input R3. 9 R Red data input R. 0 R Red data input R. R Red data input R. 2 R7 Red data input R7. 3 G0 Green data input G0. G Green data input G. G2 Green data input G2. G3 Green data input G3. 7 G Green data input G. 8 G Green data input G. 9 G Green data input G. 20 G7 Green data input G7. 2 B0 Blue data input B0. 22 B Blue data input B. 23 B2 Blue data input B2. 2 B3 Blue data input B3. 2 B Blue data input B. 2 B Blue data input B. 27 B Blue data input B. 28 B7 Blue data input B7. 29 Ground 30 DCLK Clock for input data. Data latched at rising/falling edge of this signal. Default is falling edge. 3 DISP Standby mode control. (Normally pull high) STBYB= L, enter standby mode for power saving. Timing controller source driver will turn off, all outputs are Hi-Z. STBYB= H, normal operation. 32 HS Horizontal sync input 33 VS Vertical sync input 3 DE Input data enable control. When DE mode, active High to enable data input (Normally pull low) 3 No Connect 3 Ground 37 XR The touch panel X right pin 38 YD The touch panel Y down pin 39 XL The touch panel X left pin 0 YU The touch panel Y up pin Page of 7

12 NMLCD (RTP/CTP)-(CLB) 0.2. CTP Interface PIN No. SYMBOL DESCRIPTION REMRK No Connect 2 No Connect 3 RST Reset pin Ground Only connected INT Interrupt signal from CTP to the CTP Panel, SD I2C SD not connected to 7 SCL I2C SCL the LCD itself 8 Ground 9 Ground 0 VDD Power Supply (3.3V) The Capacitive Touch is driven by a Focaltech FT capacitive touch driver IC, which utilizes an I2C interface, and is capable of -point touch. Page 2 of 7

13 NMLCD (RTP/CTP)-(CLB). LCD Timing Details.. Timing Chart PRMETER SYMBOL MIN TYP MX UNIT CONDITION CLK Clock Time Tclk /Max(FCLK) - /Min(FCLK) ns - CLK Pulse Duty Tchw % TCLK HSY to CLK Thc - - CLK - HSY Width Thwh - - CLK - VSY Width Tvwh - - ns - HSY Period Time Th ns - VSY Set-up Time Tvst ns - VSY Hold Time Tvhd ns - HSY Setup Time Thst ns - HSY Hold Time Thhd ns - Data Set-up Time Tdsu ns D00~D23 to CLK Data Hold Time Tdhd ns D00~D23 to CLK DEN Set-up Time Tesu ns DEN to CLK Timing parameter (VDD=3.3V, =0V, Ta=2 C) Timing parameter (VDD=3.3V, =0V, Ta=2 C) Page 3 of 7

14 NMLCD (RTP/CTP)-(CLB).2. Timing Characteristic ITEM SYMBOL MIN TYP MX UNIT DCLK Frequency Fclk MHz DCLK Period Tclk Ns Period Time Th DCLK Display Period Thdisp DCLK Hsync To st Data input Thbp 0 87 DCLK By H BLNKING setting Front Porch Thfp DCLK Pulse Width Thw 8 87 DCLK Period Time Tv H Display Period Tvdisp H Vsync Delay to st Gate output Tvbp H By V BLNKING setting Front Porch Tvfp H Pulse Width Tvw 3 H.3. SY Mode Timing Diagram.. SY-DE Mode Timing Diagram Page of 7

15 NMLCD (RTP/CTP)-(CLB).. Reset Timing SIGNL SYMBOL PRMETER MIN MX UNIT RESET trw Reset low pulse width 0 - us trt Reset complete time Note : When reset applied during SLPIN mode Note 2: When reset applied during SLPOUT mode... Power On Sequence - (note) ms - 20 (note2) ms Page of 7

16 NMLCD (RTP/CTP)-(CLB).7. Power-off Sequence Note: When normally-black LC is used, please send black pattern to discharge the panel. When normally-white LC is used, please send white pattern to discharge the panel Page 7 of 7

17 NMLCD (RTP/CTP)-(CLB) 2. Reliability Test No. SYMBOL TEST CONDITION REMRK High Temperature Storage 2 Low Temperature Storage 3 High Temperature Operation Low Temperature Operation High Temperature & Humidity Operation Temperature Cycle 80 ±2 9H Restore 2H at 2 Power off -30 ±2 9H Restore 2H at 2 Power off 70 ±2 9H Power on -20 ±2 9H Power on 0 ±2 90%RH 9H Power on min min 30min fter 0 cycles, restore 2H at 2 Power off 7 Vibration Test 0Hz~0Hz, 00m/s 2, 20min 8 Shock Test Half-sinewave, 300m/s 2, ms fter test cosmetic and electrical defects should not happen. Page 7 of 7

TFT LCD Display Datasheet

TFT LCD Display Datasheet NMLCD -70800480-LVDS-CTP-SB REV 1.4 February 20, 2017 Uncontrolled Copy when printed or downloaded For the latest version of this document, see www.panadisplay.com www.panadisplay.com Revision History