VITA 62 Power Supply. VIT028wxx600yzzz. VITA 62 DC-DC Converter. Features & Benefits. Product Description. Typical Applications

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1 VITA 6 Power Supply VITA 6 DC-DC Converter Features & Benefits Open VPX VITA V input voltage range 6W output power 3U Open VPX power supply Conduction cooled 6 outputs I C monitoring and control Input voltage reverse polarity protection Remote voltage sense: VS1, VS, VS3 Parallel operation capable with proprietary wireless current sharing Overcurrent, overvoltage and overtemperature protections IPC 61 class 3 No aluminum electrolytic capacitors Enable, inhibit, system reset and power fail controls Military standard compliance: [a] MIL-STD-74F (Pending) MIL-STD-461F MIL-STD-81G MIL-STD-175D Normal Surges and Spikes RTCA/DO-16G Product Description The Vicor VITA 6 power supply is a COTs power supply that is designed for 3U Open VPX systems. The module utilizes Vicor proprietary technology to enable high efficiency and power density for this highly rugged, conduction-cooled model. Up to four power supplies can be paralleled to increase output power capability of VS1, VS, VS3 outputs with proprietary wireless current sharing. Conventional current-share pins are eliminated. Current share accuracy is ±1A. Typical Applications VPX power modules Avionics Shipborne electronics [a] See detailed specifications Page 1 of 6 /19

2 Connector Pin Configuration ROWS POWER SIGNAL POWER D C B P1 P LP1 P3 P4 P5 LP P6 A 3U P Connector Note: See mechanical drawing on page 17 for connector information. Page of 6 /19

3 Connector Pin Descriptions Pin Function / Name Description P1 DC_IN V IN P +DC_IN V IN+ LP1 CHASSIS Chassis A1 B1 C1 D1 A B No Connection No Connection No Connection No Connection No Connection FAIL* When any of the output is not within specification, FAIL* signal will be driven low to indicate a failure C INHIBIT* Input control signal as defined in VITA 6, referenced to SIGNAL_RETURN D ENABLE* Input control signal as defined in VITA 6, referenced to SIGNAL_RETURN A3 No Connection B3 VAUX3 +1V auxiliary output voltage C3 D3 No Connection No Connection A4, B4, C4, D4 VAUX +3.3V auxiliary output voltage A5 *GA Geographical address defined by VITA B5 *GA1 Geographical address defined by VITA C5 D5 A6 B6 SM (I C Clock) SM1 (I C Data) I C Clock I C Data Primary I C communication bus Redundant I C communication bus C6 VAUX1 1V auxiliary output voltage D6 SYS_RESET* System Reset is actively low. It will float when all outputs are within specification A7 B7 C7 No Connection No Connection No Connection D7 SIGNAL_RETURN Ground pin for control signals A8 +1V SENSE VS1 sense, should be connected at point-of-load or on the backplane to corresponding voltage output B8 +3.3V SENSE VS sense, should be connected at point-of-load or on the backplane to corresponding voltage output C8 +5V SENSE VS3 sense, should be connected at point-of-load or on the backplane to corresponding voltage output D8 SENSE_RETURN Should be connected to POWER_RETURN either remotely or at the connector P3 VS3 +5V main output P4, P5 POWER_RETURN Common output voltage return pin LP VS +3.3V main output P6 VS1 +1V main output Page 3 of 6 /19

4 Part Ordering Information Product Function Nominal Input Voltage Grade Package Size Output Power Conformal Coated Factory-Configured Options VIT 8 w xx 6 y zzz VIT = VITA6 8 = 8V DC H = 4 to 85ºC 3U 6 = 6W C = Coated D = C+Au-plated Connector 1 = Standalone = Parallelable Absolute Maximum Ratings The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. Parameter Comments Min Max Unit Total Output Power Combined outputs for all rails 6 [b] W Input Voltage +IN to IN.5 5 V Operating Temperature Measured at card edge 4 85 Storage Temperature 4 15 ºC Isolation Voltage IN to OUT 5 V DC Isolation Voltage IN to CASE 5 V DC Isolation Voltage OUT to CASE 1 V [b] Max aggregate power at 85ºC wedge-lock is 45W. Page 4 of 6 /19

5 Electrical Characteristics All data at nominal line and nominal load unless otherwise specified. Attribute Symbol Conditions / Notes Min Typ Max Unit Overall System Characteristics Nominal line, % aggregate loads 71 System Efficiency Nominal line, 5% aggregate loads 84.8 Nominal line, 1% aggregate loads 87.5 % Power Input Characteristics Operating Input Voltage Range V IN V Input Current (No Load) I IN-NL 8V Input, enable asserted, inhibit de-asserted.43.6 A Inrush Current I INRUSH Peak no load, nominal line, high line; see Figures, 3 Input Undervoltage Protection Threshold Input Overvoltage Protection Threshold 4 83 A V UV-IN 1ms response time 17.5 V V OV-IN 1ms response time 5.5 V Power On to +3.3V AUX Output Delay If EN* is tied to signal ground 5 4 ms Main Outputs VS1: +1V Output Output Voltage Set Point [c] Standalone Parallel, droop share Output Regulation Over Line & Load Standalone 1 Parallel 15 5 V mv Output Voltage Ripple / Noise Nominal line from A load to full load 1 mv P-P Output Overcurrent Protection I OC-S-VS1 Hz filter on OCP 45 A Output Overvoltage Protection V OV-S-VS1 Hz filter on OVP 1.6 V Output Undervoltage Protection V UV-S-VS1 Hz filter on UVP 11.4 V Rated Output Current I R-VS1 4 A Output Power limit P LIM-F-VS1 transmission voltage drop; 1ms response time; power calculation includes enabled 5ms after voltage output is enabled 1ms response time; Fast Overcurrent Protection Limit I OC-F-VS1 enabled 5ms after voltage output is enabled Maximum Operating Transmission Voltage Drop 48 W A V TD-VS1.6 V Maximum Output Capacitance C O-VS1 9 mf Soft-Start Ramp Time t SS-VS1 All full load with max C O-VS1 5 ms Page 5 of 6 /19

6 Electrical Characteristics (Cont.) All data at nominal line and nominal load unless otherwise specified. Attribute Symbol Conditions / Notes Min Typ Max Unit Main Outputs (Cont.) VS3: +5V Output [c] Standalone Output Voltage Set Point Parallel, droop share Output Regulation Over Line & Load Output Voltage Ripple / Noise Standalone 5 1 Parallel 1 15 Nominal line over load range, MHz BW; measured with 1µF and 1µF ceramic capacitor V mv 5 mv P-P Output Overcurrent Protection I OC-S-VS3 Hz filter on OCP 3 3 A Output Overvoltage Protection V OV-S-VS3 Hz filter on OVP 5.15 V Output Undervoltage Protection V UV-S-VS3 Hz filter on UVP 4.9 V Rated Output Current I R-VS3 3 A Output Power limit P LIM-F-VS3 remote sense voltage drop; 1ms response time; power calculation includes enabled 5ms after voltage output is enabled 1ms response time; Fast Overcurrent Protection Limit I OC-F-VS3 enabled 5ms after voltage output is enabled Maximum Operating Transmission Voltage Drop 15 W A V TD-VS3.6 V Maximum Output Capacitance C O-VS3 9 mf Soft-Start Ramp Time t SS-VS3 All full load with max C O-VS3 5 ms Output Voltage Set Point [c] Output Regulation Over Line & Load Output Voltage Ripple / Noise Standalone Parallel, droop share VS: +3.3V Output V Standalone 5 1 Parallel 1 15 Nominal line over load range, MHz BW; measured with 1µF and 1µF ceramic capacitor mv 5 mv P-P Output Overcurrent Protection I OC-S-VS Hz filter on OCP 35 A Output Overvoltage Protection V OV-S-VS Hz filter on OVP 3.5 V Output Undervoltage Protection V UV-S-VS Hz filter on UVP 3. V Rated Output Current I R-VS A Output Power limit P LIM-F-VS remote sense voltage drop; 1ms response time; power calculation includes enabled 5ms after voltage output is enabled 1ms response time; Fast Overcurrent Protection Limit I OC-F-VS enabled 5ms after voltage output is enabled Maximum Operating Transmission Voltage Drop 8 W A V TD-VS.6 V Maximum Output Capacitance C O-VS 9 mf Soft-Start Ramp Time t SS-VS All full load with max C O-VS3 5 ms [c] 5% load. Page 6 of 6 /19

7 Electrical Characteristics (Cont.) All data at nominal line and nominal load unless otherwise specified. Attribute Symbol Conditions / Notes Min Typ Max Unit Auxiliary Outputs VAUX1: 1V Output Output Voltage Set Point V Output Regulation Over Line & Load 5 1 mv Output Voltage Ripple / Noise Nominal line over load range, MHz BW; measured with 1µF and 1µF ceramic capacitor 1 mv P-P Output Overcurrent Protection I OC-S-VAUX1 Hz filter on OCP A Output Overvoltage Protection V OV-S-VAUX1 Hz filter on OVP 1. V Output Undervoltage Protection V UV-S-VAUX1 Hz filter on UVP 11.8 V Rated Output Current I R-VAUX1 1 A Fast Overcurrent Protection Limit I OC-F-VAUX1 1ms response time; enabled 5ms after voltage output is enabled A Maximum Output Capacitance C O-VAUX1 mf Soft-Start Ramp Time t SS-VAUX1 All full load with max C O-VAUX1 5 ms VAUX3: +1V Output Output Voltage Set Point V Output Regulation Over Line & Load 1 V Output Voltage Ripple / Noise Output derived directly from VS1,+1V Main Output; output ripple and noise depends on VS1 load 18 mv P-P Output Overcurrent Protection I OC-S-VAUX3 Hz filter on OCP A Output Overvoltage Protection V OV-S-VAUX3 Hz filter on OVP 1. V Output Undervoltage Protection V UV-S-VAUX3 Hz filter on UVP 11.5 V Rated Output Current I R-VAUX3 1 A Fast Overcurrent Protection Limit I OC-F-VAUX3 1ms response time; enabled 5ms after voltage output is enabled A Maximum Output Capacitance C O-VAUX3 mf Soft-Start Ramp Time t SS-VAUX3 All full load with max C O-VAUX3 5 ms VAUX: +3.3V Output Output Voltage Set Point V Output Regulation Over Line & Load 1 15 mv Output Voltage Ripple / Noise Nominal line over load range, MHz BW; measured with 1µF and 1µF ceramic capacitor 5 mv P-P Output Overcurrent Protection I OC-S-VAUX Hz filter on OCP A Output Overvoltage Protection V OV-S-VAUX Hz filter on OVP 3.45 V Output Undervoltage Protection V UV-S-VAUX Hz filter on UVP 3.15 V Rated Output Current I R-VAUX 6 A Fast Overcurrent Protection Limit I OC-F-VAUX 1ms response time; enabled 5ms after voltage output is enabled 9 1 A Maximum Output Capacitance C O-VAUX 5 mf Soft-Start Ramp Time t SS-VAUX All full load with max C O-VAUX 5 ms Page 7 of 6 /19

8 Operating Area Aggregate Output Power (W) Temperature (ºC) Net Output Power (W) Temperature (ºC) Figure 1 Thermal specified operating area: aggregate power vs. rail temperature for power limited operation Figure Thermal specified operating area: worst-case loading vs. rail temp for power-limited operation Load configuration: 4A, } 1A, Constant 55W 6A, 1A Remaining outputs loaded on aggregate to achieve 6W combined output below 7ºC rail temperature Page 8 of 6 /19

9 Signal Characteristics All of the following plots are at nominal line and 6W aggregate load unless otherwise noted. EN*: Enable* The EN* pin or control register bit enables and disables the +3.3V AUX output of the power supply. The EN* pin has an internal pull-up to VCC and is referenced to the Signal Return pin of the power supply. Signal Type State Attribute Symbol Conditions / Notes Min Typ Max Unit EN* Enable Threshold V ENABLE-EN.8 V EN* Disable Threshold V ENABLE-DIS. V Digital Input Any Internally Generated V CC V CC V EN* Internal Pull Up Resistance to V CC R ENABLE-INT kω EN* Enable Debounce Delay EN* Disable Debounce Delay t D-EN-E ms t D-EN-D ms IN*: Inhibit* The IN* pin enables and disables all outputs except +3.3V AUX if V ENABLE-EN threshold has been met. The IN* pin has an internal pull up to V CC and is referenced to the Signal Return pin of the power supply. Signal Type State Attribute Symbol Conditions / Notes Min Typ Max Unit Digital Input Any IN* Enable Threshold V INHIBIT-EN Status register bit 4 should be (default) for. V IN* Disable Threshold V digital input control line to have priority INHIBIT-DIS.8 V Internally Generated V CC V CC V IN* Internal Pull-Up Resistance to V CC R DISABLE-INT kω IN* Enable Debounce Delay after EN* IN* Disable Debounce Delay Lockout Delay Between Consecutive IN* Enables t D-IN-E ms t D-IN-D ms t D-IN-L 1 3 ms Page 9 of 6 /19

10 Signal Characteristics (Cont.) All of the following plots are at nominal line and 6W aggregate load unless otherwise noted. GA*, GA1*: Global Address The GA* and GA1* pins sets the I C address of the power supply. Global address is set at start up and cannot be changed without a power cycle. The GA* and GA1* pins have an internal pull-up to V CC and is referenced to the Signal Return pin of the power supply. Signal Type State Attribute Symbol Conditions / Notes Min Typ Max Unit Digital Input Start Up Address Pins Low Threshold Address Pins High Threshold V ADDR-L.8 V V ADDR-H. V Internally Generated V CC V CC V EN* Internal Pull Up Resistance to V CC R ADDR-INT kω Address Pins Debounce Delay t D-ADDR 5 5 ms FAIL*, SYSRESET* & LED The power supply has one two color LED located on the ejector edge of the power supply. The LED is either GREEN or RED depending on the state of operation. FAIL* and SYSRESET* lines are set with the LED. Signal Type State Attribute Symbol Conditions / Notes Min Typ Max Unit Outputs Steady RED Blinking GREEN Steady GREEN Blinking RED SYSRESET* V Start up: input voltage operating threshold SYSRST..1.8 V V UV-IN < V IN < V OV-IN has been met; if steady RED persists for >1ms, a critical system FAIL* V FAIL fault has been detected during start up..1.8 V SYSRESET* V SYSRST >1ms after V UV-IN < V IN < V OV-IN has been V FAIL* V FAIL met; power supply is ready for use V SYSRESET* V SYSRST V All outputs are OK and EN* is pulled low FAIL* V FAIL V SYSRESET* V SYSRST Power supply has encountered a OT, OV, UV, V FAIL* V FAIL OC or critical system failure during operating..1.8 V Page 1 of 6 /19

11 Application Characteristics All of the following plots are at nominal line and 6W aggregate load unless otherwise noted V IN V IN Voltage (V) VAUX VAUX3 VS1 VS3 VS Voltage (V) VAUX3 VS1 VS3 VAUX VS 1. VAUX1 1. VAUX Time (s) Figure 3 Delay between application of input power and all outputs available; ENABLE tied to signal ground and INHIBIT left floating Time (s) Figure 4 Delay between removal of input power and all outputs decaying; ENABLE tied to signal ground and INHIBIT left floating V IN V IN Voltage (V) ENABLE VAUX VAUX3 VS1 VS3 VS Voltage (V) VAUX3 VS1 VS3 VS VAUX ENABLE 1. VAUX1 1. VAUX Time (s) Figure 5 Delay between ENABLE line transitioning from floating to signal ground and all outputs becoming available; INHIBIT left floating Time (s) Figure 6 Delay between ENABLE line transitioning from signal ground to floating and all outputs decaying; INHIBIT left floating Page 11 of 6 /19

12 Application Characteristics (Cont.) All of the following plots are at nominal line and 6W aggregate load unless otherwise noted VAUX3 VS1 VS3 VS VAUX INHIBIT VAUX1. VIN VAUX VS1 VS3 VAUX VS INHIBIT VAUX Time (s) Figure 7 Delay between INHIBIT line transitioning from floating to signal ground and corresponding outputs decaying; VAUX (+3.3V) remains on; ENABLE tied to signal ground Figure 8 Time delay between INHIBIT line transitioning from signal ground to floating and corresponding outputs becoming available; VAUX (+3.3V) remains on; ENABLE tied to signal ground Inrush Current (A) 5 Card Input Voltage (V) Inrush Current (A).3 Time (s).5.5 VIN IINRUSH Figure 9 Inrush current at nominal input voltage; CH1 inrush current, 1mV/A; CH card input voltage VITA 6 DC-DC Converter Page 1 of VIN Card Input Voltage (V) VIN Voltage (V) Voltage (V) 8. IINRUSH Figure 1 Inrush current at max input voltage (45V); CH1 inrush current, 1mV/A; CH card input voltage Rev 1. /19

13 Application Characteristics (Cont.) Load step response for all outputs being loaded from no load to 1% of their rated output simultaneously. All of the following plots are at nominal line and 6W aggregate load unless otherwise noted Voltage (V).. Voltage (V) Time (s) Time (s) Figure 11 Transient response of the VS1 (+1V) output with a load step of % (A) to 1% (4A); AC coupled Figure 1 Transient response of the VS1 (+1V) output with a load step of 1% (4A) to % (A); AC coupled Voltage (V).. Voltage (V) Time (s) Time (s) Figure 13 Transient response of the VS3 (+5V) output with a load step of % (A) to 1% (3A); AC coupled Figure 14 Transient response of the VS3 (+5V) output with a load step of 1% (3A) to % (A); AC coupled Voltage (V).. Voltage (V) Time (s) Time (s) Figure 15 Transient response of the VS (+3.3V) output with a load step of % (A) to 1% (A); AC coupled Figure 16 Transient response of the VS (+3.3V) output with a load step of 1% (A) to % (A); AC coupled Page 13 of 6 /19

14 Application Characteristics (Cont.) Load step response for all outputs being unloaded from 1% of their rated output to to no load simultaneously. Output Voltage (V) A Load Current (A) Output Voltage (V) A Load Current (A) V VS1 I LOAD V VS1 I LOAD Figure 17 Rise time of the VS1 (+1V) output with nominal load Figure 18 Discharge time of the VS1 (+1V) output 4 4 Output Voltage (V) V 1A Load Current (A) Output Voltage (V) V 1A Load Current (A) V VS I LOAD V VS I LOAD Figure 19 Rise time of the VS (+3.3V) output with nominal load Figure Discharge time of the VS (+3.3V) output with nominal load Output Voltage (V) A Load Current (A) Output Voltage (V) A Load Current (A) V VS3 I LOAD V VS3 I LOAD Figure 1 Rise time of the VS3 (+5V) output with nominal load Figure Discharge time of the VS3 (+5V) output with nominal load Page 14 of 6 /19

15 Application Characteristics (Cont.) A A A Load Current (A) Output Voltage (V) Output Voltage (V) V Load Current (A) Output Voltage (V) ILOAD Figure 6 Discharge time of the VAUX3 (+1V) output with nominal load V ILOAD Figure 7 Rise time of the VAUX (+3.3V) output with nominal load VITA 6 DC-DC Converter Page 15 of 6 4 VVAUX1 3.5 VVAUX 3 ILOAD A ILOAD Figure 5 Rise time of the VAUX3 (+1V) output with nominal load 3 5 Figure 4 Discharge time of the VAUX1 ( 1V) output VVAUX1 4 VVAUX3 Figure 3 Rise time of the VAUX1 ( 1V) output with nominal load 14 3 ILOAD Output Voltage (V) VVAUX3.5 Load Current (A) VVAUX ILOAD Figure 8 Discharge time of the VAUX (+3.3V) output with nominal load Rev 1. /19 Load Current (A) 8 Load Current (A) 3.5 Output Voltage (V) 14 Load Current (A) Output Voltage (V) Load step response for all outputs being unloaded from 1% of their rated output to to no load simultaneously.

16 General Characteristics Attribute Symbol Conditions / Notes Min Typ Max Unit Mechanical Length L Per VITA in Width W Per VITA in Height H Per VITA6.951 in Weight W 635 g Wedge-Lock Torque Manufacturer s recommended value 7 in. lbs Thermal Operating Temperature T WEDGE-LOCKS 4 85 C Assembly Storage Temperature 4 15 ºC Safety MTBF MIL-HDBK-17Plus Parts Count - 5 C Ground Benign, Stationary, Indoors / Computer Telcordia Issue - Method I Case III; 5 C Ground Benign, Controlled TBD TBD Hrs Hrs Page 16 of 6 /19

17 Signal Pin Functions ENABLE* & INHIBIT* Enable and Inhibit pins express active low logic. Table 1 has the truth table for the output state of the power supply. It is necessary to avoid the indeterminate output state where.8.v is applied to the ENABLE* or INHIBIT* pins. A digital debounce filter is present on the signals of both pins to prevent false transitions. The ENABLE* and INHIBIT* also have a minimum delay between successive output enable transitions to prevent repeated starts into high capacitance loads. See detailed specifications for delays time limits. ENABLE* Pin INHIBIT* Pin Output State and Notes <.8V, Logic >.V or NC, Logic 1 All outputs available <.8V, Logic <.8V, Logic Table 1 ENABLE & INHIBIT logic Global Address: GA* & GA1* Only +3.3V AUX output available >.V or NC, Logic 1 Any All outputs disabled.8v > V ENABLE* <.V.8V > V INHIBIT* <.V Indeterminate state and must be avoided Global address pins also exhibit active low logic. Table has the truth table for the output state of the power supply. It is necessary to avoid the indeterminate state where.8.v is applied to either address pins. A digital debounce filter is present on the signals of both pins to incorrect address assignment. The global address is static and set on power up. The power supply s address cannot not change until power has been cycled and the states of the address pins have been modified before power up. I C Ports: Both primary and redundant I C ports have the same address set by the Global Address pins and identical functionality. There is a bidirectional buffer on both clock and data lines with internal pull ups on the IPMC and external pulls on the back plane to +3.3V are required. FAIL* This signal line is open drain and tracks SYSRESET* when the unit is powering up or pulled down to SIGNAL_RETURN when any of the outputs are out of specification. A pull up resistor is expected on the backplane per section of VITA 6. SYSRESET* GA1* GA* Power Supply Address >.V or NC, Logic 1 >.V or NC, Logic 1 h >.V or NC, Logic 1 <.8V, Logic 1h <.8V, Logic >.V or NC, Logic 1 h <.8V, Logic <.8V, Logic 3h.8V > V GA1* <.V.8V > V GA* <.V Table Global address assignment This signal line is open drain and is pulled down to SIGNAL_RETURN when the unit is powering up. The line is released when the power supply is ready for control. Appropriate pull up/pull down resistors are expected on the back plane per VITA 46 section SIGNAL RETURN Indeterminate state and must be avoided SIGNAL RETURN is used as the reference for signals pin connections and is to be tied to POWER_RETURN on the backplane per section of VITA 6. Typical External Circuits for Signal Pins (ENABLE*, INHIBIT*, GA*, GA1*, SYSRESET*, FAIL* and I C Channels) V CC V CC V CC V CC Vcc Vcc 5kΩ 1kΩ 5kΩ 1kΩ 5kΩ 1kΩ 5kΩ 1kΩ 5kΩ 5kΩ To IPMC To IPMC To IPMC To IPMC From IPMC From IPMC ENABLE* INHIBIT* GA* GA1* SW SW SW SW SYSRESET* FAIL* Signal Return V CC R PU R PU I C Clock I C Data IPMC Buffers Signal Return Page 17 of 6 /19

18 Card Edge Temperature Sensors The PCBA card edge temperature sensor internal to the power supply is mounted on the edge of the PCBA card edge. Consequently, the temperature sensor measures a temperature that is generally higher than the heat-sink-to-rail mounting interface and lower than the hot spot of the internal converters in the power supply. Response from the power supply to I C command x1 provides the temperature measured by the internal sensor that reads the higher temperature. This temperature can exceed 85ºC. I C command x9 will respond with both PCB mounted temperature sensors. Fault Operation Input Voltage Protection (IOVP) If the input voltage to the power supply drops below V UV-IN or exceeds V OV-IN for at least 1ms, the power supply will shut down all outputs and digital communication lines until input voltage is within operating range V IN. Triggering I OVP has the same effect as power cycling the power supply. Supply currents and voltages are sampled very µs. Output Voltage Protection (OOVP) The power supply measures voltage from the remote-sense lines as well as the voltages on the VITA connector which do not include remote sense drop. The FAIL* line will be asserted (pulled low) when output voltage at the connector of the power supply is greater than V OV-S-[OUTPUT] or lower than V UV-S-[OUTPUT]. OVP will also shut down the outputs until the output voltage of the converter is within specification. The power supply will automatically restart the outputs every 1s until the fault clears. Overtemperature Protection (OTP) The power supply will go into overtemperature protection and shut down all outputs when either internal temperature sensor reads 98ºC. The power converter will recover for normal operation when the internal temperature has dropped by ºC. At 88ºC the Bit-5 of the Status Register (x55) will clear if the system manager sets Bit-5 to 1 which will indicate the power supply is within 1ºC from shutting down. At 85ºC rail temperature, the maximum output power of the power supply is limited to 45W aggregate. When operating close to the thermal limits of the power supply, care must be taken to follow the thermal specified operating areas for aggregate and worst case loading shown in Figures 1 and, respectively. When operating solely with output VS1 loaded to its rated output or outputs VS1, VAUX1, VAUX, and VAUX3 loaded to their rated outputs combined, the maximum rail temperature should be held to 75ºC or lower. Auxiliary voltages are powered from the converter providing output VS1. Battle Short Mode (Pending) Battle short mode can only be enabled using the I C communication bus. When enabled, all operating limits programmed into the power supply will be bypassed and outputs will strive to remain on even if an individual output is unable to deliver power loads. If a particular output experiences a fault, only that output will shut down while other outputs continue to supply power to loads with the exception of VS1 and VS3. Since VS1 is used to derive all auxiliary outputs, if VS1 experiences a fault, all auxiliary outputs will shut down until VS1 recovers from its fault. In Battle Short Mode, when an output shuts down to a fault other than thermal shut down, the output will attempt to restart every ms. The IPMC in the power supply is powered off VS3 and a failure of VS3 will cause the entire power supply to power cycle. Overcurrent Protection (OCP)* There are two overcurrent protection limits for each output. The fast-response limit, I OC-F-[OUTPUT], responds to an overcurrent fault in less than 1ms after soft-start time, t SS-[OUTPUT], has elapsed since the output was enabled. Triggering OCP will cause all outputs to shut down for 1s and then automatically restart until the fault clears. The slow-response current limit, I OC-F-[OUTPUT], responds to an overcurrent fault if the current exceeds the current limit after a Hz low-pass filter has filtered the measured current. The outputs will restart every 1s until the fault clears. Page 18 of 6 /19

19 Conducted Emissions Testing Professional Testing, EMI, Inc MIL-STD-461, CE1, Conducted Emissions, Power Leads Line 1 Measured Emissions Line Under Test: Power 8VDC Input EUT Mode: Full Load Note: Thick power cable Limit Level Ambient Scan Measured Value Amplitude (dbµv) K 1K 1M 1M Operator: Michael Anthony Current Time -:1:6 PM, Monday, October 1, 18 Frequency EUT Name: Project Number: 33-1 Client: Freedom Power Figure 9 Conducted emissions of 8V DC input at full load Professional Testing, EMI, Inc MIL-STD-461, CE1, Conducted Emissions, Power Leads Line Measured Emissions Line Under Test: Return EUT Mode: Operating Full Load Note: Limit Level Ambient Scan Measured Value Amplitude (dbµv) K 1K 1M 1M Operator: Michael Anthony Current Time -:1:3 PM, Monday, October 1, 18 Frequency EUT Name: Project Number: 33-1 Client: Freedom Power Figure 3 Conducted emissions of power return at full load Page 19 of 6 /19

20 Standards Compliance MIL-STD-461C CS6 ±V, 1µs ±4V, 5µs 1 Hz PSD decreasing at 6dB/octave MIL-STD-461F CE11 Figure CE11-4, Curve # CS11 Figure CS11-1, Cuve # CS114 Curve 5 [d] CS115 CS116 Input power lead Bulk input power cables +1V and output RTN +3.3V and output RTN +5V and output RTN Auxiliary 1V and output RTN Auxiliary +3.3V and output RTN Auxiliary +1V and output RTN Bulk input power cables Bulk output power cables Bulk input power cables Bulk output power cables MIL STD 74F LDC13 Voltage Distortion Spectrum LDC15 Normal Voltage Transients LDC3 Abnormal Voltage Transients Pending Pending Pending MIL STD 81G 1 1Hz PSD increasing at 3dB/octave Vibration, Method Procedure I Operating Shock, Method 516 Procedure I 1 1Hz PSD =.1g/Hz 1 Hz PSD decreasing at 6dB/octave 4g, 11ms shock half-sine 4g, 11ms, terminal saw-tooth shock pulses in all three axes MIL-STD-175D Normal Operating Surges Paragraph Surges, Figure 5 Exported Voltage Spikes Paragraph , Figure 6; Procedure Imported Voltage Spikes Paragraph , Figure 6; Procedure RTCA/DO-16G Section 17: Voltage Spike, Category A Section 17: ESD IEC ESD, Level 4 ±15kV Air Discharge [d] criteria is no loss of any output voltages during the test for any period of time. Page of 6 /19

21 I C Sensor Commands Commands are sent by SMBus-compatible packets over the I C physical interface. The I C bus will communicate at 1kHz. Pull-up resistors to +3.3V are expected on the system backplane. Two pins, labeled *GA1 and *GA are provided at each power supply slot, where *GA1 and *GA are defined to be active (SET) when low. The power supply will respond to I C address 1 [GA1][GA] Commands Recognized by Power Supply The general format is as follows: nncommand from controller I C / SMBus master: Address+R/*W Command Byte Number of Bytes Zero Checksum nnresponse from power supply I C / SMBus slave: Command Echo Data Bytes Zero Checksum x1: Sensor Data (Read Only) [e] Byte Number Contents Format Scaling x1 Byte Echo of the command 1 Status Reg Byte See below, same as used by command x55, 3 PCBA Temperature ºC INT = 1ºC 4, 5 +1V VSENSE UINT = 1.V 6, V VSENSE UINT = 3.3V 8, 9 +5V VSENSE UINT = 5.V 1, VAUX VSENSE UINT = 3.3V 1, 13 +1VAUX VSENSE UINT = 1.V 14, 15 1VAUX VSENSE UINT = 1.V, absolute value 16, 17 +1V IOUT UINT = 3A 18, V IOUT UINT = A, 1 +5V IOUT UINT = 4A, VAUX IOUT UINT = 4A 4, 5 +1VAUX IOUT UINT = 1A 6, 7 1VAUX IOUT UINT = 1A, absolute value 8, 9 INT REFERENCE UINT =.5V 3, 31 Input Voltage UINT = 8V 3 51 Part Number CHAR[] 5 55 Serial Number UINT3 56, 57 Date Code UINT16 no term, padded with x Unsigned 3-bit integer; last 9 digits of the serial number of the unit on the label Byte 56: YY - x1 is 18 or 18 Byte 57: WW - x1a is the 6th Week 58, 59 Hardware Rev CHAR[] See label information 6, 61 Firmware Rev CHAR[] 6 Input Current UINT8 55 = 4A 63 Zero Checksum Byte Sum(byte :63) = [e] Most-significant bit of each byte is transmitted first. Most-significant byte of UINT16 and UINT3 transmitted first. Part number, CHAR Bytes 3 51 Serial Number, UINT3 Bytes 5 55 Mfg. date for Byte 57 WW Jan 1, Day 1 of Week 1 Year, YY Byte 56 Figure 31 Product label information Byte 58 (Char) Byte 59 (Char) Page 1 of 6 /19

22 Commands Recognized by Power Supply (Cont.) x44: Firmware Date (Read Only) [f] byte response in ASCII form. Byte Number Contents Format Typical Value x44 Byte Echo of the command 1 Date ASCII[] NOV 8 14:3: Zero Checksum Byte x45: Hardware Address (Read Only) [f] Uses SMBus Read Byte protocol, section 6.5.5, with or without PEC Byte Number Contents Format Typical Value x45 Byte 1 I C Address Byte x3, set by *GA1, *GA Zero Checksum Byte Sum(byte :) = x55: Status Command (Read/Write) [f] Uses SMBus Wirte Byte/Read Byte protocol, section 6.5.4, 6.5.5, with or without PEC Byte Number Contents Format Typical Value x55 Byte 1 Status Byte Byte x18 = All outputs ON Zero Checksum Byte Sum(byte :) = Byte Number x9: All Voltages in mv (Read) [f] Contents Format Scaling x1 Byte Echo of the command 1, +1V SENSE UINT16 1mV/bit 3, V SENSE UINT16 1mV/bit 5, 6 +5V SENSE UINT16 1mV/bit 7, VAUX SENSE UINT16 1mV/bit 9, 1 +1VAUX VSENSE UINT16 1mV/bit 11, 1 1VAUX VSENSE UINT16 1mV/bit 13, 14 Input Voltage UINT16 1mV/bit 15 Zero Checksum Byte Sum(byte :14) = [f] Most-significant bit of each byte is transmitted first. Most-significant byte of UINT16 and UINT3 transmitted first. x99: Main Outputs Output and Input Current in ma (Read) [f] Byte Number Contents Format Scaling x99 Byte Echo of the command 1, +1V IOUT UINT16 1mA/bit 3, V IOUT UINT16 1mA/bit 5, 6 +5V IOUT UINT16 1mA/bit 7, 8 Input Current UINT16 1mA/bit 9 Zero Checksum Byte Sum(byte :8) = Byte Number x91: Auxiliary Outputs Output Current in ma (Read) [f] Contents Format Scaling x91 Byte Echo of the command 1, +3.3VAUX IOUT UINT16 1mA/bit 3, 4 +1VAUX IOUT UINT16 1mA/bit 5, 6 1VAUX IOUT UINT16 1mA/bit 7 Zero Checksum Byte Sum(byte :6) = Byte Number x9: PCBA Card Edge Temperatures in C x 1 (Read) [f] Contents Format Scaling x9 Byte Echo of the command 1, 3, 4 3U P connector, P1 side Rail 3U P connector, P6 side Rail INT16 INT16 Temperature x 1, eg. 13 = 1.3 C Same as above 5 Zero Checksum Byte Sum(byte :4) = Page of 6 /19

23 Status Register Bit Map (Byte 1) used in command x55 Bit and 1 allow you to monitor what the power supply is reading from the input connector. Bit Name Condition Default STATUS REGISTER (Byte 1) (x55) 7 X Read/Write 6 FAIL If set to 1 by System Manager, a fault condition will clear this bit. OT Warning FAIL X SW Priority *SW Inh *SW En *HW Inh *HW En 5 OT Warning If set to 1 by System Manager, an OT fault will clear this bit. 4 SW Priority Set to 1 for SW Control 3 *SW lnh EN all, EN only 3.3V *SW En ALL outputs regardless 1 *HW lnh As read by HW BACKPLANE *HW En As read by HW BACKPLANE Page 3 of 6 /19

24 Power Architecture Internal Power Configuration VS +3.3V, A LP DC IN P1, P Input Power at VITA 3U P Connector Reverse Voltage Blocking EMI Filter VS3 +5.V, 3A VS1 +1.V, 4A t o t o [g] [g] VAUX3, +1V, 1A VAUX +3.3V, 6A P3 P6 B3 A4-D4 Outputs at VITA 3U P connector VAUX1 1.V, 1A C6 [g] Card edge temperature sensor proximity. Page 4 of 6 /19

25 Mechanical Drawing NOMINAL, WEDGE-LOCK EXPANDS TO.545 MAX. 1 3 THERMAL SEATING PLANE DIMENSIONS ARE IN INCHES Connector Components Item # Description Manufacturer Manufacturer Part Number 1 VITA46 DEG Guide Socket TE Connectivity VITA6 Connector Plug TE Connectivity VITA46 DEG Guide Socket TE Connectivity Page 5 of 6 /19

26 Revision History Revision Date Description Page Number(s) 1. /7/19 Initial release n/a Contact Us: Vicor Corporation 5 Frontage Road Andover, MA, USA 181 Tel: Fax: Customer Service: custserv@vicorpower.com Technical Support: apps@vicorpower.com 19 Vicor Corporation. All rights reserved. The Vicor name is a registered trademark of Vicor Corporation. I C is a trademark of NXP semiconductor. All other trademarks, product names, logos and brands are property of their respective owners. Page 6 of 6 /19