MODEL NO.: N154Z3 - L03

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1 TFT LCD Specification MODEL NO. N54Z3 - L3 Customer Approved by Note CST PMMD III Director annie_hsu( /56522 / Director Accept 54873) / 28

2 - CONTENTS - REVISION HISTORY GENERAL DESCRIPTION OVERVIEW.2 FEATURES.3 APPLICATION.4 GENERAL SPECIFICATIONS.5 MECHANICAL SPECIFICATIONS 2. ABSOLUTE MAXIMUM RATINGS ABSOLUTE RATINGS OF ENVIRONMENT 2.2 ELECTRICAL ABSOLUTE RATINGS 2.2. TFT LCD MODULE BACKLIGHT UNIT 3. ELECTRICAL CHARACTERISTICS TFT LCD MODULE 3.2 BACKLIGHT UNIT 4. BLOCK DIAGRAM TFT LCD MODULE 4.2 BACKLIGHT UNIT 5. INPUT TERMINAL PIN ASSIGNMENT TFT LCD MODULE 5.2 BACKLIGHT UNIT 5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL 5.4 COLOR DATA INPUT ASSIGNMENT 5.5 EDID DATA STRUCTURE 6. INTERFACE TIMING INPUT SIGNAL TIMING SPECIFICATIONS 6.2 POWER ON/OFF SEQUENCE 7. OPTICAL CHARACTERISTICS TEST CONDITIONS 7.2 OPTICAL SPECIFICATIONS 8. PRECAUTIONS ASSEMBLY AND HANDLING PRECAUTIONS 8.2 SAFETY PRECAUTIONS 9. PACKING CARTON 9.2 PALLET. DEFINITION OF LABELS CMO MODULE LABEL.2 CMO CARTON LABEL 2 / 28

3 Version Date Page (New) Section REVISION HISTORY Description Ver 2. Jun. 7, 8 All All Specification was first issued. 3 / 28

4 . GENERAL DESCRIPTION. OVERVIEW N54Z3 - L3 is a 5.4 TFT Liquid Crystal Display module with single CCFL Backlight unit and 3 pins LVDS interface. This module supports 68 x 5 Wide-SXGA+ mode and can display 262,44 colors. The optimum viewing angle is at 6 o clock direction. The inverter module for Backlight is not built in..2 FEATURES - Thin and High Brightness - WSXGA+ (68 x 5 pixels) resolution - DE only mode - 3.3V LVDS (Low Voltage Differential Signaling) interface with 2 pixel/clock - Meet RoHS requirement.3 APPLICATION - TFT LCD Notebook.4 GENERAL SPECIFICATINS Item Specification Unit Note Active Area 33.2 (H) x 27. (V) (5.4 inch Diagonal) mm Bezel Opening Area (H) x 2.5 (V) mm () Driver Element a-si TFT active matrix - - Pixel Number 68 x 3 (RGB) x 5 pixel - Pixel Pitch.97 x.97 mm - Pixel Arrangement RGB vertical stripe - - Display Colors 262,44 color - Transmissive Mode Normally white - - Surface Treatment Hard coating (3H), Anti-glare MECHANICAL SPECIFICATIONS Item Min. Typ. Max. Unit Note Horizontal (H) mm Module Size Vertical (V) mm () Depth (D) mm Weight g - Note () Please refer to the attached drawings for more information of front and back outline dimensions. 4 / 28

5 2. ABSOLUTE MAXIMUM RATINGS 2. ABSOLUTE RATINGS OF ENVIRONMENT Item Symbol Value Min. Max. Unit Note Storage Temperature T ST ºC () Operating Ambient Temperature T OP +5 ºC (), (2) Shock (Non-Operating) S NOP - 2/2 G/ms (3), (5) Vibration (Non-Operating) V NOP -.5 G (4), (5) Note () Temperature and relative humidity range is shown in the figure below. (a) 9 %RH Max. (Ta 4 ºC). (b) Wet-bulb temperature should be 39 ºC Max. (Ta > 4 ºC). (c) No condensation. Note (2) The temperature of panel surface should be ºC Min. and 5 ºC Max. Relative Humidity (%RH) Operating Range 4 2 Storage Range Temperature (ºC) Note (3) time for ± X, ± Y, ± Z. for Condition (2G / 2ms) is half Sine Wave, Note (4) ~ 2 Hz,.5 Hr / Cycle, cycles for each X, Y, Z. Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that the module would not be twisted or bent by the fixture. The fixing condition is shown as below LCD Module Side Mount Fixing Screw Side Mount Fixing Screw Stage gap=2mm Bracket 5 / 28

6 2.2 ELECTRICAL ABSOLUTE RATINGS 2.2. TFT LCD MODULE Item Symbol Min. Value Max. Power Supply Voltage V CC V Logic Input Voltage V IN -.3 V CC +.3 V Unit Note () BACKLIGHT UNIT Value Item Symbol Unit Note Min. Max. Lamp Voltage V L K V RMS (), (2), I L = 6. ma Lamp Current I L 3 7. ma RMS (), (2) Lamp Frequency F L 4 8 KHz Note () Permanent damage to the device may occur if maximum values are exceeded. Function operation should be restricted to the conditions described under Normal Operating Conditions. Note (2) Specified values are for lamp (Refer to 3.2 for further information). 6 / 28

7 3. ELECTRICAL CHARACTERISTICS 3. TFT LCD MODULE Ta = 25 ± 2 ºC Parameter Symbol Value Min. Typ. Max. Unit Note Power Supply Voltage Vcc V - Ripple Voltage V RP 5 mv - Rush Current I RUSH.5 A (2) Initial Stage Current I IS. A (2) Power Supply Current White ma (3)a Lcc Black ma (3)b LVDS Differential Input High Threshold V TH(LVDS) + mv (5), V CM =.2V LVDS Differential Input Low Threshold V TL(LVDS) - mv (5) V CM =.2V LVDS Common Mode Voltage V CM V (5) LVDS Differential Input Voltage V ID 6 mv (5) Terminating Resistor R T Ohm Power per EBL WG P EBL W (4) Note () The ambient temperature is Ta = 25 ± 2 ºC. Note (2) I RUSH the maximum current when VCC is rising I IS the maximum current of the first ms after power-on Measurement Conditions Shown as the following figure. Test pattern black. +3.3V Q 2SK475 FUSE C3 Vcc (LCD Module Input) R uf 47K (High to Low) (Control Signal) SW +2V R2 K Q2 2SK47 VR 47K C2 C.uF uf 7 / 28

8 Vcc rising time is 47us.9Vcc +3.3V VCC V 47us.Vcc ms I RUSH I IS ICC Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 ± 2 ºC, f v = 6 Hz, whereas a power dissipation check pattern below is displayed. a. White Pattern b. Black Pattern Active Area Active Area Note (4) The specified power are the sum of LCD panel electronics input power and the inverter input power. Test conditions are as follows. (a) Vcc = 3.3 V, Ta = 25 ± 2 ºC, f v = 6 Hz, (b) The pattern used is a black and white 32 x 36 checkerboard, slide # from the VESA file Flat Panel Display Monitor Setup Patterns, FPDMSU.ppt. (c) Luminance 6 nits.. (d) The inverter used is provided from. Please contact them for detail information. CMO doesn t provide the inverter in this product. 8 / 28

9 Note (5) The parameters of LVDS signals are defined as the following figures. Single Ended VCM VID V Differential V TH(LVDS) V V TL(LVDS) VID 9 / 28

10 3.2 BACKLIGHT UNIT Ta = 25 ± 2 ºC Parameter Symbol Value Min. Typ. Max. Unit Note Lamp Input Voltage V L V RMS I L = 6. ma Lamp Current I L 2. (),(2) ma RMS 3. (),(3) Lamp Turn On Voltage V S 4 (25 o C) V RMS (4) 58 ( o C) V RMS (4) Operating Frequency F L 4 8 KHz (5) Lamp Life Time L BL 5, Hrs (7) Power Consumption P L 4.38 W (4), I L = 6. ma Note () Lamp current is measured by utilizing a high frequency current meter as shown below LCD Module HV (Pink) LV (White) 2 A Current Meter Inverter Note (2) for burst mode inverter design Note (3) for continuous mode inverter design Note (4) The voltage that must be larger than Vs should be applied to the lamp for more than second after startup. Otherwise the lamp may not be turned on. Note (5) The lamp frequency may produce interference with horizontal synchronous frequency from the display, and this may cause line flow on the display. In order to avoid interference, the lamp frequency should be detached from the horizontal synchronous frequency and its harmonics as far as possible. Note (6) P L = I L V L Note (7) The lifetime of lamp can be defined as the time in which it continues to operate under the condition Ta = 25 2 o C and I L = 6. marms until one of the following events occurs (a) When the brightness becomes or lower than 5% of its original value. (b) When the effective ignition length becomes or lower than 8% of its original value. (The effective ignition length is a scope that luminance is over 7% of that at the center point.) Note (8) The waveform of the voltage output of inverter must be area-symmetric and the design of the inverter must have specifications for the modularized lamp. The performance of the Backlight, such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for the lamp. All the parameters of an inverter should be carefully designed to avoid generating too much current leakage from high voltage output of the inverter. When designing or ordering the / 28

11 inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module should be operated in the same manners when it is installed in your instrument. The output of the inverter must have symmetrical (negative and positive) voltage waveform and symmetrical current waveform.(unsymmetrical ratio is less than %) Please do not use the inverter, which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal synchronous frequency and from its harmonics in order to prevent interference. Requirements for a system inverter design, which is intended to have a better display performance, a better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its leakage current. a. The asymmetry rate of the inverter waveform should be % below; b. The distortion rate of the waveform should be within 2 ± %; c. The ideal sine wave form shall be symmetric in positive and negative polarities. I p * Asymmetry rate I p I p / I rms * % I -p * Distortion rate I p (or I p ) / I rms / 28

12 4. BLOCK DIAGRAM 4. TFT LCD MODULE LVDS display Data & Clock Vcc GND Data EDID INPUT CONNECTOR LVDS INPUT / TIMING CONTROLLER DC/DC CONVERTER & REFERENCE VOLTAGE GENERATOR SCAN DRIVER IC TFT LCD PANEL DATA DRIVER IC CLK EDID V EDID EDID EEPROM VL LAMP CONNECTOR BACKLIGHT UNIT 4.2 BACKLIGHT UNIT HV (Pink) 2 LV (White) 2 / 28

13 5. INPUT TERMINAL PIN ASSIGNMENT 5. TFT LCD MODULE Pin Symbol Description Polarity Remark Vss Ground 2 V CC Power Supply +3.3 V (typical) 3 V CC Power Supply +3.3 V (typical) 4 V EDID DDC 3.3V Power 5 NC Non-Connection 6 CLK EDID DDC Clock 7 DATA EDID DDC Data 8 RXO- LVDS Differential Data Input (Odd) Negative 9 RXO+ LVDS Differential Data Input (Odd) Positive Vss Ground RXO- LVDS Differential Data Input (Odd) Negative 2 RXO+ LVDS Differential Data Input (Odd) Positive 3 Vss Ground 4 RXO2- LVDS Differential Data Input (Odd) Negative 5 RXO2+ LVDS Differential Data Input (Odd) Positive 6 Vss Ground 7 RXOC- LVDS Clock Data Input (Odd) Negative 8 RXOC+ LVDS Clock Data Input (Odd) Positive 9 Vss Ground 2 RXE- LVDS Differential Data Input (Even) Negative 2 RXE+ LVDS Differential Data Input (Even) Positive 22 Vss Ground 23 RXE- LVDS Differential Data Input (Even) Negative 24 RXE+ LVDS Differential Data Input (Even) Positive 25 Vss Ground 26 RXE2- LVDS Differential Data Input (Even) Negative 27 RXE2+ LVDS Differential Data Input (Even) Positive 28 Vss Ground 29 RXEC- LVDS Clock Data Input (Even) Negative 3 RXEC+ LVDS Clock Data Input (Even) Positive Note () Connector Part No. JAE-FI-XB3SL-HF or equivalent Note (2) User s connector Part No FI-X3C2L or equivalent Note (3) The first pixel is odd as shown in the following figure. 3 / 28

14 5.2 BACKLIGHT UNIT Pin Symbol Description Color HV High Voltage Pink 2 LV Ground Black Note () Connector Part No. JST-BHSR-2VS- or equivalent Note (2) User s connector Part No. JST-SM2B-BHSS--TB or equivalent 5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL RXO2+/- RXOC+/- T/7 RXO+/- IN2 IN9 IN8 IN7 IN6 IN5 IN4 DE Vsync Hsync OB5 OB4 OB3 OB2 RXO+/- IN3 IN2 IN IN IN9 IN8 IN7 OB OB OG5 OG4 OG3 OG2 OG IN6 IN5 IN4 IN3 IN2 IN IN OG OR5 OR4 OR3 OR2 OR OR Signal for DCLK Cycle (T) RXEC+/- T/7 RXE2+/- RXE+/- IN2 IN9 IN8 IN7 IN6 IN5 IN4 DE Vsync Hsync EB5 E EB3 EB2 IN3 IN2 IN IN IN9 IN8 IN7 EB EB EG5 EG4 EG3 EG2 EG RXE+/- IN6 IN5 IN4 IN3 IN2 IN IN EG ER5 ER4 ER3 ER2 ER ER Signal for DCLK Cycle (T) 4 / 28

15 5 / COLOR DATA INPUT ASSIGNMENT The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for the color. The higher the binary input, the brighter the color. The table below provides the assignment of color versus data input. Data Signal Red Green Blue Color R5 R4 R3 R2 R R G5 G4 G3 G2 G G B5 B4 B3 B2 B B Basic Colors Black Red Green Blue Cyan Magenta Yellow White Gray Scale Of Red Red()/Dark Red() Red(2) Red(6) Red(62) Red(63) Gray Scale Of Green Green()/Dark Green() Green(2) Green(6) Green(62) Green(63) Gray Scale Of Blue Blue()/Dark Blue() Blue(2) Blue(6) Blue(62) Blue(63) Note () Low Level Voltage, High Level Voltage

16 5.5 EDID DATA STRUCTURE The EDID (Extended Display Identification Data) data formats are to support displays as defined in the VESA Plug & Display and FPDI standards. Byte # Byte # Value Value Field Name and Comments (decimal) (hex) (hex) (binary) Header Header FF 2 2 Header FF 3 3 Header FF 4 4 Header FF 5 5 Header FF 6 6 Header FF 7 7 Header 8 8 EISA ID manufacturer name ( CMO ) D 9 9 EISA ID manufacturer name (Compressed ASCII) AF A ID product code (N54Z3-L3) 64 B ID product code (hex LSB first; N54Z3-L3) 5 2 C ID S/N (fixed ) 3 D ID S/N (fixed ) 4 E ID S/N (fixed ) 5 F ID S/N (fixed ) 6 Week of manufacture (fixed week code) 2 7 Year of manufacture (fixed year code) EDID structure version # ( ) 9 3 EDID revision # ( 3 ) Video I/P definition ( digital ) Max H image size ( 33.2 cm ) Max V image size ( 2.7 cm ) Display Gamma (Gamma = 2.2 ) Feature support ( Active off, RGB Color ) A 25 9 Rx, Rx, Ry, Ry, Gx, Gx, Gy, Gy F4 26 A Bx, Bx, By, By, Wx, Wx, Wy, Wy B Rx= C Ry= D Gx= E Gy=.555 8E 3 F Bx= By= Wx= Wy= Established timings Established timings Manufacturer s reserved timings Standard timing ID # Standard timing ID # 4 28 Standard timing ID # Standard timing ID # 2 6 / 28

17 Byte # Byte # Value Value Field Name and Comments (decimal) (hex) (hex) (binary) 42 2A Standard timing ID # B Standard timing ID # C Standard timing ID # D Standard timing ID # E Standard timing ID # F Standard timing ID # Standard timing ID # Standard timing ID # Standard timing ID # Standard timing ID # Standard timing ID # Standard timing ID # Detailed timing description # Pixel clock ( 9MHz, According to VESA CVT Rev.) 7C # Pixel clock (hex LSB first) 2E # H active ( 68 ) # H blank ( 6 ) A 58 3A # H active H blank ( 68 6 ) B # V active ( 5 ) A 6 3C # V blank ( 3 ) E 6 3D # V active V blank ( 5 3 ) E # H sync offset ( 48 ) F # H sync pulse width ("32 ) # V sync offset V sync pulse width ( 3 6 ) # H sync offset H sync pulse width V sync offset V sync width ( ) # H image size ( 33.2 mm ) 4B # V image size ( 27. mm ) CF # H image size V image size ( ) # H boarder ( ) 7 46 # V boarder ( ) 7 47 # Non-interlaced, Normal, no stereo, Separate sync, H/V pol Negatives Detailed timing description # # 2 Flag 74 4A # 2 Reserved 75 4B # 2 FE (hex) defines ASCII string (Model Name N54Z3-L3, ASCII) FE 76 4C # 2 Flag 77 4D # 2 st character of name ( N ) 4E 78 4E # 2 2nd character of name ( ) F # 2 3rd character of name ( 5 ) # 2 4th character of name ( 4 ) # 2 5th character of name ( Z ) 5A # 2 6th character of name ( 3 ) # 2 7th character of name ( - ) 2D # 2 8th character of name ( L ) 4C 7 / 28

18 Byte # Byte # Value Value Field Name and Comments (decimal) (hex) (hex) (binary) # 2 9th character of name ( ) # 2 9th character of name ( 3 ) # 2 New line character indicates end of ASCII string A # 2 Padding with Blank character # 2 Padding with Blank character 2 9 5A Detailed timing description # 3 9 5B # 3 Flag 92 5C # 3 Reserved 93 5D # 3 FE (hex) defines ASCII string (Vendor CMO, ASCII) FE 94 5E # 3 Flag 95 5F # 3 st character of string ( C ) # 3 2nd character of string ( M ) 4D 97 6 # 3 3rd character of string ( O ) 4F # 3 New line character indicates end of ASCII string A # 3 Padding with Blank character 2 64 # 3 Padding with Blank character 2 65 # 3 Padding with Blank character # 3 Padding with Blank character # 3 Padding with Blank character # 3 Padding with Blank character # 3 Padding with Blank character 2 6 6A # 3 Padding with Blank character 2 7 6B # 3 Padding with Blank character 2 8 6C Detailed timing description # 4 9 6D # 4 Flag 6E # 4 Reserved 6F # 4 FE (hex) defines ASCII string (Model Name N54Z3-L3, ASCII) FE 2 7 # 4 Flag 3 7 # 4 st character of name ( N ) 4E 4 72 # 4 2nd character of name ( ) # 4 3rd character of name ( 5 ) # 4 4th character of name ( 4 ) # 4 5th character of name ( Z ) 5A 8 76 # 4 6th character of name ( 3 ) # 4 7th character of name ( - ) 2D 2 78 # 4 8th character of name ( L ) 4C 2 79 # 4 9th character of name ( ) A # 4 9th character of name ( 3 ) B # 4 New line character indicates end of ASCII string A 24 7C # 4 Padding with Blank character D # 4 Padding with Blank character E Extension flag 27 7F Checksum DB 8 / 28

19 6. INTERFACE TIMING 6. INPUT SIGNAL TIMING SPECIFICATIONS The input signal timing specifications are shown as the following table and timing diagram. Signal Item Symbol Min. Typ. Max. Unit Note DCLK Frequency /Tc MHz (2) Vertical Total Time TV TH - Vertical Active Display Period TVD TH - DE Vertical Active Blanking Period TVB TV-TVD 3 TV-TVD TH - Horizontal Total Time TH Tc (2) Horizontal Active Display Period THD Tc (2) Horizontal Active Blanking Period THB TH-THD 8 TH-THD Tc (2) Note () Because of this module is operated by DE only mode, Hsync and Vsync are ignored. (2) 2 channels LVDS input. INPUT SIGNAL TIMING DIAGRAM TVD Tv DE TH DCLK DE TC THD DATA 9 / 28

20 6.2 POWER ON/OFF SEQUENCE Power On Power Off Restart 9% 9% t7 - Power Supply for LCD, Vcc V % t t2 t3 t4 % - LVDS Interface V Valid Data t5 t6 - Power for Lamp OFF 5% ON 5% OFF Timing Specifications.5 t ms t2 5 ms t3 5 ms t4 5 ms t5 2 ms t6 2 ms Note () Please follow the power on/off sequence described above. Otherwise, the LCD module might be damaged. Note (2) Please avoid floating state of interface signal at invalid period. When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to V. Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the interface signal is valid. The Backlight inverter power must be turned off before the power supply for the logic and the interface signal is invalid. Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To avoid this phenomenon, we suggest that the Vcc falling time is better to follow t7 ms. 2 / 28

21 7. OPTICAL CHARACTERISTICS 7. TEST CONDITIONS Item Symbol Value Unit Ambient Temperature Ta 25±2 o C Ambient Humidity Ha 5± %RH Supply Voltage V CC 3.3 V Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS" Inverter Current I L 6. ma Inverter Driving Frequency F L 6 KHz Inverter Sumida H5-495 The relative measurement methods of optical characteristics are shown in 7.2. The following items should be measured under the test conditions described in 7. and stable environment shown in Note (5). 7.2 OPTICAL SPECIFICATIONS Item Symbol Condition Min. Typ. Max. Unit Note Contrast Ratio CR (2), (5) Response Time T R ms T F -- 6 ms (3) Average Luminance of White L AVE cd/m 2 (4), (5) Rx Red θ x =, θ Y = Ry Viewing Normal Gx Green Angle Color Gy TYP.555 TYP -- () Chromaticity Bx Blue By White Wx Wy White Variation of 5 Points δw 5p θ x =, θ Y = % (5),(6) Viewing Angle θ x Horizontal θ x CR θ Y Vertical θ Y Deg. (), (5) 2 / 28

22 Note () Definition of Viewing Angle (θx, θy) Normal θx = θy = º θy- θy+ θx- = 9º x- θx θx+ y+ 2 o clock direction θy+ = 9º 6 o clock θy- = 9º y- x+ θx+ = 9º Note (2) Definition of Contrast Ratio (CR) The contrast ratio can be calculated by the following expression. Contrast Ratio (CR) = L63 / L L63 Luminance of gray level 63 L Luminance of gray level CR = CR () CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6). Note (3) Definition of Response Time (T R, T F ) % 9% Gray Level 63 Gray Level 63 Optical Response % Gray Level % Time T R T F ms ms 22 / 28

23 Note (4) Definition of Average Luminance of White (L AVE ) Measure the luminance of gray level 63 at 5 points L AVE = [L ()+ L (2)+ L (3)+ L (4)+ L (5)] / 5 L (x) is corresponding to the luminance of the point X at Figure in Note (6) Note (5) Measurement Setup The LCD module should be stabilized at given temperature for 2 minutes to avoid abrupt temperature change during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight for 2 minutes in a windless room. LCD M odule LCD P anel USB2 CS-T Center of the Screen 5 mm Light Shield Room (Ambient Luminance < 2 l u x) Note (6) Definition of White Variation (δw) Measure the luminance of gray level 63 at 5 points δw 5p = Minimum [L ()+ L (2)+ L (3)+ L (4)+ L (5)] / Maximum [L ()+ L (2)+ L (3)+ L (4)+ L (5)] Horizontal Line W W/4 W/2 3W/4 Vertical Line H H/4 H/2 3H/ X Test Point X= to 5 Active Area 23 / 28

24 8. PRECAUTIONS 8. ASSEMBLY AND HANDLING PRECAUTIONS () Do not apply rough force such as bending or twisting to the module during assembly. (2) To assemble or install module into user s system can be only in clean working areas. The dust and oil may cause electrical short or worsen the polarizer. (3) It s not permitted to have pressure or impulse on the module because the LCD panel and Backlight will be damaged. (4) Always follow the correct power sequence when LCD module is connecting and operating. This can prevent damage to the CMOS LSI chips during latch-up. (5) Do not pull the I/F connector in or out while the module is operating. (6) Do not disassemble the module. (7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and easily scratched. (8) It is dangerous that moisture come into or contacted the LCD module, because moisture may damage LCD module when it is operating. (9) High temperature or humidity may reduce the performance of module. Please store LCD module within the specified storage conditions. () When ambient temperature is lower than ºC may reduce the display quality. For example, the response time will become slowly, and the starting voltage of CCFL will be higher than room temperature. 8.2 SAFETY PRECAUTIONS () The startup voltage of Backlight is approximately Volts. It may cause electrical shock while assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit. (2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap. (3) After the module s end of life, it is not harmful in case of normal operation and storage. 24 / 28

25 9. PACKING 9. CARTON Figure. 9- Packing method 25 / 28

26 9.2 PALLET Figure. 9-2 Packing method 26 / 28

. DEFINITION OF LABELS. CMO MODULE LABEL The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation. N54Z3 -L3 N4X5 - L3 Rev.

27 . DEFINITION OF LABELS. CMO MODULE LABEL The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation. N54Z3 -L3 N4X5 - L3 Rev.XX E27943 MADE IN TAIWAN A X X X X X X X Y M D L N N N N C P (a) Model Name N54Z3 - L3 (b) Revision Rev. XX, for example A,, C, C2 etc. (c) Serial ID X X X X X X X Y M D X N N N N Serial No. CMO Internal Use Year, Month, Date CMO Internal Use Revision CMO Internal Use Serial ID includes the information as below (a) Manufactured Date Year ~9, for 2~29 Month ~9, A~C, for Jan. ~ Dec. Day ~9, A~Y, for st to 3 st, exclude I, O and U (b) Revision Code cover all the change (c) Serial No. Manufacturing sequence of product.2 CARTON LABEL 27 / 28

MODEL NO.: N089L6 - L03

MODEL NO.: N089L6 - L03 Doc No. 48536 Issued Date Feb. 26, 29 Model No. N89L6 - L3 TFT LCD Specification MODEL NO. N89L6 - L3 Customer Approved by Note 29-3-6 853 CST PMMD III Director annie_hsu( Director Accept /56522 / 54873)