DisplayPort * Interposer Test Fixture
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- Brice Parsons
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1 DisplayPort * Interposer Test Fixture DPI-P2RP / Plug to Receptacle Fixture: Features: The Interposer allows connection of test equipment to the DisplayPort interface signals. The fixture has been designed to pass signals with a minimum of loss, however keep in mind that any fixture will degrade high speed signals to some extent. The interposer allows access to signals in the following ways: Main Link (high speed): These signals can be measured with a high-speed differential oscilloscope probe by connecting to Test Pads TP1-TP8. A logic analyzer can be attached to J8. This footprint follows the design guide for Future Plus mid-bus probe for DisplayPort. See Future Plus document DisplayPort Logic Analyzer Probing Design Guide for the FS4430/35 available for download from Auxiliary Channel: The AUX Channel can be measured directly via pins J2 5, 7. The AUX Channel signal is buffered to drive 50 Ohms on J4, J5. A direction-sensing output suitable for triggering test equipment is provided on J3 2, 4. J2 1-4 provide options to connect 100K Ohm resistors to DP_PWR and Ground as required to perform test 3.18 of the CTS 1.1. J14 and J15 allow all connections of the Interposer to AUX Channel to be bypassed for straight-through connection DP_PWR: DP_PWR and DP_PWR Return can be accessed directly at J2 8, 6 respectively. J1 allows DP_PWR to be load-tested from 100 to 1000mA. DP_PWR Inrush Current: A 50m Ohm resistor in series with DP_PWR is provided at J17 to monitor inrush and steady-state current. HPD: HPD can be monitored on J2 9 or J2 10. DP_PWR User Config: Pins 13 and 14 of the DisplayPort interface, which can be used to sense DP_PWR User, are accessible on J3 6, 8. In addition, a 100 Ohm resistor is provided on J3 5, 7 to test DP_PWR User detection. USB for Interposer Power: J13 is a USB Mini-B connector that provides power to the active devices on the Interposer, so no power is drawn from the Source and Sink devices under test (except when using DP_PWR Load). All of the USB signals are routed to J for use in test automation. References: DisplayPort Specification version 1.1a (DP Spec.) DisplayPort PHY Compliance Test Specification version 1.1 (CTS) Available from *Other names and brands may be property of others.
2 Instructions for Use: Connect the Interposer to a powered USB port using the mini-b connector J13. This provides power for on-board circuitry. LED D2 illuminates to indicate power is present. Connect the Interposer to a DisplayPort Source device via Plug J6. Connect a Sink device via cable to J7. The Interposer is now ready to use. A number of measurements can be made and conditions set using the connectors and jumpers as follows. Refer to Figure 1 for location of connectors. Figure 1 Note: The DisplayPort Interposer is designed to minimize signal loss. However, it is highly recommended to use the shortest possible cables for interconnection to reduce overall signal losses.
3 J1: J1 is used to apply a test load to DP_PWR. Connect a voltmeter to J2 8 (+) and J2 11 or 12 (-). Use jumpers to apply a load current to DP_PWR as shown in Table 1. Remove jumpers when test is complete. Jumper Position DP_PWR Load Current Jumper Position DP_PWR Load Current J mA J ma J ma J ma J ma J ma J ma J ma J ma J ma J ma J ma J ma Table 1 Note: The DisplayPort Specification says DP_PWR is required to supply 500mA. The Interposer allows for load currents in excess of 500mA to test current limiting functions. J2: J2 is used to monitor the low-speed signals of the DisplayPort Interface. In addition, CTS test 3.18 can be performed. Pin Function Pin Function Pin Function J2-1 AUX - J2-5 AUX - J2-9 HPD J K to GND J2-6 DP_PWR Ret. J2-10 HPD J2-3 AUX + J2-7 AUX + J2-11 GND J K to DP_PWR J2-8 DP_PWR J2-12 GND Table 2 To perform CTS test 3.18: Connect a voltmeter to J2-8 (+) and J2-11 or 12 (-). Note the voltage of DP_PWR to GND. Apply jumpers to J2 1-2 and J Connect voltmeter (+) to J2-7 (AUX +) and note reading. Connect voltmeter to J2-5 (Aux -) and note reading. Check for readings within tolerance per the formula in CTS test Remove jumpers. J3: J3 provides signals for AUX Channel direction sensing, DP_PWR User Configuration and access to USB signals from J13. Pin Function Pin Function Pin Function J3-1 GND J Ohm to J3-7 J3-9 GND J3-2 AUX Comp. Out J3-6 Config 1 (J6 Pin 13) J3-10 USB VBUS J3-3 GND J Ohm to J3-5 J3-11 USB D + J3-4 AUX + Comp. Out J3-8 Config 2 (J6 Pin 14) J3-12 USB D - Table 3
4 AUX Comp Out: Current sense resistors on AUX + and AUX are monitored by comparators and those outputs are provided on J3 2, 4. These outputs can be used to trigger an oscilloscope, logic analyzer or other test equipment. See Table for polarity of outputs with direction. Pin Function Signal Indication J3-2 AUX Comp. Out Falling Edge First data edge of Source transmission J3-2 AUX Comp. Out Rising Edge First data edge of Sink transmission J3-4 AUX + Comp. Out Falling Edge Start of Source transmission J3-4 AUX + Comp. Out Rising Edge Start of Sink transmission Table 4 AUX_P_CMP provides an edge with the first transition on AUX + for Source or Sink. AUX_N_CMP provides an edge on the first data transition of both AUX+ and AUX- as shown here:
5 DP_PWR User: DP Spec. defines pins 13 and 14 for detection of devices that use DP_PWR. A Source or Sink that supports DP_PWR will supply 3.3V at 500mA when a connection of 100 Ohms or less between pins 13 and 14 is detected. Applying jumpers to J3 5-6 and J3 7-8 connects Pin 13 to Pin 14 through a 100 Ohm resistor. Applying jumpers from J3-6 to J3-8 connects pins 13 and 14 together directly. Applying a jumper from J3-6 to J3-9 or J3-8 to J3-9 will ground either of these pins. USB Access: The Interposer is powered via USB mini-b connector J13. All of the signals from J13 are available directly on J3. These signals are provided to facilitate the addition of a mezzanine card to the interposer that could include a USB transceiver and other logic for test automation or AUX monitor or control functions. J4, J5: AUX + and are digitally buffered (not analog-signal accurate) and output on SMA connectors J5 and J4, respectively. The buffer is designed to drive 50 Ohm loads. Input to the buffer presents a 2K Ohm AC-coupled load to the AUX signals. J6: DisplayPort Interposer Input Connector. Connect to Source device. J7: DisplayPort Interposer Output Connector. Connect to Sink device. J8: J8 provides the footprint needed to install a FuturePlus mid-bus probe for DisplayPort. The midbus probe allows for connection of a logic analyzer to the high speed (Main Link) signals of the DisplayPort Interface. Only the board contacts are provided on the Interposer; additional components are required to connect the probe. See and an_dp.pdf for details. Pin Function Pin Function Pin Function J8-1 ML 0 + J8-9 ML1 - J8-17 GND J8-2 GND J8-10 No Connect J8-18 No Connect J8-3 ML 0 - J8-11 GND J8-19 ML 3 + J8-4 No Connect J8-12 No Connect J8-20 GND J8-5 GND J8-13 ML 2 + J8-21 ML 3 - J8-6 No Connect J8-14 GND J8-22 No Connect J8-7 ML 1 + J8-15 ML 2 - J8-23 GND J8-8 GND J8-16 No Connect J8-24 No Connect Table 6 J14, J15: J14 & J15 are provided to bypass the Interposer attachments to the AUX signals. For example, when in Bypass mode, the direction sensing resistors and the inputs to the buffer circuits are disconnected and the AUX Channel signals are routed directly from J6 to J7. The following are the connection schemes: Jumper J and J15 2-4: Bypass mode. AUX + and AUX are routed directly from J6 to J7. AUX signals can still be accessed at J2 5, 7. Use this mode to measure AUX Channel signal amplitude, to compare signals with and without other Interposer features enabled and if you experience any AUX Channel signal issue when using the Interposer.
6 Jumper J14 1-2, J14 3-4, J15 1-2, J15 3-4: Use this mode for normal use. Direction sensing resistors are placed in series from J6 to J7. Inputs to AUX Comp and AUX Channel buffers are connected. AUX Comp and buffered outputs are active. No jumpers on J14, J15: The signal path for AUX Channel from J6 to J7 is broken. The J6 side of AUX + appears on J14-2. The J7 side of AUX + appears on J14-4. The J6 side of AUX - appears on J15-2. The J7 side of AUX + appears on J15-4. This mode can be used to insert AUX traffic as in the case of an AUX Channel Controller for test use, or for other monitoring or control functions where the AUX signal path must be intercepted. Note: this mode will not allow normal Source-Sink functions as the AUX signal path is open. J16, 17: J17 is connected across a 50m Ohm resistor in series with DP_PWR. This resistor can be used to measure the current flowing in DP_PWR. Connect an oscilloscope across J17 to measure Inrush Current and a voltmeter to measure steady-state current. Connect a jumper across J17 to bypass the 50m Ohm resistor. J16 breaks the signal path of DP_PWR between J6 (Source DP connector) and J17 to allow injection of power or signal. Connect a jumper across J16 for normal operation. TP-1 through TP-8: These pads are provided to probe the high-speed (Main Link) signals using a highspeed differential probe or similar device. Note that probing these signals may degrade them to the point of affecting system performance. Consult the probe specifications to determine loading effects. Pin Function Pin Function TP-1 Main Link 0 + TP-5 Main Link 2 + TP-2 Main Link 0 - TP-6 Main Link 2 - TP-3 Main Link 1 + TP-7 Main Link 3 + TP-4 Main Link 1 - TP-8 Main Link 3 - Table 7 Contact Information: Tel: service@allion.com
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