SV5100G3/SV5200G3. User Manual

Transcription

1 SV5100G3/SV5200G3 User Manual Version 1.0 February Copyright All rights reserved.

2 Copyright Copyright 2018 by Wiwynn Corporation. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual or otherwise, without the prior written permission of Wiwynn Corporation. Disclaimer The information in this guide is subject to change without notice. Wiwynn Corporation makes no representations or warranties, either expressed or implied, with respect to the contents hereof and specifically disclaims any warranties of merchantability or fitness for any particular purpose. Any Wiwynn Corporation software described in this manual is sold or licensed "as is". Should the programs prove defective following their purchase, the buyer (and not Wiwynn Corporation, its distributor, or its dealer) assumes the entire cost of all necessary servicing, repair, and any incidental or consequential damages resulting from any defect in the software. 2 SV5100G3/SV5200G3 User Manual

3 Revision History Date Version Changes 2017/11/ First draft 2017/11/ Added jumpers and LEDs locations, updated jumper and LED tables. 2018/02/ Added sections 5.5 and 5.6 regarding SOL. First release. SV5100G3/SV5200G3 User Manual 3

4 Contents Contents... 4 Preface... 8 About this Manual... 8 Conventions... 9 Acronyms Information for Your Safety and Comfort System Tour System Specification SV5100G3 Specification SV5200G3 Specification System Overview SV5100G3 (1U System) SV5200G3 (2U System) SV5100G3 System Components SV5200G3 System Components Front Panel SV5100G3 Front Panel SV5200G3 Front Panel Front Panel LEDs Rear Panel SV5100G3 Rear Panel SV5200G3 Rear Panel Mainboard Mainboard Layout Mainboard Jumpers Mainboard LEDs SV5100G3/SV5200G3 User Manual

5 2 System Upgrades Recommended Tools Replacing the Top Cover Removing the Top Cover Installing the Top Cover Replacing the SV5200G3 System Hard Disk Drives Removing the Hard Disk Drive Installing the Hard Disk Drive Replacing the SV5200G3 System Upper Tray Removing the SV5200G3 Upper Tray Installing the SV5200G3 Upper Tray Replacing the Fan Removing the Fan Installing the Fan Replacing the Memory Module Removing the Memory Module Installing the Memory Module Replacing the Air Duct Removing the Air Duct Installing the Air Duct Replacing the Power Supply Unit (PSU) Removing the PSU Installing the PSU Replacing the Processor Heat sink Module (PHM) Removing the PHM Installing the PHM Replacing the FPGA Card Removing the FPGA Card Installing the FPGA Card SV5100G3/SV5200G3 User Manual 5

6 2.11 Replacing the TPM Removing the TPM Installing the TPM Replacing the PCIe Card Removing the PCIe Card Installing the PCIe Card Replacing the Battery Removing the Battery Installing the Battery Replacing the Optional M.2 Adapter Card and SSD Module Removing the M.2 Adapter Card Removing the M.2 SSD Module Installing the M.2 SSD Module Installing the M.2 Adapter Card Replacing the Mainboard Removing the Mainboard Installing the Mainboard BIOS Setup Entering BIOS Setup BIOS Hotkeys Menu Bar Navigation Keys Main Advanced Platform Configuration Socket Configuration Server Management Security SV5100G3/SV5200G3 User Manual

7 3.11 Boot Save & Exit Error Code List Post code table PEI Phase DXE Phase OS phase DIMM error code post MRC Error Event Log MRC Warning Code MRC fatal error codes BMC BMC Function Overview IPMI-compliant Functions Non-IPMI Functions BMC Firmware Functional Description Chassis Power Management Watchdog Timer System Event Log (SEL) Field Replaceable Unit (FRU) Serial-over-LAN (SOL) Power Policy Fan Speed Control Integrated Front Panel User Interface Sensor Monitoring Threshold Sensors Discrete and Event-Only Sensors BMC Firmware Management BMC Firmware Update SV5100G3/SV5200G3 User Manual 7

8 Preface SV5100G3 (1U system) and SV5200G3 (2U system) are optimized to provide front cable access (cold aisle) for networking while supporting standard PCIe cards to provide flexibility and optimize the number of available configurations. It is designed to support integrated or rear access 12V Power Supply Units (PSUs) and management functionality. About this Manual The contents in this manual include: Chapter 1 describes the system specification, front and rear panels, and internal components Chapter 2 shows how to open the system cover and replace the system components Chapter 3 lists the error codes Chapter 4 shows a brief description of the BIOS screens and functions Chapter 5 gives an overview of the BMC functions 8 SV5100G3/SV5200G3 User Manual

9 Conventions CAUTION Indicates the presence of a hazard that may cause minor personal injury or property damage if the CAUTION is ignored. Indicates the presence of a hazard that may result in serious personal injury if the WARNING is ignored. WARNING SV5100G3/SV5200G3 User Manual 9

10 Acronyms Here is a list of acronyms containing some of the more common terms and what they stand for. Note that not all of these acronyms appear in this manual. Acronym AOC BMC CPLD CRB DHCP DIMM DoE DPC EIA FRU GPIO HDD HPC HTTP I2C IaaS IMC IP IPMI Definition Active Optical Cable Baseboard Management Controller Complex Programmable Logic Device Customer Reference Board Dynamic Host Configuration Protocol Dual Inline Memory Module Debug over Ethernet DIMM per Channel Electronic Industries Alliance Field Replaceable Unit General Purpose Input/Output Hard Disk Drive High Performance Computing HyperText Transfer Protocol Inter-Integrated Circuit Infrastructure as a Service Integrated Management Controller Internet Protocol Intelligent Platform Management Interface 10 SV5100G3/SV5200G3 User Manual

11 Acronym JTAG KVM LAMP LAN MAC NIC OCP OEM OS PaaS PBL PCIe PHM PHY POST PSU PUE RAID RGMII ROT SaaS SAS SATA SD Definition Joint Test Action Group Kernel-based Virtual Machine Linux-Apache-MySQL-PHP Local Area Network Media Access Controller Network Interface Card Open Compute Project Original Equipment Manufacturer Operating System Platform as a Service Primary Boot Loader Peripheral Component Interconnect Express Processor Heat sink Module Physical Layer Power-On Self-Test Power Supply Unit Power Usage Effectiveness Redundant Array of Independent Disks Reduced Gigabit Media Independent Interface Root Of Trust Software as a Service Serial Attached SCSI Serial Advanced Technology Attachment Secure Digital SV5100G3/SV5200G3 User Manual 11

12 Acronym SDR SDN SEL SGMII SoC SOL SPI SQL SSD SSH SSL TCO TCP ToR TPM UEFI USB VCCI VPC VPN VPS WEEE Definition Sensor Data Record Software-Defined Networking System Event Log Serial Gigabit Media Independent Interface System-on-Chip Serial Over LAN Serial Peripheral Interface Structured Query Language Solid-State Drive Secure Shell Secure Sockets Layer Total Cost of Ownership Transmission Control Protocol Top of Rack Trusted Platform Module Unified Extensible Firmware Interface Universal Serial Bus Voluntary Control Council for Interference by Information Technology Equipment Virtual Private Cloud Virtual Private Network Virtual Private Server Waste from Electrical and Electronics Equipment 12 SV5100G3/SV5200G3 User Manual

13 Information for Your Safety and Comfort Safety Instructions Read these instructions carefully. Keep this document for future reference. Follow all warnings and instructions marked on the product. Power Off the Product before Cleaning Unplug this product from the wall outlet before cleaning. Do not use liquid cleaners or aerosol cleaners. Use a damp cloth for cleaning. Warnings Do not use this product near water. Do not place this product on an unstable cart, stand or table. If the product falls, it could be seriously damaged. Slots and openings are provided for ventilation to ensure reliable operation of the product and to protect it from overheating. These openings must not be blocked or covered. The openings should never be blocked by placing the product on a bed, sofa, rug or other similar surface. This product should never be placed near or over a radiator or heat register, or in a built-in installation unless proper ventilation is provided. Never push objects of any kind into this product through slots as they may touch dangerous voltage points or short-out parts that could result in a fire or electric shock. Never spill liquid of any kind onto or into the product. SV5100G3/SV5200G3 User Manual 13

14 To avoid damage of internal components and to prevent battery leakage, do not place the product on a vibrating surface. Never use it under sporting, exercising, or any vibrating environment which will probably cause unexpected short current or damage rotor devices, and even exposure risk from lithium battery. Using Electrical Power This product should be operated from the type of power indicated on the marking label. If you are not sure of the type of power available, consult your dealer or local power company. Product Servicing Do not attempt to service this product yourself, as opening or removing covers may expose you to dangerous voltage points or other risks. Refer all servicing to qualified service personnel. When servicing the hot-swappable system fans while power is on, replace one system fan at a time to avoid system malfunction. Use both hand to support this product when removing or installing it from the rack. Do not lift this product using the fan handles. Remove this product from the rack to cut off the power and refer servicing to qualified service personnel when: liquid was spilled into the product the product was exposed to rain or water the product has been dropped or the case has been damaged 14 SV5100G3/SV5200G3 User Manual

15 the product exhibits a distinct change in performance, indicating a need for service the product does not operate normally after following the operating instructions NOTE: Adjust only those controls that are covered by the operating instructions, since improper adjustment of other controls may result in damage and will often require extensive work by a qualified technician to restore the product to normal condition. Disposal Instructions Do not throw this electronic device into the trash when discarding. To minimize pollution and ensure utmost protection of the global environment, please recycle. For more information on the Waste from Electrical and Electronics Equipment (WEEE) regulations, please visit the local WEEE website. SV5100G3/SV5200G3 User Manual 15

16 1 System Tour 1.1 System Specification SV5100G3 Specification Processor, Memory and Chipset CPU Memory Chipsets System Bus Processor Sockets Intel Xeon Processor 8171M 24 DIMM slots; Up to 1536GB; DDR4 up to 2666 MT/s Intel C621 series Integrated Intel QuickAssist Technology TPM 2.0 RAID 0/1/10 Intel UltraPath Interconnect; 10.4GT/s; 9.6 GT/s Two Storage, Networking and I/O Storage One 3.5 drive bays (optional): SAS/SATA HDDs M.2 SSD 2242/2260/2280 Module 8 (4 on M.2 PCIe card) (expandable to 16 M.2 SSDs with Wiwynn P16M4/P08M4) Expansion slots LOM Three PCI-E x16 FHHL slots Two PCI-E x8 FHHL slots 1x 10GbE from PCH on SFP+ Connector 16 SV5100G3/SV5200G3 User Manual

17 Server Management Chipset Interface BMC Aspeed AST1250/AST2400 Representational State Transfer (REST) API Windows Management Instrumentation (WMI) Power Supply and Physical Specifications Power Supply Form Factor and Dimensions Weight 1000 watts 43.5 (H) x 441 (W) x 920 (D) 8 Kg OS Support List Windows Server 2012 R2 SV5100G3/SV5200G3 User Manual 17

18 1.1.2 SV5200G3 Specification Processor, Memory and Chipset CPU Memory Chipsets System Bus Processor Sockets Intel Xeon Processor 8171M 24 DIMM slots; Up to 1536GB; DDR4 up to 2666 MT/s Intel C621 series Integrated Intel QuickAssist Technology TPM 2.0 RAID 0/1/10 Intel UltraPath Interconnect; 10.4GT/s; 9.6 GT/s Two Storage, Networking and I/O Storage Six to twelve 3.5 drive bays : SAS/SATA HDDs M.2 SSD 2242/2260/2280 Module 8 (4 on M.2 PCIe card) (expandable to 16 M.2 SSDs with Wiwynn P16M4/P08M4) Expansion slots LOM Three PCI-E x16 FHHL slots Two PCI-E x8 FHHL slots 1x 10GbE from PCH on SFP+ Connector 18 SV5100G3/SV5200G3 User Manual

19 Server Management Chipset Interface BMC Aspeed AST1250/AST2400 Representational State Transfer (REST) API Windows Management Instrumentation (WMI) Power Supply and Physical Specifications Power Supply Form Factor and Dimensions Weight 1000 watts 87.5 (H) x 441 (W) x 920 (D) 16 Kg OS Support List Windows Server 2012 R2 SV5100G3/SV5200G3 User Manual 19

20 1.2 System Overview SV5100G3 (1U System) SV5200G3 (2U System) 20 SV5100G3/SV5200G3 User Manual

21 1.2.3 SV5100G3 System Components SV5100G3/SV5200G3 User Manual 21

22 1.2.4 SV5200G3 System Components Upper Tray Lower Tray 22 SV5100G3/SV5200G3 User Manual

23 1.3 Front Panel The illustration below shows the system front panel SV5100G3 Front Panel Item Component 1 Latch 2 PCIe Slot #5 3 PCIe Slot #4 4 PCIe Slot #3 5 Latch 6 Slot for BMC MAC address information label 7 USB 3.0 Ports 8 Attention LED 9 UID LED 10 Power Status LED 11 1 GbE Management Port SV5100G3/SV5200G3 User Manual 23

24 1.3.2 SV5200G3 Front Panel Item Component 1 Upper Tray 2 Latch 3 PCIe Slot #5 4 PCIe Slot #4 5 PCIe Slot #3 6 Latch 7 Slot for BMC MAC address information label 8 USB 3.0 Ports 9 Attention LED 10 UID LED 11 Power Status LED 12 1 GbE Management Port 13 Lower Tray 24 SV5100G3/SV5200G3 User Manual

25 1.3.3 Front Panel LEDs The 1U and 2U system front panel LEDs (on the lower tray) are on the same locations. UID LED This blue LED used to help visually locate a specific blade within a data center. Blade Attention LED The blade attention LED directs the service technicians to the blade that requires service. When possible, blade diagnostics are used to direct repairs. The attention LED is driven by a single BMC GPIO. The following table describes the operation of the blade attention LED. LED Status OFF Solid RED Condition No attention indicated System needs attention SV5100G3/SV5200G3 User Manual 25

26 Blade Power Status LED When a blade is first inserted, this LED turns amber if 12V is present at the output of the Hot Swap Controller (HSC). This assures that the 12V power is connected and present at the mainboard and that the HSC is enabled. When the blade management software turns on the system power (CPU/Memory/PCIe), the power status LED turns green. Note that the power status LED may be driven by an analog resistor network tied directly to a power rail, and is not an indication of the health of the blade. LED Status OFF ON Solid Amber ON Solid Green Condition 12V power is absent or blade_en# is de-asserted. Blade_EN# is asserted, 12V power output from the Hot Swap Controller is present. Indicates that the management (BMC or IE) is booted and system power is enabled (CPU/Memory/PCIe). 26 SV5100G3/SV5200G3 User Manual

27 1.4 Rear Panel SV5100G3 Rear Panel Item Component 1 Fans 0 to 5 2 Perforation for PSU fans 3 PSU FCI Connector SV5100G3/SV5200G3 User Manual 27

28 1.4.2 SV5200G3 Rear Panel Item Component 1 Fans 0 to 9 2 Perforation for PSU fans 3 PSU FCI Connector 28 SV5100G3/SV5200G3 User Manual

29 1.5 Mainboard SV5100G3 and SV5200G3 have the same mainboard Mainboard Layout No. Description 1 PCIe slot 2 2 PCIe slot 3 3 Battery holder 4 USB 3,0 ports SV5100G3/SV5200G3 User Manual 29

30 No. Description 5 Front LEDs 6 M.2 slot 2 7 M.2 slot 1 8 BMC connector 9 PCIe slot 5 10 BMC GbE port 11 M.2 slot 3 12 M.2 slot 4 13 DIMM slots G2, G1. H2, H1, J2, J1 14 PSU Mgmt 1 connector 15 PSU 12V connector 16 CPU1 socket 17 1U fan connector 18 2U fan connector 19 DIMM slots A2, A1. B2, B1, C2, C1, M1, M2, L1, L2, K1, K2 20 SATA 8-11 power connector 21 SATA 4-7 power connector 22 CPU0 socket 23 SATA 2-3 power connector 24 SATA 0-1 power connector 25 DIMM slots F1, F2. E1, E2, D1, D2 26 PCIe slot 4 27 PCH 28 PCIe slot 1 30 SV5100G3/SV5200G3 User Manual

31 1.5.2 Mainboard Jumpers Jumper Locations SV5100G3/SV5200G3 User Manual 31

32 Jumper Settings Jumper Description Settings JP2 ME Recovery mode 1-2 Normal (default) 2-3 ME force update JP3 SATA RAID KEY No jumper Normal (default) 3-4 SATA RAID Key JP9 BIOS Recovery mode 1-2 Normal (default) 2-3 Recovery BIOS JP10 IE disable 1-2 Normal (default) 2-3 IE disable JP11 Password clear 1-2 Normal (default) 2-3 Password clear JP12 BIOS USB Recovery 1-2 Normal (default) 2-3 BIOS USB flash recovery mode JP13 Clear CMOS 1-2 Normal (default) 2-3 Clear RTC registers JP14 IE debug 1-2 Normal (default) 2-3 SMBUS UART NOT PRESENT JP15 BMC Disable 1-2 Normal (default) JP19 (ARM CPU operation) BIOS MRC DEBUG MSG disable 2-3 BMC (ARM CPU operation) disable 1-2 Normal (default) 2-3 BIOS MRC DEBUG MSG enable JP21 BMC Disable No jumper Normal (default) (BMC SRST#) 1-2 Holds BMC in reset JP23 PS PWROK delay enable No jumper - Normal(default) 1-2 PWROK delay enable JPB1 FM_BSCKUP_BIOS_SEL 1-2 Normal( default) 2-3 BIOS1 JPB2 CPLD ALL POWER ON No jumper Normal (default) 1-2 All Power on JPC1 BMC JTAG SELECT 1-2 PLD/SLOT4 (default) 2-3 XDP JPC2 FM_BIOS_SPI_BMC_CTL 1-2 Normal (default) 2-3 BMC 32 SV5100G3/SV5200G3 User Manual

33 1.5.3 Mainboard LEDs The following sections describe the light-emitting diodes (LEDs) used as indicators on each system. All LEDs shall be visible at the front of the blade (cold aisle). LED Locations LED Status Location/ Function LED5 BOOT-UP Ready LED6 BMC Heartbeat LED7:14 Post Code Color Status Description Green On Boot-up ready (default) ; Off Boot-up not ready Green Blinking Indicates BMC is alive Green On Indicates the Boot status of the Off blade (Port 80) SV5100G3/SV5200G3 User Manual 33

34 Location/ Function LED17 P5V Stby OK LED18 SATA HDD status LED19 GbE Port 0 Activity LED21 GbE Port 0 Speed LED27:34 CPLD Debug LED36 P12V Power Fail LED39 M.2#2 driver active LED40 M.2#1 driver active LED B1 M.2#3 driver active LED B2 M.2#4 driver active LED41 BEEP LED45 Power Status LED46 Blade Attention LED47 UID LED Color Status Description Green On P5V STBY power is present (default) Off P5V STBY power is mot readt Green On Indicates R/W activity to HDDs Off HDD not active (default) Green On Indicates activity on 10GbE Port 0 (not supported for production) Green On High speed Amber On Low speed (not supported for production) Green On Depends on CPLD debug Off operation. Green On P12V Power Fail Off P12V ok (default) Green On M.2#2 drive active Off M.2#2 drive not active (default) Green On M.2#1 drive active Off M.2#1 drive not active (default) Green On M.2#3 drive active Off M.2#3 drive not active (default) Green On M.2#4 drive active Off M.2#4 drive not active (default) Green On PCH BEEP enable Off PCH BEEP disable (default) Off 12V power is absent or Blade_EN# is de-asserted Amber On Blade_EN# is asserted, 12V power output from the Hot Swap Controller is present. Green On Management is booted and system power is enabled. Red On Indicates that blade requires servicing Off No servicing required Blue On Visually locate a specific blade in data center Off No identification 34 SV5100G3/SV5200G3 User Manual

35 Location/ Function LED48 PSU1 Status LED50 PSU2 Status LED54 Catastrophic Error Color Status Description Green Solid on AC and DC Power Good Blinking Battery charging Yellow Solid on PSU fault indicated Blinking Operating on internal battery supply Yellow/ Blinking Indicated one of two AC feeds has Green failed. Green Solid on AC and DC Power Good Blinking Battery charging Yellow Solid on PSU fault indicator Blinking Operating on internal battery supply Yellow/ Blinking Indicated one of two AC feeds has Green failed. Red On Indicates that a CPU catastrophic error has occurred Off No error (default) SV5100G3/SV5200G3 User Manual 35

36 2 System Upgrades NOTE: The components shown in this chapter are for your reference in replacement only. Actual component may vary and may not reflect the appearance of the component. 2.1 Recommended Tools In replacing or upgrading components, you will need the following tools: Philips screwdriver Flat screwdriver Torque screwdriver with T8 and T30 hexagon torx bits as shown below 36 SV5100G3/SV5200G3 User Manual

37 2.2 Replacing the Top Cover The procedures for replacing the top cover for SV5100G3 and SV5200G3 systems are the same Removing the Top Cover 1 Loosen the thumbscrews on the rear of the chassis. 2 Lift the top cover from the chassis. SV5100G3/SV5200G3 User Manual 37

38 2.2.2 Installing the Top Cover 1 Make sure the notches on the top cover are properly inserted into the gaps on the front cover. 2 Lower the top cover until it is properly closed. 38 SV5100G3/SV5200G3 User Manual

39 3 Tighten the thumbscrews on the rear of the chassis. SV5100G3/SV5200G3 User Manual 39

40 2.3 Replacing the SV5200G3 System Hard Disk Drives Removing the Hard Disk Drive 1 Perform the "Removing the Top Cover" procedure on page Pull up the HDD retention pin (1) and slide the HDD module (2) in the direction indicated. 3 Remove the HDD. 4 Repeat steps 1 and 2 to remove other HDDs. 40 SV5100G3/SV5200G3 User Manual

41 2.3.2 Installing the Hard Disk Drive 1 Lower the HDD module (1) into the chassis. Slide and latch the HDD (2) to its connector. The HDD retention pin will click into place. 2 Repeat step 1 to install other HDDs. 3 Perform the "Installing the Top Cover" procedure on page 38. SV5100G3/SV5200G3 User Manual 41

42 2.4 Replacing the SV5200G3 System Upper Tray Removing the SV5200G3 Upper Tray 1 Perform the "Removing the Top Cover" procedure on page Lift and remove the air duct from the upper tray. 3 Remove the cable covers by squeezing the latch (1) and lifting up the cover (2). 42 SV5100G3/SV5200G3 User Manual

43 4 Disconnect all cables from the upper tray. 5 Remove all screws from the left and right sides of the chassis. SV5100G3/SV5200G3 User Manual 43

44 6 Remove the upper tray. 44 SV5100G3/SV5200G3 User Manual

45 2.4.2 Installing the SV5200G3 Upper Tray 1 Lower the upper tray into the chassis. 2 Secure all screws on the left and right sides of the chassis SV5100G3/SV5200G3 User Manual 45

46 3 Connect all cables to the upper tray. 4 Lower the cable cover (1) and squeeze the latch (2) so the cable cover can be inserted properly. 46 SV5100G3/SV5200G3 User Manual

47 5 Install the upper tray air duct. 6 Perform the "Installing the Top Cover" procedure on page 38. SV5100G3/SV5200G3 User Manual 47

48 2.5 Replacing the Fan The procedures for replacement of the components starting from this section are the same for the SV5100G3 system and the SV5200G3 system lower tray. For SV5200G3 system, first remove the upper tray (see "Removing the SV5200G3 Upper Tray" on page 42) before replacing the components Removing the Fan 1 Perform the "Removing the Top Cover" procedure on page Locate the fans (see "System Overview" on page 20) and look for their corresponding fan cables. 3 Open the cable clip that secures the fan cables to the chassis. 48 SV5100G3/SV5200G3 User Manual

49 4 Locate the cable for the fan you want to remove. Disconnect the cable from the cable connector by pressing the latch (1) and releasing the cable connector (2). 5 Pull out the fan. SV5100G3/SV5200G3 User Manual 49

50 6 Make sure that fan cable connector passes through the hole on the chassis. 7 Repeat steps 4 to 6 to remove other fans. 50 SV5100G3/SV5200G3 User Manual

51 2.5.2 Installing the Fan 1 Insert the fan cable through the hole on the chassis. 2 Insert the fan into the chassis. SV5100G3/SV5200G3 User Manual 51

52 3 Connect the fan cable to the cable connector. 4 Insert the fan cable into the cable clip and close the cable clip. 5 Repeat steps 1 to 4 to install other fans. 6 Perform the "Installing the Top Cover" procedure on page SV5100G3/SV5200G3 User Manual

53 2.6 Replacing the Memory Module Removing the Memory Module 1 Perform the "Removing the Top Cover" procedure on page Open the locking clips (1) that secure the memory module and gently pull the DIMM upward (2) to remove it from the mainboard. SV5100G3/SV5200G3 User Manual 53

54 2.6.2 Installing the Memory Module 1 Insert the memory module into the DIMM slot (1), then push downward until the locking clips lock (2) into place. 2 Perform the "Installing the Top Cover" procedure on page SV5100G3/SV5200G3 User Manual

55 2.7 Replacing the Air Duct Removing the Air Duct 1 Perform the "Removing the Top Cover" procedure on page Lift and remove the air duct Installing the Air Duct 1 Insert the air duct. 2 Install the top cover (see "Installing the Top Cover" on page 38). SV5100G3/SV5200G3 User Manual 55

56 2.8 Replacing the Power Supply Unit (PSU) Removing the PSU 1 Perform the "Removing the Top Cover" procedure on page Perform the "Removing the Air Duct" procedure on page Disconnect the PSU mgmt cable from the power supply unit. 4 Disconnect the PSU 12V cable from the power supply unit. 56 SV5100G3/SV5200G3 User Manual

57 5 Use a torque driver with a T8 torx bit to remove the screws that secure the power supply unit to the chassis. 6 Remove the screw washers. SV5100G3/SV5200G3 User Manual 57

58 7 Lift (1) and remove (2) the power supply unit from the chassis. 58 SV5100G3/SV5200G3 User Manual

59 2.8.2 Installing the PSU 1 Insert (1) and lower (2) the power supply unit into the chassis. 2 Connect the PSU 12V cable to the power supply. SV5100G3/SV5200G3 User Manual 59

60 3 Connect the PSU1 Mgmt cable to the power supply. 4 Insert the screw washers. 60 SV5100G3/SV5200G3 User Manual

61 5 Insert the screws and use a torque driver with a T8 torx bit to tighten the screws to secure the power supply unit to the chassis. 6 Perform the "Installing the Air Duct" procedure on page Perform the "Installing the Top Cover" procedure on page 38. SV5100G3/SV5200G3 User Manual 61

62 2.9 Replacing the Processor Heat sink Module (PHM) The processor heat sink module (PHM) refers to the subassembly where the heat sink and processor are clipped together prior to installation. This allows for a more robust installation by providing better alignment features and keeping fingers away from the socket contact field. The other benefit of this style of socket loading is that it minimizes the board space used by the retention mechanism Removing the PHM 1 Perform the "Removing the Top Cover" procedure on page Perform the "Removing the Air Duct" procedure on page Remove the screws on both sides of the chassis using a torque driver with a T8 torx bit. 62 SV5100G3/SV5200G3 User Manual

63 4 Use a torque driver with a T8 torx bit to remove the screws that secure the internal bracket to the chassis. 5 Remove the internal bracket from the chassis. SV5100G3/SV5200G3 User Manual 63

64 6 Use a torque driver with a T30 torx bit to loosen the four heat sink screws in the following sequence: CPU0: 8,7, 4, 3 CPU1: 6, 5, 2, 1 7 Lift and remove the PHM and optional remote heat sink. 64 SV5100G3/SV5200G3 User Manual

65 2.9.2 Installing the PHM 1 Lower the PHM and optional remote heat sink ensuring all four screw holes on each heat sink align with the bolster plate screws on the chassis. 2 Use a torque driver with a T30 torx bit to tighten the four heat sink screws in the following sequence: CPU0: 3, 4, 7, 8 CPU1: 1, 2, 5, 6 SV5100G3/SV5200G3 User Manual 65

66 3 Lower the internal bracket into the chassis until it is firmly seated. 4 Use a torque driver with a T8 torx bit.to tighten the screws that secure the internal bracket to the chassis. 66 SV5100G3/SV5200G3 User Manual

67 5 Tighten the screws on both sides of the chassis using a torque driver with a T8 torx bit. 6 Perform the "Installing the Air Duct" procedure on on page Perform the "Installing the Top Cover" procedure on page 38. SV5100G3/SV5200G3 User Manual 67

68 2.10 Replacing the FPGA Card The FPGA card should always be installed in PCIe slot Removing the FPGA Card 1 Perform the "Removing the Top Cover" procedure on page Loosen the screws from the front panel using a torque driver with a T8 torx bit. 3 Loosen the screws from the top of front panel bracket using a torque driver with a T8 torx bit. 4 Remove the front panel bracket. 68 SV5100G3/SV5200G3 User Manual

69 5 Open the riser card locking clip. 6 Remove the OCuLink cable connector from the FPGA card. SV5100G3/SV5200G3 User Manual 69

70 7 Press the post to disengage the FPGA card. 8 Lift and remove the FPGA card and riser card from the mainboard. 70 SV5100G3/SV5200G3 User Manual

71 9 Disconnect the signal cable connector from the mainboard. 10 Detach the FPGA card from the riser card. SV5100G3/SV5200G3 User Manual 71

72 Installing the FPGA Card 1 Insert the FPGA card into the riser card connector. 2 Connect the signal cable connector to the mainboard. 3 Insert the FPGA card and riser card into the mainboard. 72 SV5100G3/SV5200G3 User Manual

73 4 Make sure the FPGA card is properly inserted into the post. 5 Connect the OCuLink cable connector to the FPGA card. SV5100G3/SV5200G3 User Manual 73

74 6 Close the riser card locking clip. 7 Install the front panel bracket. 8 Tighten the screws on the front panel using a torque driver with a T8 torx bit. 74 SV5100G3/SV5200G3 User Manual

75 9 Tighten the screws on top of front panel bracket using a torque driver with a T8 torx bit. 10 Perform the "Installing the Top Cover" procedure on page 38. SV5100G3/SV5200G3 User Manual 75

76 2.11 Replacing the TPM Removing the TPM 1 Perform the "Removing the Top Cover" procedure on page The TPM is located behind PCIe slot 4. If there is a PCIe card installed in PCIe slot 4, perform the "Removing the FPGA Card" procedure on page Remove the screw that secures the TPM to the mainboard. 76 SV5100G3/SV5200G3 User Manual

77 Installing the TPM 1 Tighten the screw to secure the TPM to the mainboard. 2 If you remove a FPGA card from PCIe slot 4, perform the "Installing the FPGA Card" procedure on page Perform the "Installing the Top Cover" procedure on page 38. SV5100G3/SV5200G3 User Manual 77

78 2.12 Replacing the PCIe Card Except for the FPGA card, other PCIe cards can be installed in either PCIe slot 3 or Removing the PCIe Card 1 Perform the "Removing the Top Cover" procedure on page Loosen the screws from the front panel using a torque driver with a T8 torx bit. 3 Loosen the screws from the top of front panel bracket using a torque driver with a T8 torx bit. 4 Remove the front panel bracket. 78 SV5100G3/SV5200G3 User Manual

79 5 Open the riser card locking clip. 6 Lift and remove the PCIe card and riser card from the mainboard. 7 Detach the PCIe card from the riser card. SV5100G3/SV5200G3 User Manual 79

80 Installing the PCIe Card 1 Insert the PCIe card into the riser card connector. 2 Lower the PCIe card with riser card until the riser card is properly inserted into its slot on the mainboard. 3 Close the riser card locking clip. 80 SV5100G3/SV5200G3 User Manual

81 4 Install the front panel bracket. 5 Tighten the screws on the front panel using a torque driver with a T8 torx bit. 6 Tighten the screws on top of front panel bracket using a torque driver with a T8 torx bit. 7 Perform the "Installing the Top Cover" procedure on page 38. SV5100G3/SV5200G3 User Manual 81

82 2.13 Replacing the Battery Removing the Battery 1 Perform the "Removing the Top Cover" procedure on page The battery is located behind PCIe slot 3. If there is a PCIe card installed in PCIe slot 3, perform the "Removing the PCIe Card" procedure on page Use a flat head screwdriver to pry the battery from its holder. 82 SV5100G3/SV5200G3 User Manual

83 Installing the Battery 1 Insert the battery and press until it is firmly seated into its holder. 2 If you remove a PCIe card from PCIe slot 3, perform the "Installing the PCIe Card" procedure on page Perform the "Installing the Top Cover" procedure on page 38. SV5100G3/SV5200G3 User Manual 83

84 2.14 Replacing the Optional M.2 Adapter Card and SSD Module Follow the procedure for removing the M.2 adapter card and the M.2 SSD module from the mainboard as follows: Removing the M.2 Adapter Card 1 Perform the "Removing the Top Cover" procedure on page If your system is SV5200G3, perform the "Removing the SV5200G3 Upper Tray" on page The M.2 adapter card is located on the front right side of the system. Pry open the clips that secure the card to the chassis. 84 SV5100G3/SV5200G3 User Manual

85 4 Pull up the mylar tabs to disengage the M.2 adapter card from the mainboard. SV5100G3/SV5200G3 User Manual 85

86 Removing the M.2 SSD Module 1 Open the latch that secures the M.2 SSD module to the M.2 adapter card. 2 Remove the M.2 SSD module from the M.2 adapter card. 86 SV5100G3/SV5200G3 User Manual

87 Installing the M.2 SSD Module Follow the procedure to install the M.2 SSD module onto the mainboard and the M.2 adapter card as follows: 1 Insert and press down the M.2 SSD module gently. 2 Lock the latch to secure the M.2 SSD card to the M.2 adapter card. SV5100G3/SV5200G3 User Manual 87

88 Installing the M.2 Adapter Card 1 Insert the M.2 adapter with M.2 SSD modules onto the mainboard. 2 Close the clips to secure the M.2 adapter card to the mainboard. 3 If you have a SV5200G3 system, perform the "Installing the SV5200G3 Upper Tray" procedure on page Perform the "Installing the Top Cover" procedure on page SV5100G3/SV5200G3 User Manual

89 2.15 Replacing the Mainboard Removing the Mainboard 1 Perform the "Removing the Top Cover" procedure on page If you have a SV5200G3 system, perform the "Removing the SV5200G3 Upper Tray" procedure on page Perform the "Removing the Memory Module" procedure on page Perform the "Removing the Air Duct" procedure on page Perform the "Removing the PHM" procedure on page Perform the "Removing the FPGA Card" (page 68) and "Removing the PCIe Card" (page 78) procedures. 7 Perform the "Removing the Battery" procedure on page Perform the "Removing the M.2 Adapter Card" (page 84) and "Removing the M.2 SSD Module" (page 86) procedures. SV5100G3/SV5200G3 User Manual 89

90 9 Disconnect the 1U fan control cable from the mainboard. 10 Disconnect and remove the PCIe x8 OCuLink cable from the mainboard. 90 SV5100G3/SV5200G3 User Manual

91 11 Disconnect the PSU1 Mgmt cable from the mainboard. 12 Disconnect the PSU 12V cable from the mainboard. SV5100G3/SV5200G3 User Manual 91

92 13 Loosen the thumbscrew on the mainboard. 14 Slide the mainboard in the direction indicated until the retention pins are unlatched. 92 SV5100G3/SV5200G3 User Manual

93 15 Remove the mainboard. SV5100G3/SV5200G3 User Manual 93

94 Installing the Mainboard 1 Insert the mainboard. 2 Slide the mainboard in the direction indicated until the retention pins are latched. 94 SV5100G3/SV5200G3 User Manual

95 3 Tighten the thumbscrew on the mainboard. 4 Connect the PSU 12V (1) and PSU1 Mgmt (2) cables to the mainboard. SV5100G3/SV5200G3 User Manual 95

96 5 Connect the PCIe x8 OCuLink cable (1) and insert it into the clip (2) on the mainboard. 6 Connect the fan control cable to the mainboard. 96 SV5100G3/SV5200G3 User Manual

97 7 Perform the "Installing the M.2 SSD Module" (page 87) and the "Installing the M.2 Adapter Card" (page 88) procedures. 8 Perform the "Installing the Battery" procedure on page Perform the "Installing the TPM" procedure on page Perform the "Installing the FPGA Card" (page 72) and "Installing the PCIe Card" (page 80) procedures. 11 Perform the "Installing the PHM" procedure on page Perform the "Installing the Memory Module" procedure on page Perform the Installing the Air Duct procedure on page If you have the SV5200G3 system, perform the Installing the SV5200G3 Upper Tray procedure on page Perform the "Installing the Top Cover" procedure on page 38. SV5100G3/SV5200G3 User Manual 97

98 3 BIOS Setup BIOS Setup is a text-based utility that allows the user to configure the system and view current settings and environment information for the platform devices. The Setup utility controls the platform s built-in devices, the Boot Manager and Error Manager. NOTE: For the detailed BIOS information, please refer to the BIOS User Manual. 3.1 Entering BIOS Setup Press the <Del> or <ESC> key during the Power-On-Self-Test (POST) to enter the BIOS Setup menu; otherwise, POST will continue with its test routines. Note that the BIOS Setup options may vary depending on your hardware configuration. 3.2 BIOS Hotkeys The following hotkeys work during POST: Key Del or Esc F7 Function Enter BIOS setup utility Enter Boot menu 98 SV5100G3/SV5200G3 User Manual

99 3.3 Menu Bar There are eight tabs on the BIOS Menu bar on the top of the screen: Main Advanced Platform Configuration. Socket Configuration System Mgmt Security Boot Save & Exit SV5100G3/SV5200G3 User Manual 99

100 3.4 Navigation Keys Use the following navigation keys to set the BIOS parameters: Key <Enter> Function Select screen Select item Select +/- Change option F1 F8 F9 F10 <Esc> General Help Previous Values Optimized Defaults Save and Reset Exit NOTES: Setup options may vary depending on your hardware configuration. Grayed-out fields are not user-configurable. In the descriptive table following each menu screenshot, settings in boldface are the default and suggested settings. 100 SV5100G3/SV5200G3 User Manual

101 3.5 Main After entering the BIOS Setup Utility, you will see the Main menu screen. The Main menu displays the BIOS, memory and chipset information. You can also choose the system language, set the system date and time. SV5100G3/SV5200G3 User Manual 101

102 3.6 Advanced Advanced screen provides an access point to configure several groups of options. On this screen, the user can select the option group to be configured. Configuration actions are performed on the selected screen, and not directly on the Advanced screen. WARNING Setting the wrong values in the Advanced menu may cause the system to malfunction. Select a submenu item and then press Enter to access the related submenu screen. 102 SV5100G3/SV5200G3 User Manual

103 3.7 Platform Configuration Platform Configuration sets the USB, Network, South Bridge chipsets configurations. SV5100G3/SV5200G3 User Manual 103

104 3.8 Socket Configuration Socket Configuration sets the processor, thermal management and North Bridge chipsets configurations. 104 SV5100G3/SV5200G3 User Manual

105 3.9 Server Management Server Management configures server management features. SV5100G3/SV5200G3 User Manual 105

106 3.10 Security The BIOS uses passwords to prevent unauthorized tampering with the server setup. Passwords can restrict entry to BIOS Setup, restrict use of the Boot Popup menu, and suppress automatic USB device reordering. It is strongly recommended to set an Administrator password. Not setting a password gives everyone who boots the system the equivalent of Administrative access. This means that anyone with access to the system can go into Setup and change BIOS settings at will. 106 SV5100G3/SV5200G3 User Manual

107 3.11 Boot Boot sets the boot configuration, quiet boot and boot device priority. SV5100G3/SV5200G3 User Manual 107

108 3.12 Save & Exit The Save & Exit screen allows the user to choose whether to save or discard the configuration changes made on other Setup screens. It also allows the user to restore the BIOS Settings to the factory defaults or to save or restore them to a set of user-defined default values. 108 SV5100G3/SV5200G3 User Manual

109 4 Error Code List 4.1 Post code table PEI Phase A. Progress codes Normal: Code 0x10 0x11 0x15 0x19 0x2B 0x2C 0x2D 0x2E 0x2F 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x3B 0x4F 0x60 Description PEI Core is started Pre-memory CPU initialization is started Pre-memory North Bridge initialization is started Pre-memory South Bridge initialization is started Memory initialization. Serial Presence Detect (SPD) data reading Memory initialization. Memory presence detection Memory initialization. Programming memory timing information Memory initialization. Configuring memory Memory initialization Memory Installed CPU post-memory initialization is started CPU post-memory initialization. Cache initialization CPU post-memory initialization. Application Processor(s) (AP) initialization CPU post-memory initialization. Boot Strap Processor (BSP) selection CPU post-memory initialization. System Management Mode (SMM) initialization Post-Memory North Bridge initialization is started Post-Memory South Bridge initialization is started DXE IPL is started DXE Core is started SV5100G3/SV5200G3 User Manual 109

110 Recovery: Code 0xF0 0xF1 0xF2 0xF3 0xF4 Description Recovery condition triggered by firmware (Auto recovery) Recovery condition triggered by user (Forced recovery) Recovery process started Recovery firmware image is found Recovery firmware image is loaded B. Error codes Normal: Code 0x54 0x55 0x56 0x57 0x58 0x59 0x5A 0x5B Description Unspecified memory initialization error Memory not installed Invalid CPU type or Speed CPU mismatch CPU self-test failed or possible CPU cache error CPU micro-code is not found or micro-code update is failed Internal CPU error Reset PPI is not available Recovery: Code 0xF8 0xF9 0xFA Description Recovery PPI is not available Recovery capsule is not found Invalid recovery capsule 110 SV5100G3/SV5200G3 User Manual

111 4.1.2 DXE Phase A. Progress codes Code 0x60 0x61 0x62 0x63 0x68 0x69 0x6A 0x70 0x71 0x72 0x78 0x79 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9A 0x9B 0x9C 0x9D 0xA0 0xA1 Description DXE Core is started NVRAM initialization Installation of the South Bridge Runtime Services CPU DXE initialization is started PCI host bridge initialization North Bridge DXE initialization is started North Bridge DXE SMM initialization is started South Bridge DXE initialization is started South Bridge DXE SMM initialization is started South Bridge devices initialization ACPI module initialization CSM initialization Boot Device Selection (BDS) phase is started Driver connecting is started PCI Bus initialization is started PCI Bus Hot Plug Controller Initialization PCI Bus Enumeration PCI Bus Request Resources PCI Bus Assign Resources Console Output devices connect Console input devices connect Super IO Initialization USB initialization is started USB Reset USB Detect USB Enable IDE initialization is started IDE Reset SV5100G3/SV5200G3 User Manual 111

112 Code 0xA2 0xA3 0xA4 0xA5 0xA6 0xA7 0xA8 0xA9 0xAB 0xAD 0xAE 0xAF 0xB0 0xB1 0xB2 0xB3 0xB4 0xB5 0xB6 Description IDE Detect IDE Enable SCSI initialization is started SCSI Reset SCSI Detect SCSI Enable Setup Verifying Password Start of Setup Setup Input Wait Ready To Boot event Legacy Boot event Exit Boot Services event Runtime Set Virtual Address MAP Begin Runtime Set Virtual Address MAP End Legacy Option ROM Initialization System Reset USB hot plug PCI bus hot plug Clean-up of NVRAM B. Error codes Code 0xD0 0xD1 0xD2 0xD3 0xD4 0xD5 0xD6 0xD7 Description CPU initialization error North Bridge initialization error South Bridge initialization error Some of the Architectural Protocols are not available PCI resource allocation error. Out of Resources No Space for Legacy Option ROM No Console Output Devices are found No Console Input Devices are found 112 SV5100G3/SV5200G3 User Manual

113 Code 0xD8 0xD9 0xDA 0xDB 0xDC Description Invalid password Error loading Boot Option Boot Option is failed Flash update is failed Reset protocol is not available OS phase Code 0xA0 0x22 0xAA Description Load boot image On OS from DC/AC boot On OS from warm boot SV5100G3/SV5200G3 User Manual 113

114 4.2 DIMM error code post During the boot sequence the BIOS shall initialize and test each DIMM module. If a module fails initialization or does not pass the BIOS test, the SEL will be created that format is as below: MRC Error Event Log Byte Field Description 1:2 Record ID SEL Record ID 3 Record Type OEM System Event Record: 0xC2 4:7 Timestamp Timestamp 8:10 Manufacturer ID 0x OEM Data 1 MRC Major Error Code (refer below section) 12 OEM Data 2 MRC Minor Error Code (refer below section) 13 OEM Data 3 Socket Number or 0xFF (Unspecified) 14 OEM Data 4 Channel Number or 0xFF (Unspecified) 15 OEM Data 5 DIMM Number or 0xFF (Unspecified) 16 OEM Data 6 Rank Number or 0xFF (Unspecified) MRC Warning Code Error Descriptions RDIMM is plugged into a UDIMM only board UDIMM is plugged into a RDIMM only board SODIMM is plugged into a RDIMM/LRDIMM only system Support for 4Gb devices has been fused off Support for 8Gb devices has been fused off DIMM is not compatible with the IMC memory controller. Major Code 01h 02h 03h 04h 05h 07h Minor Code 114 SV5100G3/SV5200G3 User Manual

115 Error Descriptions x16 UDIMM found on a combo board that supports both RDIMM and UDIMM. MRC has disabled this entire channel. Max number of ranks exceeded on the channel. MRC has disabled this entire channel. QR DIMM is not at Slot0 while SR/DR DIMMs are present in the channel. MRC has disabled this entire channel. Incompatible DDR3 DIMM module (type/ org/tech/speed etc. not supported). MRC has disabled this entire channel. The number of ranks on this device is not supported This DIMM does not support DDR or higher LRDIMM A16 usage is not symmetrical on channel Map out a channel if common frequency configuration is not supported ECC and non ECC dimms were mixed. ECC is disabled for the entire system if one DIMM is found that does not support it. DDR4 voltage not supported Lockstep Channel mode was requested but could not be honored Unable to enable Lockstep mode because ECC is disabled. Switch to independent channel mode. Mismatched DIMM pairs found across channels. Switched to independent channel mode. mrchost.rasmode contains the bitmap of supported RAS modes for the current DIMM population. DIMM was disabled by MRC. See minor code below for specific reasons. 3-DIMM-Per-Channel and Quad Rank DIMM were found on the same CPU socket (unsupported config). Channel with Quad Rank DIMM is disabled by MRC. Major Code 09h 0AH Minor Code 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 01h 02h 01h SV5100G3/SV5200G3 User Manual 115

116 Error Descriptions DIMM was disabled by the MRC as a result of previous DIMM in the channel being disabled due to error (the DIMM itself is not necessarily bad) DIMM was disabled due to MemTest errors. Mirror mode was requested but could not be honored. Memtest failure resulted in a channel being disabled. Switch to independent channel mode. Unable to enable Mirror mode because ECC is disabled. Switch to independent channel mode. Mismatched DIMM pairs found across channels. Switch to independent channel mode. Mirror mode was disabled due to memory test failure IMC memory decode limit was reached before all memory could be allocated. Interleave mode failure Number of SAD rules exceeds Number of TAD rules exceeds Number of RIR rules exceeds Negative TAD offset TAD Limit > SAD Limit Unable to enable Spare mode because ECC is disabled. Switch to independent channel mode. Mismatched DIMM pairs found across channels. Switch to independent channel mode. Unused memory is populated on channel 2 in Lockstep or Mirroring mode. Unused memory is populated on channel 2 in mirror mode Unused memory is populated on channel 2 in Lockstep mode A Read DQ/DQS failure has occurred during training. The failing Channel was disabled Major Code 0Bh 0Ch 0Dh 0Eh 10h 12h 13h Minor Code 02h 01h 02h 03h 01h 02h 03h 04h 05h 01h 02h 116 SV5100G3/SV5200G3 User Manual

117 Error Descriptions A trlcoarse failure has occurred during DDR training. The failing Channel was disabled. Round Trip delay of %d exceeds the limit of %d A write leveling failure has occurred during training. Fault Parts Tracking write Fly-by error Fault Parts Tracking write Fly-by error A write DQ/DQS failure has occurred during training. Improper DIMM population DIMM is populated out of order and that it will not be used. If slot 0 is empty then the channel gets disabled, if slot 1 is empty but slot 0 and slot 2 are populated then MRC will try to boot with the DIMM in slot 0 while ignoring the DIMM in slot 2. Lockstep/Mirror mode not enabled due to unused DIMM on Channel 2, and MRC input RAS_TO_INDP_EN = 1. Switch to Independent Channel mode. CLTT was requested but could not be honored A DIMM without Temp Sensor was found A DIMM failed Temp Sensor circuit test Indicates throttling is not sufficient for this DIMM due to MRC calculation. A DIMM of an unknown category is found when looking up a pre-defined category table (DIMM type, rawcard, heat spreader, planner, etc). Use a default category (category 11 or 27 depending on DIMM type) DQS training failure encountered Hardware Memtest failed and the DIMM is disabled DIMM Verf controller circuit (DCP) not detected Low voltage DDR3 problem encountered. FTP correctable error FTP: failed Read DqDqs Major Code 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Eh 20h 30h Minor Code 01h 00h 01h 01h 02h 01h 02h 13h SV5100G3/SV5200G3 User Manual 117

118 Error Descriptions FTP: failed Receive Enable FTP: failed Write Leveling FTP: failed Write DqDqs FTP minor correctable memtest FTP uncorrectable error FTP: failed Read DqDqs Receive Enable training failure FTP failed Write Leveling FTP: failed Write DqDqs FTP minor correctable memtest Timing overrides are enabled but the DIMM configuration has changed. Memory overrides will be disabled If MEM_OVERRIDE_EN is enabled but the DIMM configuration has changed, this warning indicates that the MRC has disabled memory overrides. Major Code 31h 40h Minor Code 14h 15h 16h 1Ch 13h 14h 15h 16h 1Ch 01h MRC fatal error codes Error Descriptions No Memory 1. No memory was detected via SPD read. No warning log entries available. 2. Invalid configuration that causes no operable memory. Refer to warning log entries for details. Memory on all channels of all sockets are disabled due to hardware memtest error. DDR3 training did complete successfully Memory test failure Software memtest failure Hardware memtest failure Major Code 0E8h 0EAh 0EBh Minor Code 01h 02h 01h 02h 118 SV5100G3/SV5200G3 User Manual

119 Error Descriptions Hardware memtest failure in Lockstep channel mode requiring a channel to be disabled. This is a fatal error which requires a reset and calling MRC with a different RAS mode to retry. UDIMMs and RDIMMs are both present DIMM vendor-specific errors Different DIMM types are detected installed in the system Violation of population rules The 3rd DIMM slot cannot be populated when QR DIMMs are installed UDIMMs and SODIMMs are not supported in the third DIMM slot Unsupported DIMM Voltage DDR3 and DDR4 dimms cannot be mixed Mixing of 256 byte and 512 byte SPD devices is not supported Number of HAs found in system greater than MAX_HA defined in MRC build Indicates a CLTT table structure error. A DIMM is populated in the 3rd slot when quad rank DIMM is present in the channel Boot mode is unknown Sub boot mode is unknown ERR_SET_VDD Invalid VR mode, unable to set DRAM VDD Failure occurred reserving memory for IOT Major Code 0EDh EEh 0EFh F0h F1h Minor Code 03h 01h 02h 03h 04h 05h 06h 07h 01h 02h 01h SV5100G3/SV5200G3 User Manual 119

120 5 BMC This chapter specifies the functional specifications provided by the SV5100G3/SV5200G3 Baseboard Management Controller (BMC) for platform management. It intends to describe the functional blocks of the BMC and the interactions between them. Moreover, it also lists the supported commands for accessing, controlling, and configuring the BMC. 5.1 BMC Function Overview The following list of functions does not preclude support for further enhancements or additions IPMI-compliant Functions IPMI 2.0 compliance IPMI watchdog timer Serial-over-LAN (SOL) Sensor monitoring Fan speed control System Event Log (SEL) Field Replaceable Unit (FRU) Sensor Data Record (SDR) Power policy Always on Always off 120 SV5100G3/SV5200G3 User Manual

121 Last state Sophisticated User Management IPMI-based user management Multiple user permission level System power management Power status report Remote chassis power control (on/off/cycle/reset) System interfaces KCS LAN (RMCP+) Non-IPMI Functions Dedicated 1G LAN Dynamic Host Configuration Protocol (DHCP) Chassis identification LED System status LED Leaky bucket algorithm SOL buffering and pattern matching BIOS firmware OOB update BMC firmware update SV5100G3/SV5200G3 User Manual 121

122 5.2 BMC Firmware Functional Description This section explains the functions supported by the BMC firmware in detail Chassis Power Management BMC implements chassis power and reset functions for a system administrator to control and manage the system power behavior. These functions can be activated by issuing IPMI 2.0 compatible chassis commands to the BMC over messaging interfaces. The following list summaries the supported functions. Chassis power on Chassis power off Chassis power cycle Chassis power reset Watchdog Timer BMC provides an IPMI 2.0 compatible watchdog timer which can prevent the system from hanging. 122 SV5100G3/SV5200G3 User Manual

123 5.2.3 System Event Log (SEL) A non-volatile storage space is allocated to store system events for system status tracking, and the maximum capacity is 3,640 logs. Once the capacity runs out, BMC will not record any system event until the SEL is cleared. Furthermore, since the BMC does not support individual SEL deletion, a system administrator can only clear the SEL as a whole Field Replaceable Unit (FRU) BMC implements an interface for logical FRU inventory devices located in the mainboard and the power supply unit (PSU). This functionality provides commands to access and manage the FRU inventory information Serial-over-LAN (SOL) IPMI 2.0 SOL redirects the system serial controller traffic over an IPMI session. A system administrator is able to establish a SOL connection with a standard IPMI client, such as IPMITOOL, to remotely interact with serial text-based interfaces such as OS command-line and serial redirected BIOS interfaces. The default setting of SOL is /8/N/1. SV5100G3/SV5200G3 User Manual 123

124 5.2.6 Power Policy BMC is designed to control the system power state based on the power policy when an AC lost event occurs. Three power modes are supported and users are allowed to set their preferred mode in the BIOS setup menu. The default power policy is to force the system to S0 state, which is always power on mode. The behavior of each power mode is explained in the following. S0 (always power on): The system will always be powered on after the chassis power is resumed from an AC lost event. S5 (always power off): The system will always be powered off after the chassis power is resumed from an AC lost event. Last state: The system will keep its very last power state after the chassis power is resumed from an AC lost event Fan Speed Control BMC is in charge of the dual-domain fan speed control mechanism. Each domain is equipped with three dual-rotor fan modules. The fan speed can be modified by varying the duty cycle of PWM signal, and the corresponding control algorithm mainly refers to the readings of the on-board temperature sensors. In addition, the whole process also follows the thermal specification for optimization. 124 SV5100G3/SV5200G3 User Manual

125 Furthermore, IPMI OEM commands can be used to modify the fan speed manually. A system administrator is allowed to set the speeds of the fan modules as a whole or separately via the commands Integrated Front Panel User Interface The integrated front panel is equipped with the following indicators: Power LED System Status LED Chassis ID LED Plus, the integrated front panel provides buttons include Power button Reset button Chassis ID button. SV5100G3/SV5200G3 User Manual 125

126 5.3 Sensor Monitoring BMC implements physical sensors to monitor system hardware and report system health. Besides, the BMC also reports various system state changes by maintaining virtual sensors. All the available sensors are listed in this section and the definition of threshold type defined by the IPMI 2.0 specification is provided in following table. NOTE: Unless otherwise specified, the term "sensor" refers to the IPMI sensor-model definition of a sensor. Item Full Name Description LNR Lower non-recoverable Anything below causes power down if necessary LC Lower critical Below this point, the shelf will take action LNC Lower non-critical Above this point is the normal operating point UNC Upper non-critical Below this point is the normal operating point UC Upper critical Above this point the shelf will take action UNR Upper non-recoverable Anything above causes power down if necessary 126 SV5100G3/SV5200G3 User Manual

127 5.3.1 Threshold Sensors Threshold sensors such as voltage, temperature, and fan speed sensors are implemented to monitor the system health. See the following table for more details. SV5100G3/SV5200G3 User Manual 127

128 128 SV5100G3/SV5200G3 User Manual

129 5.3.2 Discrete and Event-Only Sensors Refer to the tables below for details of the discrete and event-only sensors respectively. Discrete Sensors SV5100G3/SV5200G3 User Manual 129

130 Event-Only Sensors Sensor Name Sensor Number Sensor Data Record Type Assertion [Event Data1] [7:6] 0x10 [5:4] 0x10 [3:0] Event Type 0x0 = BMC Thread Restarted Value 1 = number of occurrences Value 2 = thread ID BMC Health 0xef 0x2 0x1 = DHCP failure. Value 1 = number of occurrences 0x2 = Booted from backup flash 0x3 = Hardware watchdog expired and BMC rebooted Other values are reserved [Event Data2] Value 1 (additional information based on event type) [Event Data3] Value 2 (additional information based on event type) CPU IIO Err 0xA7 0x3 [Event Data1] Bit [7:6] b10 Bit [5:4] b10 Bit [3:0] 0x00 = Other IIO [Event Data2] Bit [7:0] Error ID. Refer to the IIO Module Error Codes section in the Intel Haswell EDS Vol. 1 (section ) for details. [Event Data3] Bit [7:5] CPU Number Bit [4:3] Reserved Bit [2:0] b000 = IRP0 Error b001 = IRP1 Error b010 = IIO-Core Error b011 = VT-d Error Other values are reserved CPU_ERRO R 0x38 0x2 CPU0_ERR 0xD3 0x2 CPU0 Therm Stat 0x1c 0x3 [Event Data1] 0Ah - Processor Automatically Throttled 0Bh - Machine Check Exception (Uncorrectable) 0Ch - Correctable Machine Check Error 0Dh - CPU_ERR0(1,2)_LVT3_N asserted [Event Data1] 00h - IERR 01h - Thermal Trip 0Dh - FIVR Fault 130 SV5100G3/SV5200G3 User Manual

131 Sensor Name Sensor Number Sensor Data Record Type Assertion CPU0_MEM _ABC_HOT 0xC1 0x2 [1] - 1b=State Asserted CPU0_MEM _DEF_HOT 0xDA 0x2 [1] - 1b=State Asserted CPU0_PRO C_HOT 0xA8 0x2 [1] - 1b=State Asserted CPU0_VccIO 0x80 0x1 CPU1_ERR 0xD4 0x2 [Event Data1] 00h - IERR 01h - Thermal Trip 0Dh - FIVR Fault CPU1 Therm 0x1d Stat 0x3 CPU1_MEM _GHJ_HOT 0xC2 0x2 [1] - 1b=State Asserted CPU1_MEM _KLM_HOT 0xDB 0x2 [1] - 1b=State Asserted CPU1_PRO C_HOT 0xA9 0x2 [1] - 1b=State Asserted DIMM_ABC_ 0xAC VRHOT 0x2 [0] - 1b=VR hot state asserted DIMM_DEF_ VRHOT 0xC0 0x2 [0] - 1b=VR hot state asserted DIMM_GHJ_ VRHOT 0xDC 0x2 [0] - 1b=VR hot state asserted DIMM_KLM_ VRHOT 0xDD 0x2 [0] - 1b=VR hot state asserted Energy Storage 2 0x2 [Event Data1] [7:6] 0x00 [5:4] 0x00 [3:0] 0 = Unknown, 1 = Charging, 2 = Discharging, 3 = Floating HSC0 Status 0x12 0x2 [0]=1b (Power Supply Failure Detected) HSC0 Status MFR 0x13 0x3 [0:2]=3b, HS_SHUTDOWN_CAUSE (?) [3]=1b, HS_INLIM_FAULT (?) [4]=1b, SEVERE_OC_FAULT (?) [5]=1b, OV_CMP_OUT (?) [6]=1b, UV_CMP_OUT (?) [7]=1b, FET_HEALTH_FAULT (?) SV5100G3/SV5200G3 User Manual 131

132 Sensor Name Mem ECC Error NM Capabilities NM Exception Sensor Number 0x87 0x1a 0x18 Sensor Data Record Type Assertion [Event Data1] [7:6] b10 = OEM code in byte 2 [5:4] b10 = OEM code in byte 3 [3:0] Offset from Event/Reading Code for discrete event status 0x0 = Correctable Error 0x1 = Uncorrectable Error 0x5 = Correctable ECC error logging Limit Reached [Event Data2] 0x3 0x00 = Single Bit Error warning threshold (Event/Reading Type Code = 0h for Correctable Error) if supported. 0x01 = Single Bit Error critical threshold (Event/Reading Type Code = 5h for Correctable ECC error logging limit reached) if supported. 0x10 = Last Boot Error 0xFF = unspecified Other values are reserved [Event Data3] DIMM Number (1-base) [Event Data1] [7:3] Reserved [2] Power limiting capability 0 Not Available. 1 Available. 0x3 [1] Monitoring capability 0 Not Available. 1 Available. [0] Policy interface capability 0 Not Available. 1 Available. [Event Data1] [7:6] 10b OEM code in byte 2 [5:4] 10b OEM code in byte 3 [3] Intel Node Manager Policy event =0 Reserved. =1 Policy Correction Time Exceeded [2:0] Reserved [Event Data2] 0x3 [7:4] Reserved [3:0] Domain ID 00h Entire platform. 01h CPU subsystem. 02h Memory subsystem. 03h HW Protection. 04h High Power I/O subsystem. [Event Data3] Policy ID 132 SV5100G3/SV5200G3 User Manual

133 Sensor Name Sensor Number Sensor Data Record Type Assertion [Event Data1] [7:6] 10b OEM code in byte 2 [5:4] 10b OEM code in byte 3 [3:0] Health Event Type 02h Sensor Intel Node Manager [Event Data2] [7:4] Error Type 0 7 Reserved. 8 Outlet Temperature Reading Failure 9 Volumetric Airflow Reading Failure. 10 Policy Misconfiguration. 11 Power Sensor Reading Failure. NM Health 0x19 0x3 12 Inlet Temperature Reading Failure. 13 Host Communication Error. 14 Real-time clock synchronization failure. 15 Platform shutdown initiated by Intel NM policy [3:0] Domain ID. 00h Entire platform 01h CPU subsystem 02h Memory subsystem 03h HW Protection 04h High Power I/O subsystem [Event Data3] For Error Type = 10 or 15 <Policy ID>. For Error Type = 11 <PowerSensorAddress>. For Error Type = 12 <Inlet Sensor Address>. NM SmaRTCLST 0xb2 0x3 NM Threshold 0x1b 0x3 [Event Data1] [7:6] = 10b OEM code in byte 2. [5:4] = 10b OEM code in byte 3. [3] Intel Node Manager Policy Event 0 Threshold exceeded. 1 Policy Correction Time Exceeded [2] Reserved. [1:0] Threshold Number [Event Data2] [7:4] Reserved [3:0] Domain ID. 00h Entire platform 01h CPU subsystem 02h Memory subsystem 03h HW Protection 04h High Power I/O subsystem Others Reserved [Event Data3] <Policy ID> SV5100G3/SV5200G3 User Manual 133

134 Sensor Name Sensor Number Sensor Data Record Type Assertion [Event Data1] Bit [7:6] b10 OEM code in byte 2 Bit [5:4] b10 OEM code in byte 3 Bit [3:0] Offset from Event/Reading Code for discrete event status 0x00 = NVDIMM controller failure 0x01 = NVDIMM restore failed 0x02 = NVDIMM restore retry, indicate count 0x03 = NVDIMM backup failed 0x04 = NVDIMM erase failed 0x05 = NVDIMM erase retry, indicate count NVDIMM 5 0x2 0x06 = NVDIMM arm failed 0x07 = No backup energy source detected 0x08 = Backup energy source charge failed 0x09 = NVDIMM uncorrectable memory error 0x0a = NVDIMM exceeded correctable memory error threshold [Event Data2] Retry Count (for applicable event), otherwise 0x00 [Event Data3] DIMM Number (1-base). See the Memory Error Reporting section in the Blade-BIOS specification for the mapping from DIMM number to the physical DIMM slot. NVDIMM Energy NVDIMM Event 6 0x1 3 0x2 [Event Data1] 00h Deasserted 01h Asserted [Event Data1] [7:6] 0x10 [5:4] 0x10 [3:0] Trigger Source 0x0 = IRQ_DIMM_SAVE_LVT3_N 0x1 = IRQ_NVDIMM_EVENT_N Other values are reserved [Event Data2] BMC NVDIMM Input Pin States [7] IRQ_DIMM_SAVE_LVT3_N [6] IRQ_NVDIMM_EVENT_N [5] FM_PS_FAIL_N [4:0] = b00000 [Event Data3] BMC NVDIMM Output Pin States [7] FM_UV_ADR_TRIGGER_EN [6] FM_FORCE_ADR_N [5] IRQ_BMC_PCH_SMI_LPC_N [4] FM_BMC_CPLD_GPO [3:0] = b SV5100G3/SV5200G3 User Manual

135 Sensor Name Sensor Number OS Stop/Shutdo 0 0x3 wn PCI-E BUS 0xA1 0x3 PVCCP_CP U0_VRHOT PVCCP_CP U1_VRHOT Sensor Data Record Type Assertion [Event Data1] 03h - OS Graceful Shutdown [Event Data1] [7:6] b10 = OEM code in byte 2 [5:4] b10 = OEM code in byte 3 [3:0] Offset from Event/Reading Code for discrete event status 0x4 = PCI PERR 0x5 = PCI SERR 0x8 = Bus Uncorrectable Error 0xA = Bus Fatal Error 0xF = Last Boot PCIe Error [Event Data2] Bit [7:3] Device Number Bit [2:0] Function Number [Event Data3] Bit [7:0] Bus Number 0xAA 0x2 [0] - 1b=VR hot state asserted 0xAB 0x2 [0] - 1b=VR hot state asserted SV5100G3/SV5200G3 User Manual 135

136 Sensor Name Sensor Number Sensor Data Record Type Assertion [Event Data1] [7:6] b10 = OEM code in byte 2 [5:4] b10 = OEM code in byte 3 [3:0] Offset from Event/Reading Code for discrete event status 0xB - Uncorrectable Error 0xC - Correctable Error [Event Data2] QPI Error Code: 0x32 - Tx CRC Error (initiates LLR_Req sequence) 0x31 - Rx CRC Error with LLR Success (no phy reset) 0x30 - Rx CRC Error with LLR Success after phy reset 0x22 - Phy In-band Reset & no width change21h - Not supported 0x20 - Phy Initialization Abort 0x1F - Unsupported Config Request from Message Channel 0x15 - Link Layer RBT Error 0x14 - Link Layer L0p Retrain error QPI Error 0x9D 0x3 0x13 - Link Layer Control Error 0x12 - Unsupported/Undefined Packet 0x11 - Tx Unsuccessful Link Layer Retry 0x10 - R3QPI Control Error 0x03 - latency buffer over/under run 0x02 - Drift Buffer overrun 0x00 - phy control error [Event Data3] Bit 7:5 Reserved Bit 4 QPI Link b0 = QPI 0 b1 = QPI 1 Bit 3:0 Bitmap for processor number Bit0 = 1st processor Bit1 = 2nd processor Bit2 = 3rd processor Bit3 = 4th processor SEL 0x8A 0x2 02h Log Area Reset/Cleared 04h SEL Full 05h SEL Almost Full 136 SV5100G3/SV5200G3 User Manual

137 Sensor Name Sensor Number Sensor Data Record Type Assertion EVD1: Trigger Source "[7:6] b10 [5:4] b10 SM_ALERT 4 0x2 0x00 = RM_THROTTLE_N 0x01 = BMC_FORCE_NM_THROTTLE_N 0x02 = Auto Remove DPC 0x03 = HSC_GPIO1_R_N 0x04 = HSC_GPIO2_R_N 0x05 = VOLTAGE_ALERT_N 0x06 = CURRENT_ALERT_N 0x07 = FM_SYS_THROTTLE_N 0x08 = PSU1_ALERT_N EVD1:BMC SM_ALERT Pins Input States [7] RM_THROTTLE_N [6] HSC_GPIO1_R_N [5] HSC_GPIO2_R_N [4] VOLTAGE_ALERT_N [3] CURRENT_ALERT_N [2] FM_THROTTLE_IN_N [1] FM_SYS_THROTTLE_N [0] PSU1_ALERT_N EVD2: BMC SM_ALERT Pins Output States [7] BMC_FORCE_NM_THROTTLE_N [6] RM_THROTTLE_EN_N [5] PMB_ALERT_EN_N [4:0] = 0x00 SV5100G3/SV5200G3 User Manual 137

138 5.4 BMC Firmware Management This section defines the BMC firmware management BMC Firmware Update BMC firmware can be updated through either in-band or out-of-band flashing. In-band BMC firmware update uses virtual media as the interface, and out-of-band update mainly goes through LAN. A system administrator is allowed to choose one of the flashing methods with a proper tool listed as follows to complete the BMC firmware update task. Update Tool: YAFUFlash YAFUFlash (Yet Another Firmware Upgrade Flash) is a tool for flashing the BMC under both Linux and Windows environments. The types of the mediums used to update the firmware and the corresponding command formats are given as follows. Network: Update the BMC firmware out of band via LAN Yafuflash -nw -ip $BMC_IP -u $USER -p $PASSWORD $BMC_FW All types of the mediums are applicable under Windows and Linux environment. A system administrator can select a media that suits the requirement. 138 SV5100G3/SV5200G3 User Manual

139 5.5 Enabling the Serial Over LAN (SOL) You can remotely enable the SOL function through the BMC IP address as follows: 1 Check the BMC MAC address Pull out the BMC MAC address label on the front panel and look for the BMC MAC address information. For example : BMC MAC: 70E28419C988 2 Connect the network cable to the management port on the front panel to get the DHCP server IP address. SV5100G3/SV5200G3 User Manual 139

140 3 Check the IP address from the DHCP server. Check the DHCP message log on the DHCP server and compare the BMC MAC address to find out which IP address is assigned for BMC. For example : BMC MAC : 70E28419C988 IP: SV5100G3/SV5200G3 User Manual

141 5.6 Verifying the SOL 1 Enable SOL. Launch a console and use the IPMI tool to activate SOL with the BMC IP address (obtained in step 3 of section 5.5) with the following command: # ipmitool -I lanplus -U USERID -P PASSW0RD -H sol activate 2 Enter the BIOS setup or the operating system (text mode only). BIOS setup Operating System (Text Mode Only) Then, the screen will stop and wait for the SOL console message to display. SV5100G3/SV5200G3 User Manual 141