UNIVERSITY OF VICTORIA EXAMINATIONS AUGUST CSc 360 K01

Transcription

1 CSc 360 K01 1 UNIVERSITY OF VICTORIA EXAMINATIONS AUGUST 1998 CSc 360 K01 NAME: STUDENT NO. SIGNATURE: SECTION: K01 INSTRUCTOR: Dr. M.H.M. Cheng DURATION: 3 Hours TO BE ANSWERED ON EXAMINATION PAPER. STUDENTS MUST COUNT THE NUMBER OF PAGES IN THIS EXAMINATION PA- PER BEFORE BEGINNING TO WRITE, AND REPORT ANY DISCREPANCY IMME- DIATELY TO THE INVIGILATOR. THIS EXAMINATION PAPER HAS 14 PAGES. THERE ARE 7 QUESTIONS. ANSWER ALL QUESTIONS. For Use of Examiner 1 /10 2 /20 3 /20 4 /10 5 /10 6 /15 7 /15 Total /100

2 CSc 360 K (10%) Circle true or false for the following questions. 2. (20%) The MODULE priority in TopSpeed Modula-2 is used for prioritized interrupt handlers. There are 16 interrupt types supported by Intel 80x86 processors. Each interrupt request lines (IRQ) generates an interrupt directly to the CPU on the IBM-PC/AT. The interval timer on the IBM-PC/AT is connected to IRQ 0 and generates an interrupt type 8. If a device is connected to IRQ k and generates an interrupt type t, its interrupt vector is located in memory location 0000:t*k. If each process in lab 1 runs on a separate machine, by disabling interrupts on the machine holding the shared variable, we can gurantee a correct accumulated answer at all times. The TRANSFER in Modula-2 is for transferring control from one process to another; the IOTRANSFER, on the other hand, is for transferring control from a process to an I/O device. A BoundedBuffer as implemented in lab 3 may only be used by a single producer and a single consumer. Each client process in lab 4 may examine the Cache directly to determine whether a disk block is in the Cache. A write-through disk cache means writing is done directly to the disk without caching. (2%) On receiving an interrupt request, what does 8259 do with the CPU?

3 CSc 360 K01 3 (2%) In lab 1, why is the accumulated result on the shared variable incorrect? (2%) What is the difference between a long-term versus a short-term scheduler? Why do we need a medium-term scheduler? (2%) Draw a dataflow network that computes the Hamming number as specified in lab 3. How did we implement it?

4 CSc 360 K01 4 (2%) What is the cause of deadlock in the dataflow network implemented in lab 3? (2%) What are the properties and operations associated with a Channel as defined in lab 3? (2%) In lab 3, what are the abstract states and transitions of a process that may use a Channel?

5 CSc 360 K01 5 (2%) In lab 4, how is the Cache represented? (2%) What are the abstract states and transitions of a disk block in our disk Cache which implements Second Chance replacement policy? (2%) How is remote-procedure call implemented using Send-Receive-Reply? You may use our disk Controller as an example.

6 CSc 360 K (20%) (3%) Illustrate how Intel 80x86 (Pentium) family of processors maps a 48-bit logical address into a phyiscal address. (2%) What are the pros and cons of a pure paging virtual memory system that uses a 1K page/frame size? (2%) In a pure paging virtual memory system, if each logical address is 32-bit and each page is 8K bytes, how many entries are there in the page table?

7 CSc 360 K01 7 (2%) What is an overlay? How is it supported on a machine running DOS on an 8086 processor? (2%) What are the main problems associated with a fixed partitioned memory management scheme? (2%) Explain why maintaining the number of references per page only does not approximate Least Recently Used.

8 CSc 360 K01 8 (2%) What is the working-set of a program? (3%) What is the cause of thrashing? How does an OS detect it? (2%) Why do we use Second Chance to approximate Least Recently Used replacement policy?

9 CSc 360 K (10%) There are five jobs, A, B, C, D and E, in a queue waiting to be processed. Their CPU burst-time required are 7, 3, 11, 3 and 5, and arrival time are t +1,t,t+2,t+1 and t+2 respectively. (Note: Alphabetical order is used when arrival time is the same.) For each of the following scheduling policies, draw a time chart showing when each of the five jobs is executing/waiting. (3%) Shortest Job First (SJF) (7%) Multi-level Feedback Queues (MLF) as specified in lab 2.

10 CSc 360 K (10%) Given the reference string generated by a particular process 1, 2, 3 w, 4 w, 5, 1, 2 w, 2, 3, 1, 5 w, 2, 1, 4 w, 2, 1, 2 w, 3, 1, 1 calculate the number of page faults, the sequence of pages that are loaded and the sequence of pages that are replaced in a pure demand paging system (i.e., no prepaging) using Second Chance replacement policy, assuming that a fixed number of 4 page frames is used.

11 CSc 360 K (15%) (1%) What is a critical section? (2%) State the properties of a Semaphore. (2%) What are the main criteria that must be considered in a solution to the critical section problem? (3%) Explain as detail as possible how semaphores may be used to solve the critical section problem.

12 CSc 360 K01 12 (2%) What is the purpose of condition variables in a monitor? (5%) Illustrate how you may implement a bounded buffer using Send-Receive- Reply.

13 CSc 360 K (15%) (2%) What is a resource allocation graph (RAG)? Does a cycle in a RAG imply the existence of a deadlock? (3%) What are the necessary conditions for deadlocks to occur? Explain. (5%) For deadlock detection, how does one reduce a RAG? What does it mean when a RAG is not completely reducible?

14 CSc 360 K01 14 (5%) Consider a system of five processes, P = {p 0,p 1,p 2,p 3,p 4 }, and five resource types, R = {A 5,B 3,C 7,D 2,E 2 }. At a given time instance, the resource allocation graph of this system is represented by the following two matrices: Allocated A B C D E p p p p p Requested A B C D E p p p p p Is this system in a deadlock state? Justify your answer. END