SAT, SMT and QBF Solving in a Multi-Core Environment
|
|
- Winfred Jordan
- 5 years ago
- Views:
Transcription
1 SAT, SMT and QBF Solving in a Multi-Core Environment Bernd Becker Tobias Schubert Faculty of Engineering, Albert-Ludwigs-University Freiburg, Freiburg im Breisgau, Germany {becker schubert}@informatik.uni-freiburg.de May 20, 2009 Abstract Recent trends in hardware design towards multi-core and multiprocessor systems call for the development of dedicated parallel algorithms in order to exploit the full potential of these architectures. We review recent work in this direction, put an emphasis on our own contributions and point out future challenges. Extended Abstract SAT- and SMT-solvers represent core components of hardware- and softwareverification tools. Verification quality and thus product quality significantly depends on the efficacy and efficiency of these solvers. Building upon the success of SAT- and SMT-solvers, the research community has begun to also reconsider the more general (but also more complicated) Quantified Boolean Formula (QBF) domain. The effectiveness and efficiency of modern SAT-solvers is e.g. demonstrated by the fact that they are able to tackle Boolean satisfiability problems with hundreds of thousands of variables (or sometimes even more). However, the last few years have shown two trends: first, the performance This work was partly supported by the German Research Council (DFG) as part of the Transregional Collaborative Research Center Automatic Verification and Analysis of Complex Systems (SFB/TR 14 AVACS). See for more information. 1
2 gains achieved by the SAT community in the field of sequential SAT solving are getting marginal, as it becomes harder and harder to optimize current algorithms even more. As a result, many of the challenging problem instances are still unsolvable by any sequential SAT-solver within a reasonable time frame. Second, many chip manufacturers have turned from single-core to multi-core designs as a way to increase the performance of their processors as gains in processor frequency have stalled. Companies such as AMD, IBM, Intel, and SUN now produce CPUs that contain four or more cores per processor. Putting these two observations together, a new generation of parallel SAT solvers is needed to utilize the enormous potential of multi-core processors and multi-cpu workstations and by this to reach the next performance level of modern SAT solving. And this argument is valid in a similar way for SMT- and QBF-solver. SAT As well known, the propositional satisfiability problem poses the question if a propositional formula is satisfiable, i. e., if there is an assignment mapping values to the variables in the formula such that the formula evaluates to true. SAT-solvers are devoted to solve such questions. In the last decade we could observe a massive increase in the efficiency of (sequential) SAT-solvers. This success, which led to industrial acceptance and employment, was mostly due to new efficient heuristics for and optimizations of the sequential SATsolving algorithms. The most prominent examples are non-chronological backtracking [?], conflict-driven learning [?], novel decision heuristics [?,?], restarts [?], and powerful preprocessing techniques [?,?]. Moreover, the implementations of these methods have been improved by considering the underlying hardware environment that was running the SAT solver. For example, zchaff introduced the concept of watched literals, that effectively uses the cache memory of modern CPUs [?]. Research on parallelizing SAT algorithms can be traced back to at least 1994, where Böhm and Speckenmeyer introduced an approach for a transputer system with up to 256 processors [?]. In subsequent years, a number of more advanced implementations have been published. Typically, a parallel SAT solver consists of a collection of sequential SAT procedures, solving a problem in parallel. We distinguish two main strategies: the search space splitting (SSS) approach, where parts of the search space are explored in parallel. The most widely used way adopts a Dynamic Search Space Partitioning technique proposed by Zhang et al. in 1997 [?], which is based on the concept of Guiding Paths (GP). A GP is defined as a path in the search 2
3 tree from the root (no variables assigned) to the current node (some variables assigned). Intuitively, a GP describes the current state of the search process. The second strategy is the portfolio (PF) approach, where the same problem is tackled in parallel by different algorithms, e.g. based on different parameter settings. Independent of the overall strategy, to compare the various designs, it is reasonable to focus on how the different solvers implement the exchange of conflict clauses. There is obviously a trade-off between the advantage of sharing conflict clauses to prune the search space and the communication overhead to broadcast this information, making knowledge sharing one of most critical points when designing a parallel SAT solver. 1. The first and most common way to support conflict clause sharing is by using message passing, typically according to the Message Passing Interface standard [?]. This concept has been used in various approaches [?,?,?,?], all of them showing that significant speedup can be achieved. But due to the overhead associated with sending messages via some kind of network, typically only short clauses consisting of a very few literals are sent. Additionally, the clauses are often sent in bundles, on one hand minimizing the communication overhead, but on the other hand introducing more latency into the clause sharing system. For example, in GridSAT [?] only clauses with at most three literals are exchanged between the different SAT solving processes, which is also the setup in PaMiraXT (on the client s side) [?]. 2. Another method maintains a shared Conflict Clause Database to share clauses, which has to be accompanied by a thread-based design. In this system, each thread occasionally sends well-suited clauses to this database (again, according to some criteria, e.g. the clause length), while also checking to see if new conflict clauses have been added by other SAT solving threads. PaSAT [?] 1 and ysat [?] both use this concept. The concept of a shared Conflict Clause Database is typically not as scalable as message passing, but allows longer clauses to be shared without overwhelming the entire search process with communication related tasks. This system also reduces the latency within the clause sharing mechanism. 1 Note, that different versions of PaSAT have been published in the past. Besides the one discussed here, there is also a version based on an the PF-approach design as well as a version using mobile agents when executed on a workstation cluster [?,?]. 3
4 3. The third method is the shared memory clause database design that MiraXT (and by this the clients of PaMiraXT) use. Compared to ysat, this approach goes one step further by maintaining only one physical copy of each clause, regardless of it is a conflict clause or a clause of the original CNF formula. All conflict clauses are added to this Shared Clause Database, and each SAT solving thread dynamically selects which clauses it wants to use. This is the reverse to the concept mentioned before, in which each thread chooses which clauses it wants to offer or send to the other threads by integrating them into the Conflict Clause Database. As an example, in PaSAT only clauses with at most five literals will be shared. In contrast to this, PaMiraXT allows each thread to check all available conflict clauses and to consider its current status when selecting helpful clauses. A thread can now decide to add very long clauses that will force implications or conflicts, while ignoring short clauses that are already fulfilled by the thread s variable assignments. This design takes full advantage of the low latency and high bandwidth a shared memory database provides. We present some more details on the parallel SAT solver PaMiraXT that has been optimized to run efficiently on many different hardware platforms. The solver consists of two layers of parallelism. The first level is based on MiraXT, a thread-based implementation optimized for shared memory multiprocessor systems (multi-core and/or multi-cpu). To be able to run our solver not only on shared memory multiprocessor systems, but also on classical workstation clusters, a second layer of parallelism ist added, resulting in the entire parallel SAT algorithm PaMiraXT. The overall design follows a master/client model, where copies of MiraXT are run on different workstations of a particular cluster (acting as clients). For communication purpose we added a separate master process, responsible for exchanging status signals, unevaluated subproblems, and conflict clauses between the clients. Furthermore we discuss recent developments in particular with repsect to preprocessing. Experimental results together with a discussion of other parallel SAT-solvers conclude this section. SMT Extending the propositional logic by embedding some theories, e. g., equalities, uninterpreted functions, or theories over the reals, results in powerful logics and leads to the satisfiability modulo theories (SMT) problem. SMT-solvers find applications in several verification domains, for example 4
5 in bounded model checking of hybrid systems [?,?,?]. In principle, the SSS-approach as well as the PF-approach can be adapted also to the SMT scenario, though in detail search space splitting and conflict clause sharing turns out to be intricate. We provide some details on a parallel SMT-solver called Picoso [?] for the first order theory of the reals extended with transcendental functions. This is a very powerful logic and allows to formalize properties of systems with continuous components, like this is the case for hybrid systems. Picoso is realised with the SSS-approach. To our best knowledge, Picoso is the only published parallel SMT-solver (for the undecidable domain of non-linear constraints involving transcendental functions). The algorithmic core of Picoso is based on the interval constraint solver isat [?]. Currently we are also exploring the PF-approach. First experimental results will be presented. QBF While many QBF solvers are still based on the DPLL algorithm [?], they have advanced considerably in recent years. For instance, some QBF algorithm specific advances include conflict and solution analysis with nonchronological backtracking [?,?,?,?], and preprocessing [?,?]. Modern QBF solvers must combine all these new ideas into an efficient implementation to be competitive. Future QBF solvers, similar to the case of SAT- and SMT-solvers, must harness the potential of multi-core and multi-processor systems if they wish to provide leading edge performance. Similar as in the SMT scenario SSS- and PF-approaches seem feasible but have to be adapted to include the features of modern sequential QBF-solvers to allow e.g. conflict clause and solution cube sharing. The development in this domain is just starting. Before 2009, there has has been only one parallel QBF solver that we are aware of, called PQSOLVE [?]. PQSOLVE was based on the basic DPLL algorithm, without conflict analysis, solution analysis, watched literals, and many other advanced techniques used in QBF solvers today. Recently, the threaded parallel SAT solver MiraXT [?] was modified so that it could directly handle QBF formulas [?]. QMiraXT provides a tight integration of threads to allow significantly more knowledge sharing than an MPI design. Subsequently, PaQuBE [?] builds upon the ideas of QMiraXT and, on the basis of QuBE [?], provides a master/slave MPI design, making it far more scalable than QMiraXT allowing it to take advantage of entire clusters or grids. We finish with first encouraging results on a PF-approach for a rewriting based QBF-solver in combination with the search-based solver 5
6 QMiraXT. 6
Multithreaded SAT Solving
Multithreaded SAT Solving Matthew Lewis, Tobias Schubert, Bernd Becker Institute for Computer Science Albert-Ludwigs-University of Freiburg, Georges-Koehler-Allee 51, 79110 Freiburg, Germany {lewis,schubert,becker}@informatik.uni-freiburg.de
More informationEnhanced Integration of QBF Solving Techniques
Enhanced Integration of QBF Solving Techniques Sven Reimer Albert-Ludwigs-Universität Freiburg reimer@informatik.uni-freiburg.de Florian Pigorsch Albert-Ludwigs-Universität Freiburg pigorsch@informatik.uni-freiburg.de
More information4.1 Review - the DPLL procedure
Applied Logic Lecture 4: Efficient SAT solving CS 4860 Spring 2009 Thursday, January 29, 2009 The main purpose of these notes is to help me organize the material that I used to teach today s lecture. They
More informationProvably Optimal Test Cube Generation using Quantified Boolean Formula Solving
Provably Optimal Test Cube Generation using Quantified Boolean Formula Solving ASP-DAC 2013 Albert-Ludwigs-Universität Freiburg Matthias Sauer, Sven Reimer, Ilia Polian, Tobias Schubert, Bernd Becker Chair
More informationHySAT. what you can use it for how it works example from application domain final remarks. Christian Herde /12
CP2007: Presentation of recent CP solvers HySAT what you can use it for how it works example from application domain final remarks Christian Herde 25.09.2007 /2 What you can use it for Satisfiability checker
More informationMinimum Satisfying Assignments for SMT. Işıl Dillig, Tom Dillig Ken McMillan Alex Aiken College of William & Mary Microsoft Research Stanford U.
Minimum Satisfying Assignments for SMT Işıl Dillig, Tom Dillig Ken McMillan Alex Aiken College of William & Mary Microsoft Research Stanford U. 1 / 20 Satisfiability Modulo Theories (SMT) Today, SMT solvers
More informationOn Computing Minimum Size Prime Implicants
On Computing Minimum Size Prime Implicants João P. Marques Silva Cadence European Laboratories / IST-INESC Lisbon, Portugal jpms@inesc.pt Abstract In this paper we describe a new model and algorithm for
More informationFormally Certified Satisfiability Solving
SAT/SMT Proof Checking Verifying SAT Solver Code Future Work Computer Science, The University of Iowa, USA April 23, 2012 Seoul National University SAT/SMT Proof Checking Verifying SAT Solver Code Future
More informationWHY PARALLEL PROCESSING? (CE-401)
PARALLEL PROCESSING (CE-401) COURSE INFORMATION 2 + 1 credits (60 marks theory, 40 marks lab) Labs introduced for second time in PP history of SSUET Theory marks breakup: Midterm Exam: 15 marks Assignment:
More informationQuteSat. A Robust Circuit-Based SAT Solver for Complex Circuit Structure. Chung-Yang (Ric) Huang National Taiwan University
QuteSat A Robust Circuit-Based SAT Solver for Complex Circuit Structure Chung-Yang (Ric) Huang National Taiwan University To appear: DATE 27 2/1/27 Fact Sheet (Background) Boolean Satisfiability (SAT)
More informationDeductive Methods, Bounded Model Checking
Deductive Methods, Bounded Model Checking http://d3s.mff.cuni.cz Pavel Parízek CHARLES UNIVERSITY IN PRAGUE faculty of mathematics and physics Deductive methods Pavel Parízek Deductive Methods, Bounded
More informationBounded Model Checking with Parametric Data Structures
Bounded Model Checking with Marc Herbstritt (joint work with Erika Ábrahám, Bernd Becker, Martin Steffen) www.avacs.org August 15 2006 4th International Workshop on Bounded Model Checking Context Automated
More informationZchaff: A fast SAT solver. Zchaff: A fast SAT solver
* We d like to build a complete decision procedure for SAT which is efficient. Generalized D-P-L algorithm: while (true) { if (! decide( )) /* no unassigned variables */ return (sat) while (! bcp ( ))
More informationPARALLEL CONSISTENCY CHECKING OF AUTOMOTIVE PRODUCT DATA
PARALLEL CONSISTENCY CHECKING OF AUTOMOTIVE PRODUCT DATA WOLFGANG BLOCHINGER, CARSTEN SINZ AND WOLFGANG KÜCHLIN Symbolic Computation Group, WSI for Computer Science, Universität Tübingen, 72076 Tübingen,
More informationSymbolic and Concolic Execution of Programs
Symbolic and Concolic Execution of Programs Information Security, CS 526 Omar Chowdhury 10/7/2015 Information Security, CS 526 1 Reading for this lecture Symbolic execution and program testing - James
More informationLearning Techniques for Pseudo-Boolean Solving and Optimization
Learning Techniques for Pseudo-Boolean Solving and Optimization José Faustino Fragoso Fremenin dos Santos September 29, 2008 Abstract The extension of conflict-based learning from Propositional Satisfiability
More informationEECS 219C: Formal Methods Boolean Satisfiability Solving. Sanjit A. Seshia EECS, UC Berkeley
EECS 219C: Formal Methods Boolean Satisfiability Solving Sanjit A. Seshia EECS, UC Berkeley The Boolean Satisfiability Problem (SAT) Given: A Boolean formula F(x 1, x 2, x 3,, x n ) Can F evaluate to 1
More informationversat: A Verified Modern SAT Solver
Computer Science, The University of Iowa, USA Satisfiability Problem (SAT) Is there a model for the given propositional formula? Model: assignments to the variables that makes the formula true. SAT if
More informationA Study of High Performance Computing and the Cray SV1 Supercomputer. Michael Sullivan TJHSST Class of 2004
A Study of High Performance Computing and the Cray SV1 Supercomputer Michael Sullivan TJHSST Class of 2004 June 2004 0.1 Introduction A supercomputer is a device for turning compute-bound problems into
More informationEECS 219C: Computer-Aided Verification Boolean Satisfiability Solving. Sanjit A. Seshia EECS, UC Berkeley
EECS 219C: Computer-Aided Verification Boolean Satisfiability Solving Sanjit A. Seshia EECS, UC Berkeley Project Proposals Due Friday, February 13 on bcourses Will discuss project topics on Monday Instructions
More informationHECTOR: Formal System-Level to RTL Equivalence Checking
ATG SoC HECTOR: Formal System-Level to RTL Equivalence Checking Alfred Koelbl, Sergey Berezin, Reily Jacoby, Jerry Burch, William Nicholls, Carl Pixley Advanced Technology Group Synopsys, Inc. June 2008
More informationPractical SAT Solving
Practical SAT Solving Lecture 5 Carsten Sinz, Tomáš Balyo May 23, 2016 INSTITUTE FOR THEORETICAL COMPUTER SCIENCE KIT University of the State of Baden-Wuerttemberg and National Laboratory of the Helmholtz
More informationSAT Solvers. Ranjit Jhala, UC San Diego. April 9, 2013
SAT Solvers Ranjit Jhala, UC San Diego April 9, 2013 Decision Procedures We will look very closely at the following 1. Propositional Logic 2. Theory of Equality 3. Theory of Uninterpreted Functions 4.
More informationImplication Graph Compression inside the SMT Solver isat3
Implication Graph Compression inside the SMT Solver isat3 Karsten Scheibler Albert Ludwigs Universität Freiburg scheibler@informatik.uni-freiburg.de Bernd Becker Albert Ludwigs Universität Freiburg becker@informatik.uni-freiburg.de
More informationLookahead Saturation with Restriction for SAT
Lookahead Saturation with Restriction for SAT Anbulagan 1 and John Slaney 1,2 1 Logic and Computation Program, National ICT Australia Ltd., Canberra, Australia 2 Computer Sciences Laboratory, Australian
More informationCS-E3200 Discrete Models and Search
Shahab Tasharrofi Department of Information and Computer Science, Aalto University Lecture 7: Complete and local search methods for SAT Outline Algorithms for solving Boolean satisfiability problems Complete
More informationDPLL(T ):Fast Decision Procedures
DPLL(T ):Fast Decision Procedures Harald Ganzinger George Hagen Robert Nieuwenhuis Cesare Tinelli Albert Oliveras MPI, Saarburcken The University of Iowa UPC, Barcelona Computer Aided-Verification (CAV)
More informationAcceleration of SAT-based Iterative Property Checking
Acceleration of SAT-based Iterative Property Checking Daniel Große Rolf Drechsler Institute of Computer Science University of Bremen 28359 Bremen, Germany {grosse, drechsle}@informatik.uni-bremen.de Abstract
More informationCircuit versus CNF Reasoning for Equivalence Checking
Circuit versus CNF Reasoning for Equivalence Checking Armin Biere Institute for Formal Models and Verification Johannes Kepler University Linz, Austria Equivalence Checking Workshop 25 Madonna di Campiglio,
More informationConflict Driven Learning and Non-chronological Backtracking
x1 + x4 Conflict Driven Learning and Conflict Driven Learning and x1 + x4 x1 x1=0 x1=0 Conflict Driven Learning and x1 + x4 x1 x1=0 x1=0 Conflict Driven Learning and x1 + x4 x1 x1=0, x4=1 x1=0 x4=1 Conflict
More informationEfficient Circuit to CNF Conversion
Efficient Circuit to CNF Conversion Panagiotis Manolios and Daron Vroon College of Computing, Georgia Institute of Technology, Atlanta, GA, 30332, USA http://www.cc.gatech.edu/home/{manolios,vroon} Abstract.
More informationEvaluation of SAT like Proof Techniques for Formal Verification of Word Level Circuits
Evaluation of SAT like Proof Techniques for Formal Verification of Word Level Circuits André Sülflow Ulrich Kühne Robert Wille Daniel Große Rolf Drechsler Institute of Computer Science University of Bremen
More informationYices 1.0: An Efficient SMT Solver
Yices 1.0: An Efficient SMT Solver SMT-COMP 06 Leonardo de Moura (joint work with Bruno Dutertre) {demoura, bruno}@csl.sri.com. Computer Science Laboratory SRI International Menlo Park, CA Yices: An Efficient
More informationParallel Constraint Programming (and why it is hard... ) Ciaran McCreesh and Patrick Prosser
Parallel Constraint Programming (and why it is hard... ) This Week s Lectures Search and Discrepancies Parallel Constraint Programming Why? Some failed attempts A little bit of theory and some very simple
More informationIntegration of Orthogonal QBF Solving Techniques
Integration of Orthogonal QBF Solving Techniques Sven Reimer, Florian Pigorsch, Christoph Scholl, and Bernd Becker Albert-Ludwigs-Universität Freiburg, Institut für Informatik, D-79110 Freiburg im Breisgau,
More informationPractical SAT Solving
Practical SAT Solving Lecture 5 Carsten Sinz, Tomáš Balyo May 22, 2018 INSTITUTE FOR THEORETICAL COMPUTER SCIENCE KIT University of the State of Baden-Wuerttemberg and National Laboratory of the Helmholtz
More informationSatisfiability-Based Algorithms for 0-1 Integer Programming
Satisfiability-Based Algorithms for 0-1 Integer Programming Vasco M. Manquinho, João P. Marques Silva, Arlindo L. Oliveira and Karem A. Sakallah Cadence European Laboratories / INESC Instituto Superior
More informationSAT Solvers: A Condensed History. Sharad Malik Princeton University COS 598d 3/1/2010
SAT Solvers: A Condensed History Sharad Malik Princeton University COS 598d 3/1/2010 Where are we today? Intractability of the problem no longer daunting Can regularly handle practical instances with millions
More informationA Universal Parallel SAT Checking Kernel
W. Blochinger, C. Sinz, and W. Küchlin. A universal parallel sat checking kernel. In To appear in Proc. of the Intl. Conf. on Parallel and Distributed Processing Techniques and Applications (PDPTA 03),
More informationGridSAT: A Chaff-based Distributed SAT Solver for the Grid
GridSAT: A Chaff-based Distributed SAT Solver for the Grid Wahid Chrabakh and Rich Wolski Department of Computer Science University of California Santa Barbara {chrabakh,rich}@cs.ucsb.edu 1 Abstract We
More informationSAT Solver Heuristics
SAT Solver Heuristics SAT-solver History Started with David-Putnam-Logemann-Loveland (DPLL) (1962) Able to solve 10-15 variable problems Satz (Chu Min Li, 1995) Able to solve some 1000 variable problems
More informationLecture 2: Symbolic Model Checking With SAT
Lecture 2: Symbolic Model Checking With SAT Edmund M. Clarke, Jr. School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 (Joint work over several years with: A. Biere, A. Cimatti, Y.
More informationSEARCHING FOR TRUTH: TECHNIQUES FOR SATISFIABILITY OF BOOLEAN FORMULAS
SEARCHING FOR TRUTH: TECHNIQUES FOR SATISFIABILITY OF BOOLEAN FORMULAS Lintao Zhang a dissertation presented to the faculty of princeton university in candidacy for the degree of doctor of philosophy recommended
More informationModule 10: "Design of Shared Memory Multiprocessors" Lecture 20: "Performance of Coherence Protocols" MOESI protocol.
MOESI protocol Dragon protocol State transition Dragon example Design issues General issues Evaluating protocols Protocol optimizations Cache size Cache line size Impact on bus traffic Large cache line
More informationGenerating Small Countermodels. Andrew Reynolds Intel August 30, 2012
Generating Small Countermodels using SMT Andrew Reynolds Intel August 30, 2012 Acknowledgements Intel Corporation AmitGoel, Sava Krstic University of Iowa Cesare Tinelli, Francois Bobot New York University
More informationBoolean Satisfiability: From Theoretical Hardness to Practical Success. Sharad Malik Princeton University
Boolean Satisfiability: From Theoretical Hardness to Practical Success Sharad Malik Princeton University SAT in a Nutshell Given a Boolean formula, find a variable assignment such that the formula evaluates
More informationChaff: Engineering an Efficient SAT Solver
Chaff: Engineering an Efficient SAT Solver Matthew W.Moskewicz, Concor F. Madigan, Ying Zhao, Lintao Zhang, Sharad Malik Princeton University Slides: Tamir Heyman Some are from Malik s presentation Last
More informationEXTENDING SAT SOLVER WITH PARITY CONSTRAINTS
TKK Reports in Information and Computer Science Espoo 2010 TKK-ICS-R32 EXTENDING SAT SOLVER WITH PARITY CONSTRAINTS Tero Laitinen TKK Reports in Information and Computer Science Espoo 2010 TKK-ICS-R32
More informationCDCL SAT Solvers. Joao Marques-Silva. Theory and Practice of SAT Solving Dagstuhl Workshop. April INESC-ID, IST, ULisbon, Portugal
CDCL SAT Solvers Joao Marques-Silva INESC-ID, IST, ULisbon, Portugal Theory and Practice of SAT Solving Dagstuhl Workshop April 2015 The Success of SAT Well-known NP-complete decision problem [C71] The
More informationCombinational Equivalence Checking
Combinational Equivalence Checking Virendra Singh Associate Professor Computer Architecture and Dependable Systems Lab. Dept. of Electrical Engineering Indian Institute of Technology Bombay viren@ee.iitb.ac.in
More informationClause Sharing and Partitioning for Cloud-Based SMT Solving
Università della Svizzera italiana Facoltà di scienze informatiche Clause Sharing and Partitioning for Cloud-Based SMT Solving Matteo Marescotti, Antti E. J. Hyvärinen, and Natasha Sharygina Università
More informationMulti-core Architectures. Dr. Yingwu Zhu
Multi-core Architectures Dr. Yingwu Zhu What is parallel computing? Using multiple processors in parallel to solve problems more quickly than with a single processor Examples of parallel computing A cluster
More informationSolving Satisfiability with a Novel CPU/GPU Hybrid Solution
Solving Satisfiability with a Novel CPU/GPU Hybrid Solution Cas Craven, Bhargavi Narayanasetty, Dan Zhang Department of Electrical & Computer Engineering University of Texas, Austin, TX 78705 {dcraven,
More informationIssues In Implementing The Primal-Dual Method for SDP. Brian Borchers Department of Mathematics New Mexico Tech Socorro, NM
Issues In Implementing The Primal-Dual Method for SDP Brian Borchers Department of Mathematics New Mexico Tech Socorro, NM 87801 borchers@nmt.edu Outline 1. Cache and shared memory parallel computing concepts.
More informationWatching Clauses in Quantified Boolean Formulae
Watching Clauses in Quantified Boolean Formulae Andrew G D Rowley University of St. Andrews, Fife, Scotland agdr@dcs.st-and.ac.uk Abstract. I present a way to speed up the detection of pure literals and
More informationImplementation of a Sudoku Solver Using Reduction to SAT
Implementation of a Sudoku Solver Using Reduction to SAT For this project you will develop a Sudoku solver that receives an input puzzle and computes a solution, if one exists. Your solver will: read an
More informationA Practical Reconfigurable Hardware Accelerator for Boolean Satisfiability Solvers
A Practical Reconfigurable Hardware Accelerator for Boolean Satisfiability Solvers John D. Davis Microsoft Research Silicon Valley Lab joda@microsoft.com Zhangxi Tan EECS Department UC Berkeley xtan@cs.berkeley.edu
More informationMemory Hierarchy Utilization of a SAT Solver
Belegarbeit Memory Hierarchy Utilization of a SAT Solver Norbert Manthey March 31, 2010 Technische Universität Dresden Fakultät Informatik Betreuende Hochschullehrer: Prof. Dr. rer. nat. Hermann Härtig,
More informationUnrestricted Nogood Recording in CSP search
Unrestricted Nogood Recording in CSP search George Katsirelos and Fahiem Bacchus Department of Computer Science, University Of Toronto, Toronto, Ontario, Canada [gkatsi,fbacchus]@cs.toronto.edu Abstract.
More informationMilind Kulkarni Research Statement
Milind Kulkarni Research Statement With the increasing ubiquity of multicore processors, interest in parallel programming is again on the upswing. Over the past three decades, languages and compilers researchers
More informationESE535: Electronic Design Automation CNF. Today CNF. 3-SAT Universal. Problem (A+B+/C)*(/B+D)*(C+/A+/E)
ESE535: Electronic Design Automation CNF Day 21: April 21, 2008 Modern SAT Solvers ({z}chaff, GRASP,miniSAT) Conjunctive Normal Form Logical AND of a set of clauses Product of sums Clauses: logical OR
More informationBoolean Satisfiability Solving Part II: DLL-based Solvers. Announcements
EECS 219C: Computer-Aided Verification Boolean Satisfiability Solving Part II: DLL-based Solvers Sanjit A. Seshia EECS, UC Berkeley With thanks to Lintao Zhang (MSR) Announcements Paper readings will be
More informationExample: Map coloring
Today s s lecture Local Search Lecture 7: Search - 6 Heuristic Repair CSP and 3-SAT Solving CSPs using Systematic Search. Victor Lesser CMPSCI 683 Fall 2004 The relationship between problem structure and
More informationBoolean Satisfiability: The Central Problem of Computation
Boolean Satisfiability: The Central Problem of Computation Peter Kogge SAT Notre Dame CSE 34151: Theory of Computing: Fall 2017 Slide 1 (p. 299) SAT: Boolean Satisfiability wff: well-formed-formula constructed
More informationHySAT. HySAT Quick Start Guide. 1 Introduction. 2 Modes of operation. Christian Herde. December 20, Single formula mode
HySAT Quick Start Guide Christian Herde December 0, 009 HySAT 1 Introduction HySAT is a satisfiability checker for Boolean combinations of arithmetic constraints over real and integer valued variables.
More informationTowards More Effective Unsatisfiability-Based Maximum Satisfiability Algorithms
Towards More Effective Unsatisfiability-Based Maximum Satisfiability Algorithms Joao Marques-Silva and Vasco Manquinho School of Electronics and Computer Science, University of Southampton, UK IST/INESC-ID,
More informationSAT/SMT Solvers and Applications
SAT/SMT Solvers and Applications University of Waterloo Winter 2013 Today s Lecture Lessons learnt so far Implementation-related attacks (control-hazard, malware,...) Program analysis techniques can detect
More informationUnrestricted Backtracking Algorithms for Satisfiability
From: AAAI Technical Report FS-01-04. Compilation copyright 2001, AAAI (www.aaai.org). All rights reserved. Unrestricted Backtracking Algorithms for Satisfiability I. Lynce, L. Baptista and J. Marques-Silva
More informationChecking Equivalence for Circuits Containing Incompletely Specified Boxes
Freiburg, Germany, September 00 Checking Equivalence for Circuits Containing Incompletely Specified Boxes Christoph Scholl Bernd Becker Institute of Computer Science Albert Ludwigs University D 79110 Freiburg
More informationScaling Exact Multi Objective Combinatorial Optimization by Parallelization
Scaling Exact Multi Objective Combinatorial Optimization by Parallelization Jianmei Guo, Edward Zulkoski, Rafael Olaechea, Derek Rayside, Krzysztof Czarnecki, Sven Apel, Joanne M. Atlee Multi Objective
More informationFoundations of AI. 8. Satisfiability and Model Construction. Davis-Putnam, Phase Transitions, GSAT and GWSAT. Wolfram Burgard & Bernhard Nebel
Foundations of AI 8. Satisfiability and Model Construction Davis-Putnam, Phase Transitions, GSAT and GWSAT Wolfram Burgard & Bernhard Nebel Contents Motivation Davis-Putnam Procedure Average complexity
More informationPROPOSITIONAL LOGIC (2)
PROPOSITIONAL LOGIC (2) based on Huth & Ruan Logic in Computer Science: Modelling and Reasoning about Systems Cambridge University Press, 2004 Russell & Norvig Artificial Intelligence: A Modern Approach
More informationA Novel SAT All-Solutions Solver for Efficient Preimage Computation
A Novel SAT All-Solutions Solver for Efficient Preimage Computation Bin Li Department of ECE Virginia Tech. Blacksburg, VA, 24061 Michael S. Hsiao Department of ECE Virginia Tech. Blacksburg, VA, 24061
More informationOpenSMT2: An SMT Solver for Multi-Core and Cloud Computing
OpenSMT2: An SMT Solver for Multi-Core and Cloud Computing Antti E. J. Hyvärinen, Matteo Marescotti, Leonardo Alt, and Natasha Sharygina Faculty of Informatics, University of Lugano Via Giuseppe Buffi
More informationMultiprocessors and Thread-Level Parallelism. Department of Electrical & Electronics Engineering, Amrita School of Engineering
Multiprocessors and Thread-Level Parallelism Multithreading Increasing performance by ILP has the great advantage that it is reasonable transparent to the programmer, ILP can be quite limited or hard to
More informationHeuristic Backtracking Algorithms for SAT
Heuristic Backtracking Algorithms for SAT A. Bhalla, I. Lynce, J.T. de Sousa and J. Marques-Silva IST/INESC-ID, Technical University of Lisbon, Portugal fateet,ines,jts,jpmsg@sat.inesc.pt Abstract In recent
More informationGrADSAT: A Parallel SAT Solver for the Grid
GrADSAT: A Parallel SAT Solver for the Grid UCSB Computer Science Technical Report Number 2003-05 Wahid Chrabakh and Rich Wolski Department of Computer Science University of California Santa Barbara chrabakh,rich
More informationParallelizing SAT Solver With specific application on solving Sudoku Puzzles
6.338 Applied Parallel Computing Final Report Parallelizing SAT Solver With specific application on solving Sudoku Puzzles Hank Huang May 13, 2009 This project was focused on parallelizing a SAT solver
More informationIntegrating a SAT Solver with Isabelle/HOL
Integrating a SAT Solver with / Tjark Weber (joint work with Alwen Tiu et al.) webertj@in.tum.de First Munich-Nancy Workshop on Decision Procedures for Theorem Provers March 6th & 7th, 2006 Integrating
More informationCache Coherence. CMU : Parallel Computer Architecture and Programming (Spring 2012)
Cache Coherence CMU 15-418: Parallel Computer Architecture and Programming (Spring 2012) Shared memory multi-processor Processors read and write to shared variables - More precisely: processors issues
More informationA Distributed Algorithm to Evaluate Quantified Boolean Formulae
From: AAAI-00 Proceedings. Copyright 2000, AAAI (www.aaai.org). All rights reserved. A Distributed Algorithm to Evaluate Quantified Boolean Formulae Rainer Feldmann, Burkhard Monien, Stefan Schamberger
More informationSolving 3-SAT. Radboud University Nijmegen. Bachelor Thesis. Supervisors: Henk Barendregt Alexandra Silva. Author: Peter Maandag s
Solving 3-SAT Radboud University Nijmegen Bachelor Thesis Author: Peter Maandag s3047121 Supervisors: Henk Barendregt Alexandra Silva July 2, 2012 Contents 1 Introduction 2 1.1 Problem context............................
More informationIntroduction II. Overview
Introduction II Overview Today we will introduce multicore hardware (we will introduce many-core hardware prior to learning OpenCL) We will also consider the relationship between computer hardware and
More informationNormal Forms for Boolean Expressions
Normal Forms for Boolean Expressions A NORMAL FORM defines a class expressions s.t. a. Satisfy certain structural properties b. Are usually universal: able to express every boolean function 1. Disjunctive
More informationOpenSMT2. A Parallel, Interpolating SMT Solver. Antti Hyvärinen, Matteo Marescotti, Leonardo Alt, Sepideh Asadi, and Natasha Sharygina
OpenSMT2 A Parallel, Interpolating SMT Solver Antti Hyvärinen, Matteo Marescotti, Leonardo Alt, Sepideh Asadi, and Natasha Sharygina Why another SMT solver? Model checking OpenSMT Interpolation Parallel
More informationBITCOIN MINING IN A SAT FRAMEWORK
BITCOIN MINING IN A SAT FRAMEWORK Jonathan Heusser @jonathanheusser DISCLAIMER JUST TO BE CLEAR.. This is research! Not saying ASICs suck I am not a cryptographer, nor SAT solver guy WTF REALISED PHD RESEARCH
More informationRecent Improvements in the SMT Solver isat
Recent Improvements in the SMT Solver isat Karsten Scheibler Albert Ludwigs Universität Freiburg scheibler@informatik.uni-freiburg.de Stefan Kupferschmid Albert Ludwigs Universität Freiburg skupfers@informatik.uni-freiburg.de
More informationComputer Architecture
Computer Architecture Chapter 7 Parallel Processing 1 Parallelism Instruction-level parallelism (Ch.6) pipeline superscalar latency issues hazards Processor-level parallelism (Ch.7) array/vector of processors
More informationBoolean Representations and Combinatorial Equivalence
Chapter 2 Boolean Representations and Combinatorial Equivalence This chapter introduces different representations of Boolean functions. It then discusses the applications of these representations for proving
More informationCombinational Equivalence Checking Using Incremental SAT Solving, Output Ordering, and Resets
ASP-DAC 2007 Yokohama Combinational Equivalence Checking Using Incremental SAT Solving, Output ing, and Resets Stefan Disch Christoph Scholl Outline Motivation Preliminaries Our Approach Output ing Heuristics
More informationAn Introduction to SAT Solvers
An Introduction to SAT Solvers Knowles Atchison, Jr. Fall 2012 Johns Hopkins University Computational Complexity Research Paper December 11, 2012 Abstract As the first known example of an NP Complete problem,
More informationMultiprocessors and Thread Level Parallelism Chapter 4, Appendix H CS448. The Greed for Speed
Multiprocessors and Thread Level Parallelism Chapter 4, Appendix H CS448 1 The Greed for Speed Two general approaches to making computers faster Faster uniprocessor All the techniques we ve been looking
More informationMaintaining Mutual Consistency for Cached Web Objects
Maintaining Mutual Consistency for Cached Web Objects Bhuvan Urgaonkar, Anoop George Ninan, Mohammad Salimullah Raunak Prashant Shenoy and Krithi Ramamritham Department of Computer Science, University
More informationPaSAT Parallel SAT-Checking with Lemma Exchange: Implementation and Applications
PaSAT Parallel SAT-Checking with Lemma Exchange: Implementation and Applications Carsten Sinz, Wolfgang Blochinger and Wolfgang Küchlin Symbolic Computation Group, WSI for Computer Science University of
More informationXuandong Li. BACH: Path-oriented Reachability Checker of Linear Hybrid Automata
BACH: Path-oriented Reachability Checker of Linear Hybrid Automata Xuandong Li Department of Computer Science and Technology, Nanjing University, P.R.China Outline Preliminary Knowledge Path-oriented Reachability
More informationHybrid Constraint Solvers
Hybrid Constraint Solvers - An overview Why Hybrid Solvers CP and SAT: Lazy Clause Generation CP and LP: Reification of Linear Constraints Conclusions 9 November 2011 Pedro Barahona - EPCL - Hybrid Solvers
More informationTurbo-Charging Lemmas on Demand with Don t Care Reasoning
Turbo-Charging Lemmas on Demand with Don t Care Reasoning Aina Niemetz, Mathias Preiner and Armin Biere Institute for Formal Models and Verification (FMV) Johannes Kepler University, Linz, Austria http://fmv.jku.at/
More informationA Pearl on SAT Solving in Prolog (extended abstract)
A Pearl on SAT Solving in Prolog (extended abstract) Jacob M. Howe and Andy King 1 Introduction The Boolean satisfiability problem, SAT, is of continuing interest because a variety of problems are naturally
More informationHelsinki University of Technology Laboratory for Theoretical Computer Science Research Reports 100
Helsinki University of Technology Laboratory for Theoretical Computer Science Research Reports 100 Teknillisen korkeakoulun tietojenkäsittelyteorian laboratorion tutkimusraportti 100 Espoo 2006 HUT-TCS-A100
More informationA Lightweight Component Caching Scheme for Satisfiability Solvers
A Lightweight Component Caching Scheme for Satisfiability Solvers Knot Pipatsrisawat and Adnan Darwiche {thammakn,darwiche}@cs.ucla.edu Computer Science Department University of California, Los Angeles
More information