e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Embedded System Design Process Module No: CS/ES/33 Quadrant 1 e-text

Size: px
Start display at page:

Download "e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Embedded System Design Process Module No: CS/ES/33 Quadrant 1 e-text"

Transcription

1 e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Embedded System Design Process Module No: CS/ES/33 Quadrant 1 e-text In this lecture various steps involved in Embedded system design process will be discussed. 1. Design process steps: There are different steps involved in Embedded system design process. These steps depend on the design methodology. Design methodology is important for optimizing performance, and developing computer aided design tools. It also makes communication between team members easier. Figure1 shows the steps in the design process. They are requirements gathering, specification formulation, architecture design, building of components, and system integration. Figure 1. Steps in Design process The steps in the design process can be viewed as top down view and bottom up view. Top down view begins with the most abstract description of the system and concludes with concrete details. Bottom up view starts with components to build a system. Bottom up design steps are shown in the figure as dashed-line arrows. We need bottom up design because we do not have perfect insight into how later stages of the design process will turn out. The major goals of the design to be considered are :

2 Manufacturing cost; Performance (both overall speed and deadlines) and Power consumption. The tasks which need to be performed at each step are the following. We must analyze the design at each step to determine how we can meet the specifications. We must then refine the design to add details. We must verify the design to ensure that it still meets all system goals, such as cost, speed, and so on. We will discuss each step of the design process in detail. 1.1 Requirements Informal descriptions gathered from the customer are known as requirements. The requirements are refined into a specification to begin the designing of the system architecture. Requirements can be functional or non-functional requirements. Functional requirements need output as a function of input. Non-functional requirements includes performance, cost, physical size, weight, and power consumption. Performance may be a combination of soft performance metrics such as approximate time to perform a user-level function and hard deadlines by which a particular operation must be completed. Cost includes the manufacturing, nonrecurring engineering(nre) and other costs of designing the system. Physical size and weight are the physical aspects of the final system. These can vary greatly depending upon the application. Power consumption can be specified in the requirements stage in terms of battery life. Let us consider an example of a GPS system. The sample Requirement Form is shown in Figure Specification Figure 2. Requirements chart

3 Requirements gathered is refined into a specification. Specification serves as the contract between the customers and the architects. Specification is essential to create working systems with a minimum of designer effort. It must be specific, understandable and accurately reflect the customer s requirements. Considering the example of the GPS system, the specification would include details for several components: Data received from the GPS satellite constellation Map data User interface Operations that must be performed to satisfy customer requests Background actions 1.3 Architecture Design The specification describes only the functions of the system. Implementation of the system is described by the Architecture. The architecture is a plan for the overall structure of the system. It will be used later to design the components.the architecture will be illustrated using block diagrams as shown below. A basic block diagram of the GPS system shows the major operations and the data flow among the blocks. Figure 3. GPS system data flow and operations This block diagram( figure 3) is an initial architecture that is not based either on hardware or on software but combination of both. This block diagram explains about GPS navigating system where GPS receiver gets current position and the destination is taken from user, digital map for source to destination is found from database and

4 displayed by the renderer. The system block diagram may be refined into two block diagrams - hardware and software Hardware block diagram : Figure 4. GPS system hardware Hardware consists of one central CPU surrounded by memory and I/O devices. We have chosen to use two memories that is frame buffer for the pixels to be displayed and separate program/data memory for general use by the CPU. The GPS receiver is used to get the GPS coordinates, and the panel I/O is used to get the destination from the user Software block diagram :

5 Figure 5. GPS system software The software block diagram closely follows the system block diagram. We have added a timer to control when we read the buttons on the user interface and render data onto the screen. To have a truly complete architectural description, we require more details, such as where units in the software block diagram will be executed in the hardware block diagram and when the operations will be performed in time. Architectural descriptions must be designed to satisfy the functional and non-functional requirements. Not only must all the required functions be present, but we must meet cost, speed, power and other non- functional constraints. Starting out with a system architecture and refining that to hardware and software architectures is one good way to ensure that we meet all specifications. We can concentrate on the functional elements in the system block diagram, and then consider the non- functional constraints when creating the hardware and software architectures. How do we know that our hardware and software architectures in fact meet constraints on speed, cost, and so on? Estimate the properties of the components in the block diagrams ( search and rendering functions in the moving map system) Accurate estimation derives in part from experience, both general design and particular experience. All the non- functional constraints are estimated. If the decisions are based on bad data, those results will show up only during the final phases of design. 1.4 Hardware and Software components The architectural description tells us what components we need. The component design effort builds those components in conformance to the architecture and specification. The components in general includes both hardware and software modules. Some of the components will be ready-made (example :CPU, memory chips). In the moving map, GPS receiver is a predesigned standard hardware component. Topographic software is a standard software module which uses standard routines to access the database. Printed circuit board are the components which needs to be designed. Lots of custom programming is required. When creating these embedded software modules, ensure the system runs properly in real time and that it does not take up more memory space than allowed. The power consumption of the moving map software example is particularly important. You may need to be very careful about how you read and write memory to minimize power. For example, memory transactions must be carefully planned to avoid reading the same

6 data several times, since memory accesses are a major source of power consumption. 1.5 System integration After the components are built, they are integrated. Bugs are typically found during the system integration. Good planning can help us to find the bugs quickly. By debugging a few modules at a time, simple bugs can be uncovered. By fixing the simple bugs early, more complex or obscure bugs can be uncovered. System integration is difficult because it usually uncovers problems. The debugging facilities for embedded systems are usually much more limited than the desktop systems. Careful attention is needed to insert appropriate debugging facilities during design which can help to ease system integration problems. 2. Summary In the Embedded system design process, information is first collected and refined in the Requirement step. Specification uses the refined information to describe the functions of the system which accurately reflects the customer s requirements and also serves as the contract between the customer and the designer. The functions described by the specification are implemented by the Architecture design. The architectural design describes the components we need which will include both the hardware and software components. After the components are built, they are integrated to get the final system. 3. References 1. Wayne Wolf, Computers as components: Principles of embedded computing systems design ; Second edition, published by Morgan Kaufmann series(2008).

The Embedded System Design Process. Wolf Text - Chapter 1.3

The Embedded System Design Process. Wolf Text - Chapter 1.3 The Embedded System Design Process Wolf Text - Chapter 1.3 Design methodologies for complex embedded systems? Design methodologies A procedure for designing a system. Understanding your methodology helps

More information

UNIT 1 (ECS-10CS72) VTU Question paper solutions

UNIT 1 (ECS-10CS72) VTU Question paper solutions UNIT 1 (ECS-10CS72) VTU Question paper solutions 1. Give the characteristics and constraint of embedded system? Jun 14 Embedded computing is in many ways much more demanding than the sort of programs that

More information

Design of Embedded Systems

Design of Embedded Systems Design of Embedded Systems José Costa Software for Embedded Systems Departamento de Engenharia Informática (DEI) Instituto Superior Técnico 2015-01-02 José Costa (DEI/IST) Design of Embedded Systems 1

More information

The Embedded System Design Process. Wolf Text - Chapter 1.3

The Embedded System Design Process. Wolf Text - Chapter 1.3 The Embedded System Design Process Wolf Text - Chapter 1.3 Design methodologies A procedure for designing a system. Understanding your methodology helps you ensure you didn t skip anything. Compilers,

More information

Subject : Computer Science. Paper : Software Quality Management. Module : CASE Tools

Subject : Computer Science. Paper : Software Quality Management. Module : CASE Tools e-pg Pathshala Subject : Computer Science Paper : Software Quality Management Module : CASE Tools Module No: Quadrant 1: CS/SQM/26 e-text An increasing variety of specialized computerized tools (actually

More information

Introduction. Definition. What is an embedded system? What are embedded systems? Challenges in embedded computing system design. Design methodologies.

Introduction. Definition. What is an embedded system? What are embedded systems? Challenges in embedded computing system design. Design methodologies. Introduction What are embedded systems? Challenges in embedded computing system design. Design methodologies. What is an embedded system? Communication Avionics Automobile Consumer Electronics Office Equipment

More information

e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Embedded Software Development Tools Module No: CS/ES/36 Quadrant 1 e-text

e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Embedded Software Development Tools Module No: CS/ES/36 Quadrant 1 e-text e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Embedded Software Development Tools Module No: CS/ES/36 Quadrant 1 e-text In this module, we will discuss about the host and target

More information

LECTURE NOTES EMBEDDED SYSTEM DESIGN. (Regulation: IARE-R16) ( ) Mr. N Nagaraju Assistant professor INFORMATION TECHNOLOGY

LECTURE NOTES EMBEDDED SYSTEM DESIGN. (Regulation: IARE-R16) ( ) Mr. N Nagaraju Assistant professor INFORMATION TECHNOLOGY LECTURE NOTES ON EMBEDDED SYSTEM DESIGN B.Tech VI Semester (AUTONOMOUS) (Regulation: IARE-R16) (2018-2019) Mr. N Nagaraju Assistant professor INFORMATION TECHNOLOGY INSTITUTE OF AERONAUTICAL ENGINEERING

More information

Reminder. Course project team forming deadline. Course project ideas. Friday 9/8 11:59pm You will be randomly assigned to a team after the deadline

Reminder. Course project team forming deadline. Course project ideas. Friday 9/8 11:59pm You will be randomly assigned to a team after the deadline Reminder Course project team forming deadline Friday 9/8 11:59pm You will be randomly assigned to a team after the deadline Course project ideas If you have difficulty in finding team mates, send your

More information

Reminder. Course project team forming deadline. Course project ideas. Next milestone

Reminder. Course project team forming deadline. Course project ideas. Next milestone Reminder Course project team forming deadline Thursday 9/6 11:59pm You will be randomly assigned to a team after the deadline Course project ideas If you have difficulty in finding team mates, send your

More information

Introduction to Assurance

Introduction to Assurance Introduction to Assurance Overview Why assurance? Trust and assurance Life cycle and assurance April 1, 2015 Slide #1 Overview Trust Problems from lack of assurance Types of assurance Life cycle and assurance

More information

Reference: Barry & Crowley, Modern Embedded Computing: Designing Connected, Pervasive, Media-Rich Systems, Morgan Kaufmann, 2012.

Reference: Barry & Crowley, Modern Embedded Computing: Designing Connected, Pervasive, Media-Rich Systems, Morgan Kaufmann, 2012. Cuauhtémoc Carbajal Reference: Barry & Crowley, Modern Embedded Computing: Designing Connected, Pervasive, Media-Rich Systems, Morgan Kaufmann, 2012. Introduction Most classes of electronics are becoming

More information

Embedded computing system

Embedded computing system Unit-1 EMBEDDED COMPUTING SYSTEM 1.1 COMPLEX SYSTEMS AND MICROPROCESSORS Embedded computer system is any device that includes a programmable computer but is not itself intended to be a general-purpose

More information

Lecture 3: Design Methodologies

Lecture 3: Design Methodologies Lecture 3: Design Methodologies Embedded Computing Systems Mikko Lipasti, adapted from M. Schulte Based on slides and textbook from Wayne Wolf High Performance Embedded Computing 2007 Elsevier Topics Design

More information

OPERATING SYSTEMS CS136

OPERATING SYSTEMS CS136 OPERATING SYSTEMS CS136 Jialiang LU Jialiang.lu@sjtu.edu.cn Based on Lecture Notes of Tanenbaum, Modern Operating Systems 3 e, 1 Chapter 5 INPUT/OUTPUT 2 Overview o OS controls I/O devices => o Issue commands,

More information

Embedded Computing System. Sub Code: 10CS72 IA Marks :25 Hrs/Week: 04 Exam Hours :03 Total Hrs: 52 Exam Marks :100 PART- A

Embedded Computing System. Sub Code: 10CS72 IA Marks :25 Hrs/Week: 04 Exam Hours :03 Total Hrs: 52 Exam Marks :100 PART- A Sub Code: IA Marks :25 Hrs/Week: 04 Exam Hours :03 Total Hrs: 52 Exam Marks :100 PART- A UNIT 1 6 Hours Embedded Computing: Introduction, Complex Systems and Microprocessors, Embedded Systems Design Process,

More information

José Costa What is an embedded system? Examples of embedded systems. Characteristics of embedded systems

José Costa What is an embedded system? Examples of embedded systems. Characteristics of embedded systems José Costa (DEI/IST) What is an Embedded System? 2012-02-14 2 / 40 What is an Embedded System? José Costa Software for Embedded Systems Department of Computer Science and Engineering (DEI) Instituto Superior

More information

Steps for project success. git status. Milestones. Deliverables. Homework 1 submitted Homework 2 will be posted October 26.

Steps for project success. git status. Milestones. Deliverables. Homework 1 submitted Homework 2 will be posted October 26. git status Steps for project success Homework 1 submitted Homework 2 will be posted October 26 due November 16, 9AM Projects underway project status check-in meetings November 9 System-building project

More information

Power Management. José Costa. Software for Embedded Systems. Departamento de Engenharia Informática (DEI) Instituto Superior Técnico

Power Management. José Costa. Software for Embedded Systems. Departamento de Engenharia Informática (DEI) Instituto Superior Técnico Power Management José Costa Software for Embedded Systems Departamento de Engenharia Informática (DEI) Instituto Superior Técnico 2015-03-30 José Costa (DEI/IST) Power Management 1 Outline CPU Power Consumption

More information

Visual Profiler. User Guide

Visual Profiler. User Guide Visual Profiler User Guide Version 3.0 Document No. 06-RM-1136 Revision: 4.B February 2008 Visual Profiler User Guide Table of contents Table of contents 1 Introduction................................................

More information

DESIGN OF A CUBESAT PAYLOAD INTERFACE. Jason Axelson Department of Electrical Engineering University of Hawai i at Mānoa Honolulu, HI ABSTRACT

DESIGN OF A CUBESAT PAYLOAD INTERFACE. Jason Axelson Department of Electrical Engineering University of Hawai i at Mānoa Honolulu, HI ABSTRACT DESIGN OF A CUBESAT PAYLOAD INTERFACE Jason Axelson Department of Electrical Engineering University of Hawai i at Mānoa Honolulu, HI 96822 ABSTRACT Typically, a complete satellite will be designed around

More information

Overview. EE 4504 Computer Organization. This section. Items to be discussed. Section 9 RISC Architectures. Reading: Text, Chapter 12

Overview. EE 4504 Computer Organization. This section. Items to be discussed. Section 9 RISC Architectures. Reading: Text, Chapter 12 Overview EE 4504 Computer Organization Section 9 RISC Architectures This section Explores the development of RISC (Reduced Instruction Set Computer) architectures and Contrasts them with conventional CISC

More information

Ch 1: The Architecture Business Cycle

Ch 1: The Architecture Business Cycle Ch 1: The Architecture Business Cycle For decades, software designers have been taught to build systems based exclusively on the technical requirements. Software architecture encompasses the structures

More information

EE Embedded Systems Design

EE Embedded Systems Design EE4800-03 Embedded Systems Design Lesson 2 Structured Design, Documentation, and Laboratory Notebooks 1 Overview - Structured Design The divide-and-conquer technique Requirements Partitioning - The Black

More information

Verification and Validation. Ian Sommerville 2004 Software Engineering, 7th edition. Chapter 22 Slide 1

Verification and Validation. Ian Sommerville 2004 Software Engineering, 7th edition. Chapter 22 Slide 1 Verification and Validation 1 Objectives To introduce software verification and validation and to discuss the distinction between them To describe the program inspection process and its role in V & V To

More information

Accessibility 101. Things to Consider. Text Documents & Presentations: Word, PDF, PowerPoint, Excel, and General D2L Accessibility Guidelines.

Accessibility 101. Things to Consider. Text Documents & Presentations: Word, PDF, PowerPoint, Excel, and General D2L Accessibility Guidelines. Accessibility 101 Things to Consider Text Documents & Presentations: Word, PDF, PowerPoint, Excel, and General D2L Accessibility Guidelines. Things to Consider Structure Figures Hyperlinks Lists Columns

More information

Top-Down Transaction-Level Design with TL-Verilog

Top-Down Transaction-Level Design with TL-Verilog Top-Down Transaction-Level Design with TL-Verilog Steven Hoover Redwood EDA Shrewsbury, MA, USA steve.hoover@redwoodeda.com Ahmed Salman Alexandria, Egypt e.ahmedsalman@gmail.com Abstract Transaction-Level

More information

e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Serial Port Communication Module No: CS/ES/11 Quadrant 1 e-text

e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Serial Port Communication Module No: CS/ES/11 Quadrant 1 e-text e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Serial Port Communication Module No: CS/ES/11 Quadrant 1 e-text In this lecture, serial port communication will be discussed in

More information

Digital Systems Design. System on a Programmable Chip

Digital Systems Design. System on a Programmable Chip Digital Systems Design Introduction to System on a Programmable Chip Dr. D. J. Jackson Lecture 11-1 System on a Programmable Chip Generally involves utilization of a large FPGA Large number of logic elements

More information

SM 3511 Interface Design. Institutionalizing interface design

SM 3511 Interface Design. Institutionalizing interface design SM 3511 Interface Design Institutionalizing interface design Eric Schaffer, 2013. Institutionalization of UX: A Step-by-Step Guide to a User Experience Practice (2nd Edition) A champion (usually reports

More information

Ch 1: The Architecture Business Cycle

Ch 1: The Architecture Business Cycle Ch 1: The Architecture Business Cycle For decades, software designers have been taught to build systems based exclusively on the technical requirements. Software architecture encompasses the structures

More information

CSE 466 Software for Embedded Systems. CSE 466 Software for Embedded Systems

CSE 466 Software for Embedded Systems. CSE 466 Software for Embedded Systems CSE 466 Software for Embedded Systems Instructor: Gaetano Borriello CSE 572, Hours: by app t gaetano@cs.washington.edu Teaching Assistants: Brain French CSE 003, Hours TTh 2:30-5:30 bmf@cs.washington.edu

More information

Performance Analysis and Culling Algorithms

Performance Analysis and Culling Algorithms Performance Analysis and Culling Algorithms Michael Doggett Department of Computer Science Lund University 2009 Tomas Akenine-Möller and Michael Doggett 1 Assignment 2 Sign up for Pluto labs on the web

More information

Hardware Accelerators

Hardware Accelerators Hardware Accelerators José Costa Software for Embedded Systems Departamento de Engenharia Informática (DEI) Instituto Superior Técnico 2014-04-08 José Costa (DEI/IST) Hardware Accelerators 1 Outline Hardware

More information

dt+ux Design Thinking for User Experience Design, Prototyping & Evaluation Autumn 2016 Prof. James A. Landay Stanford University

dt+ux Design Thinking for User Experience Design, Prototyping & Evaluation Autumn 2016 Prof. James A. Landay Stanford University DESIGN THINKING FOR USER EXPERIENCE DESIGN + PROTOTYPING + EVALUATION Hall of Fame or Shame? Early Stage Prototyping Computer Science Department October 20, 2016 Paper ipad App By 53 2 Hall of Fame or

More information

CS 520 Theory and Practice of Software Engineering Fall 2018

CS 520 Theory and Practice of Software Engineering Fall 2018 CS 520 Theory and Practice of Software Engineering Fall 2018 Nediyana Daskalova Monday, 4PM CS 151 Debugging October 30, 2018 Personalized Behavior-Powered Systems for Guiding Self-Experiments Help me

More information

LESSON 13 OVERVIEW OF PROGRAM DEVELOPMENT PHASES

LESSON 13 OVERVIEW OF PROGRAM DEVELOPMENT PHASES PROGRAM DEVELOPMENT LESSON 13 OVERVIEW OF PROGRAM DEVELOPMENT PHASES In program development, there are five main phases. These phases are a series of steps that programmers undertake to build computer

More information

Testing, code coverage and static analysis. COSC345 Software Engineering

Testing, code coverage and static analysis. COSC345 Software Engineering Testing, code coverage and static analysis COSC345 Software Engineering Outline Various testing processes ad hoc / formal / automatic Unit tests and test driven development Code coverage metrics Integration

More information

Creating an Intranet using Lotus Web Content Management. Part 2 Project Planning

Creating an Intranet using Lotus Web Content Management. Part 2 Project Planning Creating an Intranet using Lotus Web Content Management Introduction Part 2 Project Planning Many projects have failed due to poor project planning. The following article gives an overview of the typical

More information

Assembly Language Programming

Assembly Language Programming Assembly Language Programming Remember the programmer shown in our first lecture? Originally, computers were programmed manually. After a while, scientists began to consider ways to accelerate and facilitate

More information

Digital Design Methodology (Revisited) Design Methodology: Big Picture

Digital Design Methodology (Revisited) Design Methodology: Big Picture Digital Design Methodology (Revisited) Design Methodology Design Specification Verification Synthesis Technology Options Full Custom VLSI Standard Cell ASIC FPGA CS 150 Fall 2005 - Lec #25 Design Methodology

More information

SECTION 2 (Part B) Types And Components Of Computer Systems. Sophia Pratzioti

SECTION 2 (Part B) Types And Components Of Computer Systems. Sophia Pratzioti SECTION 2 (Part B) Types And Components Of Computer Systems 2 Hardware & Software Hardware: is the physical parts of the computer system the part that you can touch and see. Hardware can be either external

More information

Introduction. About this tutorial. How to use this tutorial

Introduction. About this tutorial. How to use this tutorial Basic Entry & not About this tutorial This tutorial consists of an introduction to creating simple circuits on an FPGA using a variety of methods. There are two ways to create the circuit: using or by

More information

CHAPTER 1 TYPES & COMPONENTS OF COMPUTER SYSTEM

CHAPTER 1 TYPES & COMPONENTS OF COMPUTER SYSTEM CHAPTER 1 TYPES & COMPONENTS OF COMPUTER SYSTEM 1.1 Hardware and Software Q.1) Define hardware and software: a) Hardware Hardware is a general term used for the physical components (parts) that make up

More information

for developers Save time on compilation, locating & fixing errors instantly detects and highlights errors in your code and allows automatic correction

for developers Save time on compilation, locating & fixing errors instantly detects and highlights errors in your code and allows automatic correction For You and Your Business is the most intelligent productivity tool for.net development. However, it proves to be a great asset not only for software engineers, but also for your whole software development

More information

Programmable timer PICAXE programming editor guide Page 1 of 13

Programmable timer PICAXE programming editor guide Page 1 of 13 Programmable timer PICAXE programming editor guide Page 1 of 13 This programming guide is for use with: A programmable timer board. PICAXE programming editor software. When the software starts a menu is

More information

Digital Design Methodology

Digital Design Methodology Digital Design Methodology Prof. Soo-Ik Chae Digital System Designs and Practices Using Verilog HDL and FPGAs @ 2008, John Wiley 1-1 Digital Design Methodology (Added) Design Methodology Design Specification

More information

CPE 101. Overview. Programming vs. Cooking. Key Definitions/Concepts B-1

CPE 101. Overview. Programming vs. Cooking. Key Definitions/Concepts B-1 CPE 101 Lecture 2: Problems, Algorithms, and Programs (Slides adapted from a UW course, copyrighted and used by permission) Overview High-level survey Problems, algorithms, and programs Problem solving

More information

Keeping You Organized Since 1948

Keeping You Organized Since 1948 Keeping You Organized Since 1948 Phone 972-641-4911 www.sa-so.com Fax 972-660-3684 Whiteboards SA-SO is the exclusive manufacturer of TimeWise Whiteboards. These magnetic planners are designed to fit your

More information

20480C: Programming in HTML5 with JavaScript and CSS3. Course Code: 20480C; Duration: 5 days; Instructor-led. JavaScript code.

20480C: Programming in HTML5 with JavaScript and CSS3. Course Code: 20480C; Duration: 5 days; Instructor-led. JavaScript code. 20480C: Programming in HTML5 with JavaScript and CSS3 Course Code: 20480C; Duration: 5 days; Instructor-led WHAT YOU WILL LEARN This course provides an introduction to HTML5, CSS3, and JavaScript. This

More information

Adaptive Assignment for Real-Time Raytracing

Adaptive Assignment for Real-Time Raytracing Adaptive Assignment for Real-Time Raytracing Paul Aluri [paluri] and Jacob Slone [jslone] Carnegie Mellon University 15-418/618 Spring 2015 Summary We implemented a CUDA raytracer accelerated by a non-recursive

More information

EMBEDDED COMPUTING SYSTEMS Sub Code: 10CS72 IA Marks :25 Hrs/Week: 04 Exam Hours :03 Total Hrs: 52 Exam Marks :100 PART- A

EMBEDDED COMPUTING SYSTEMS Sub Code: 10CS72 IA Marks :25 Hrs/Week: 04 Exam Hours :03 Total Hrs: 52 Exam Marks :100 PART- A EMBEDDED COMPUTING SYSTEMS Sub Code: 10CS72 IA Marks :25 Hrs/Week: 04 Exam Hours :03 Total Hrs: 52 Exam Marks :100 PART- A UNIT 1 6 Hours Embedded Computing: Introduction, Complex Systems and Microprocessors,

More information

BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, Pilani Pilani Campus

BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, Pilani Pilani Campus First Semester 2017-2018 Instruction Division Course Handout (Part II) In addition to Part I (General Handout for all courses appended to the Time Table), this portion gives further specific details regarding

More information

Choosing an Intellectual Property Core

Choosing an Intellectual Property Core Choosing an Intellectual Property Core MIPS Technologies, Inc. June 2002 One of the most important product development decisions facing SOC designers today is choosing an intellectual property (IP) core.

More information

The Parallel Software Design Process. Parallel Software Design

The Parallel Software Design Process. Parallel Software Design Parallel Software Design The Parallel Software Design Process Deborah Stacey, Chair Dept. of Comp. & Info Sci., University of Guelph dastacey@uoguelph.ca Why Parallel? Why NOT Parallel? Why Talk about

More information

What are Embedded Systems? Lecture 1 Introduction to Embedded Systems & Software

What are Embedded Systems? Lecture 1 Introduction to Embedded Systems & Software What are Embedded Systems? 1 Lecture 1 Introduction to Embedded Systems & Software Roopa Rangaswami October 9, 2002 Embedded systems are computer systems that monitor, respond to, or control an external

More information

e-pg Pathshala Subject: Computer Science Paper: Embedded System Module: Interfacing External Devices using Embedded C Module No: CS/ES/22

e-pg Pathshala Subject: Computer Science Paper: Embedded System Module: Interfacing External Devices using Embedded C Module No: CS/ES/22 e-pg Pathshala Subject: Computer Science Paper: Embedded System Module: Interfacing External Devices using Embedded C Module No: CS/ES/22 Quadrant 1 e-text In this lecture interfacing of external devices

More information

Testing and Validation of Simulink Models with Reactis

Testing and Validation of Simulink Models with Reactis Testing and Validation of Simulink Models with Reactis Build better embedded software faster. Generate tests from Simulink models. Detect runtime errors. Execute and debug Simulink models. Track coverage.

More information

Paper Prototyping. Paper Prototyping. Jim Ross. Senior UX Architect, Flickr: CannedTuna

Paper Prototyping. Paper Prototyping. Jim Ross. Senior UX Architect, Flickr: CannedTuna Paper Prototyping Paper Prototyping Jim Ross Senior UX Architect, Infragistics jross@infragistics.com @anotheruxguy Flickr: CannedTuna Paper Prototyping Jim Ross Senior UX Architect, Infragistics jross@infragistics.com

More information

MicroStrategy Desktop Quick Start Guide

MicroStrategy Desktop Quick Start Guide MicroStrategy Desktop Quick Start Guide Version: 10.4 10.4, December 2017 Copyright 2017 by MicroStrategy Incorporated. All rights reserved. Trademark Information The following are either trademarks or

More information

E-Blocks Easy GPS Bundle

E-Blocks Easy GPS Bundle Page 1 Cover Page Page 2 Flowcode Installing Flowcode Instruction for installing Flowcode can be found inside the installation booklet located inside the Flowcode DVD case. Before starting with the course

More information

Overview of Digital Design with Verilog HDL 1

Overview of Digital Design with Verilog HDL 1 Overview of Digital Design with Verilog HDL 1 1.1 Evolution of Computer-Aided Digital Design Digital circuit design has evolved rapidly over the last 25 years. The earliest digital circuits were designed

More information

Software Design. Levels in Design Process. Design Methodologies. Levels..

Software Design. Levels in Design Process. Design Methodologies. Levels.. Design Software Design Design activity begins with a set of requirements Design done before the system is implemented Design is the intermediate language between requirements and code Moving from problem

More information

e-pg Pathshala Subject: Computer Science Paper: Embedded System Module: Embedded System Design Case Study-Part I Module No: CS/ES/39 Quadrant 1 e-text

e-pg Pathshala Subject: Computer Science Paper: Embedded System Module: Embedded System Design Case Study-Part I Module No: CS/ES/39 Quadrant 1 e-text e-pg Pathshala Subject: Computer Science Paper: Embedded System Module: Embedded System Design Case Study-Part I Module No: CS/ES/39 Quadrant 1 e-text In this lecture, the design and the basic concepts

More information

e-pg Pathshala Subject: Computer Science Paper: Cloud Computing Module 23: Virtualization II Module No: CS/CC/23 Quadrant 1 e-text

e-pg Pathshala Subject: Computer Science Paper: Cloud Computing Module 23: Virtualization II Module No: CS/CC/23 Quadrant 1 e-text e-pg Pathshala Subject: Computer Science Paper: Cloud Computing Module 23: Virtualization II Module No: CS/CC/23 Quadrant 1 e-text 1. Introduction Virtualization is a necessary mechanism in a data center

More information

COMP220: SOFTWARE DEVELOPMENT TOOLS COMP285: COMPUTER AIDED SOFTWARE DEVELOPMENT

COMP220: SOFTWARE DEVELOPMENT TOOLS COMP285: COMPUTER AIDED SOFTWARE DEVELOPMENT COMP220: SOFTWARE DEVELOPMENT TOOLS COMP285: COMPUTER AIDED SOFTWARE DEVELOPMENT Sebastian Coope coopes@liverpool.ac.uk www.csc.liv.ac.uk/~coopes/comp220/ www.csc.liv.ac.uk/~coopes/comp285/ COMP 285/220

More information

Lesson 2. Introduction to Real Time Embedded Systems Part II. mywbut.com

Lesson 2. Introduction to Real Time Embedded Systems Part II. mywbut.com Lesson 2 Introduction to Real Time Embedded Systems Part II Structure and Design Instructional Objectives After going through this lesson the student will Learn more about the numerous day-to-day real

More information

IMPROVES. Initial Investment is Low Compared to SoC Performance and Cost Benefits

IMPROVES. Initial Investment is Low Compared to SoC Performance and Cost Benefits NOC INTERCONNECT IMPROVES SOC ECONO CONOMICS Initial Investment is Low Compared to SoC Performance and Cost Benefits A s systems on chip (SoCs) have interconnect, along with its configuration, verification,

More information

Statistical Techniques in Robotics (STR, S15) Lecture#06 (Wednesday, January 28)

Statistical Techniques in Robotics (STR, S15) Lecture#06 (Wednesday, January 28) Statistical Techniques in Robotics (STR, S15) Lecture#06 (Wednesday, January 28) Lecturer: Byron Boots Graphical Models 1 Graphical Models Often one is interested in representing a joint distribution P

More information

SECTION 1. System Overview Getting Started

SECTION 1. System Overview Getting Started SECTION 1 System Overview Getting Started Section 1 Page 1 Operator s Manual Devices of System The central computer uses the Cirrus /Nimbus II/Stratus II Software in the Microsoft Windows environment.

More information

Introduction to Software Testing

Introduction to Software Testing Introduction to Software Testing Software Testing This paper provides an introduction to software testing. It serves as a tutorial for developers who are new to formal testing of software, and as a reminder

More information

UNIQUE IAS ACADEMY- COMPUTER QUIZ 2

UNIQUE IAS ACADEMY- COMPUTER QUIZ 2 1. Your business has contracted with another company to have them host and run an application for your company over the Internet. The company providing this service to your business is called an a) Internet

More information

DSP/BIOS Kernel Scalable, Real-Time Kernel TM. for TMS320 DSPs. Product Bulletin

DSP/BIOS Kernel Scalable, Real-Time Kernel TM. for TMS320 DSPs. Product Bulletin Product Bulletin TM DSP/BIOS Kernel Scalable, Real-Time Kernel TM for TMS320 DSPs Key Features: Fast, deterministic real-time kernel Scalable to very small footprint Tight integration with Code Composer

More information

Copyright

Copyright Copyright NataliaS@portnov.com 1 EMULATORS vs Real Devices USER EXPERIENCE AND USABILITY User Interactions Real occurring events Overall performance Consistency in results SPECTRUM OF DEVICE CONFIGURATIONS

More information

ANALYTICS DATA To Make Better Content Marketing Decisions

ANALYTICS DATA To Make Better Content Marketing Decisions HOW TO APPLY ANALYTICS DATA To Make Better Content Marketing Decisions AS A CONTENT MARKETER you should be well-versed in analytics, no matter what your specific roles and responsibilities are in working

More information

ECE/CS 5780/6780: Embedded System Design

ECE/CS 5780/6780: Embedded System Design ECE/CS 5780/6780: Embedded System Design Scott R. Little Lecture 1: Introduction to Embedded Systems Scott R. Little (Lecture 1: Introduction) ECE/CS 5780/6780 1 / 22 Embedded systems: definition An embedded

More information

2010 HSC Software Design and Development Sample Answers

2010 HSC Software Design and Development Sample Answers 2010 HSC Software Design and Development Sample Answers This document contains sample answers, or, in the case of some questions, answers could include. These are developed by the examination committee

More information

CSE Verification Plan

CSE Verification Plan CSE 45493-3 Verification Plan 1 Verification Plan This is the specification for the verification effort. It indicates what we are verifying and how we are going to do it! 2 Role of the Verification Plan

More information

Fyndr CHRG-C 6.4A 3 USB with Type-C Car Charger + Smart Car Finder

Fyndr CHRG-C 6.4A 3 USB with Type-C Car Charger + Smart Car Finder 6.4A 3 USB with Type-C Car Charger + Smart Car Finder Powered By Change the way you charge. Find your parked car, instantly. TM 01 Contents 02 Introduction 03 Before using Fyndr 04 Inside The Box Fyndr

More information

NIOS II Instantiating the Off-chip Trace Logic

NIOS II Instantiating the Off-chip Trace Logic NIOS II Instantiating the Off-chip Trace Logic TRACE32 Online Help TRACE32 Directory TRACE32 Index TRACE32 Documents... ICD In-Circuit Debugger... Processor Architecture Manuals... NIOS... NIOS II Application

More information

Regression testing. Whenever you find a bug. Why is this a good idea?

Regression testing. Whenever you find a bug. Why is this a good idea? Regression testing Whenever you find a bug Reproduce it (before you fix it!) Store input that elicited that bug Store correct output Put into test suite Then, fix it and verify the fix Why is this a good

More information

FPGA BASED SYSTEM DESIGN. Dr. Tayab Din Memon Lecture 1 & 2

FPGA BASED SYSTEM DESIGN. Dr. Tayab Din Memon Lecture 1 & 2 FPGA BASED SYSTEM DESIGN Dr. Tayab Din Memon tayabuddin.memon@faculty.muet.edu.pk Lecture 1 & 2 Books Recommended Books: Text Book: FPGA Based System Design by Wayne Wolf Verilog HDL by Samir Palnitkar.

More information

TASKS IN THE SYSTEMS DEVELOPMENT LIFE CYCLE

TASKS IN THE SYSTEMS DEVELOPMENT LIFE CYCLE SUMMARY AND REFERENCE ACTG 313 TASKS IN THE SYSTEMS DEVELOPMENT LIFE CYCLE PREPARATION PHASE 1. Identification of the Need for a new Information System 2. Initial Feasibility Study (always flawed because

More information

plc operation Topics: The computer structure of a PLC The sanity check, input, output and logic scans Status and memory types 686 CPU

plc operation Topics: The computer structure of a PLC The sanity check, input, output and logic scans Status and memory types 686 CPU plc operation - 8.1 Topics: The computer structure of a PLC The sanity check, input, output and logic scans Status and memory types Objectives: Understand the operation of a PLC. For simple programming

More information

Calendar Description

Calendar Description ECE212 B1: Introduction to Microprocessors Lecture 1 Calendar Description Microcomputer architecture, assembly language programming, memory and input/output system, interrupts All the instructions are

More information

EC EMBEDDED AND REAL TIME SYSTEMS

EC EMBEDDED AND REAL TIME SYSTEMS EC6703 - EMBEDDED AND REAL TIME SYSTEMS Unit I -I INTRODUCTION TO EMBEDDED COMPUTING Part-A (2 Marks) 1. What is an embedded system? An embedded system employs a combination of hardware & software (a computational

More information

THE USABILITY ENGINEERING LIFECYCLE: A PRACTITIONER'S HANDBOOK FOR USER INTERFACE DESIGN (INTERACTIVE TECHNOLOGIES) BY DEBORAH J.

THE USABILITY ENGINEERING LIFECYCLE: A PRACTITIONER'S HANDBOOK FOR USER INTERFACE DESIGN (INTERACTIVE TECHNOLOGIES) BY DEBORAH J. Read Online and Download Ebook THE USABILITY ENGINEERING LIFECYCLE: A PRACTITIONER'S HANDBOOK FOR USER INTERFACE DESIGN (INTERACTIVE TECHNOLOGIES) BY DEBORAH J. MAYHEW DOWNLOAD EBOOK : THE USABILITY ENGINEERING

More information

Administrivia. ECE/CS 5780/6780: Embedded System Design. Acknowledgements. What is verification?

Administrivia. ECE/CS 5780/6780: Embedded System Design. Acknowledgements. What is verification? Administrivia ECE/CS 5780/6780: Embedded System Design Scott R. Little Lab 8 status report. Set SCIBD = 52; (The Mclk rate is 16 MHz.) Lecture 18: Introduction to Hardware Verification Scott R. Little

More information

Lex Talus Corporation

Lex Talus Corporation Lex Talus Corporation 109 East 17th Street, Suite 80 Cheyenne, WY 82001 Tel: (775) 434.0420 To: Subject: Nomad Purchaser FAQ The first thing you must do with your new Nomad is to calibrate the battery.

More information

e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Microcontrollers and Embedded Processors Module No: CS/ES/2 Quadrant 1 e-text

e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Microcontrollers and Embedded Processors Module No: CS/ES/2 Quadrant 1 e-text e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Microcontrollers and Embedded Processors Module No: CS/ES/2 Quadrant 1 e-text In this module, microcontrollers and embedded processors

More information

CS3205 HCI IN SOFTWARE DEVELOPMENT INTRODUCTION TO PROTOTYPING. Tom Horton. * Material from: Floryan (UVa) Klemmer (UCSD, was at Stanford)

CS3205 HCI IN SOFTWARE DEVELOPMENT INTRODUCTION TO PROTOTYPING. Tom Horton. * Material from: Floryan (UVa) Klemmer (UCSD, was at Stanford) CS3205 HCI IN SOFTWARE DEVELOPMENT INTRODUCTION TO PROTOTYPING Tom Horton * Material from: Floryan (UVa) Klemmer (UCSD, was at Stanford) READINGS ID Book. Chapter 11 in published book, Design, Prototyping,

More information

Course 6. Internetworking Routing 1/33

Course 6. Internetworking Routing 1/33 Course 6 Internetworking Routing 1/33 Routing The main function of the network layer is routing packets from the source machine to the destination machine. Along the way, at least one intermediate node

More information

Some Quick Terms Before we move ahead, we need to touch on a few key terms used throughout the book.

Some Quick Terms Before we move ahead, we need to touch on a few key terms used throughout the book. Getting Started Welcome to the official Apple Pro training course for Motion, Apple Computer s revolutionary real-time-design motion graphics application. This book provides a comprehensive guide to designing

More information

ECE 571 Advanced Microprocessor-Based Design Lecture 3

ECE 571 Advanced Microprocessor-Based Design Lecture 3 ECE 571 Advanced Microprocessor-Based Design Lecture 3 Vince Weaver http://web.eece.maine.edu/~vweaver vincent.weaver@maine.edu 30 January 2018 Homework #1 was posted Announcements 1 Microprocessors Also

More information

CS 147: Computer Systems Performance Analysis

CS 147: Computer Systems Performance Analysis CS 147: Computer Systems Performance Analysis Test Loads CS 147: Computer Systems Performance Analysis Test Loads 1 / 33 Overview Overview Overview 2 / 33 Test Load Design Test Load Design Test Load Design

More information

Fyndr CHRG-Q3 6.4A 3 USB with Qualcomm 3.0 Car Charger + Smart Car Finder

Fyndr CHRG-Q3 6.4A 3 USB with Qualcomm 3.0 Car Charger + Smart Car Finder 6.4A 3 USB with Qualcomm 3.0 Car Charger + Smart Car Finder Powered By Change the way you charge. Find your parked car, instantly. TM 01 Contents 02 Introduction 03 Before using Fyndr 04 Inside The Box

More information

System Design and Methodology/ Embedded Systems Design (Modeling and Design of Embedded Systems)

System Design and Methodology/ Embedded Systems Design (Modeling and Design of Embedded Systems) Design&Methodologies Fö 1&2-1 Design&Methodologies Fö 1&2-2 Course Information Design and Methodology/ Embedded s Design (Modeling and Design of Embedded s) TDTS07/TDDI08 Web page: http://www.ida.liu.se/~tdts07

More information

A Capacity Planning Methodology for Distributed E-Commerce Applications

A Capacity Planning Methodology for Distributed E-Commerce Applications A Capacity Planning Methodology for Distributed E-Commerce Applications I. Introduction Most of today s e-commerce environments are based on distributed, multi-tiered, component-based architectures. The

More information

Integrating Word, Excel, Access, and PowerPoint

Integrating Word, Excel, Access, and PowerPoint Integrating Word, Excel, Access, and PowerPoint Microsoft Office 2013 Session 1: Integrating Word and Excel Objectives: Embed an Excel chart in a Word document Edit an Excel chart in a Word document Link

More information

The Case for Virtualizing Your Oracle Database Deployment

The Case for Virtualizing Your Oracle Database Deployment June 2012 The Case for Virtualizing Your Oracle Database Deployment Much has been written about the benefits of virtualization over the last few years. Hypervisor software promises to revolutionize the

More information