CSE237a Final Exam Winter Prof. Tajana Simunic Rosing. Problem Maximum points Points earned Total 100
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1 CSE237a Final Exam Winter 2018 Name: PID: Problem Maximum points Points earned Total 100 Instructions 1. Write your name on every page. 2. Please make sure your writing is clear and readable. 3. Show your work. 4. This exam allows only one 8.5 x 11 inch cheat sheet with handwritten notes on both sides. No electronics are allowed. 5. Please sign the statement below before you begin: Honor code By signing my name below I hereby certify that I have neither given, nor received assistance in completing this examination:
2 Problem 1. [15] Write if the following statements are True (T) or False (F) 0. (Example) Today is Thursday. T 1. Dynamic Voltage and Frequency Scaling (DVFS) controls processor frequency levels to reduce leakage power. F 2. Fixed-point DSP design usually consumes less energy than floating-point design. T 3. Unlike x86 processors, ARM processors do not support SIMD. F 4. Scratch pad is used to save data that requires predictable timing. To ensure a lot of data can be fit it, scratch pad memory is built with DRAM cells. F 5. PCRAM and ReRAM offers higher density than SRAM. T 6. Kahn process network exploits finite and blocking FIFOs for communication. F 7. A real-time operating system using a monolithic kernel executes most tasks in the user space. F 8. In Harvard architectures, program instructions and data are stored in separate cache. T 9. PID design guarantees optimality and stability of the control mechanism. F 10. TTP/C requires stable clocks to control distributed real-time systems. T 11. An analog signal at frequency 400 Hz can be reconstructed without aliasing if sampled with 12kHz. 12. If a 4-bit analog-to-digital converter (ADC) can read 1.6 V maximum and 0V minimum without quantization error, the maximum quantization error of this ADC is less than 0.11V. T T 13. LIST algorithm that uses mobility as the priority metric produces an optimal schedule. F 14. Ada uses rendezvous communication mechanism. T 15. PCI Express bus is a high-speed replacement of older PCI and PCI-X based on a serial and point-to-point protocol. T
3 Problem 2. Timing and scheduling [10] a) Show the time evolution of the following distributed events using Vector time. [5] b) Consider the following four schedulers with the classification with respect to task dependencies below. ASAP (As soon as possible), ALAP (As late as possible), LIST, EDD (Earliest Due Date) Mark a right classification among follows: [5] (1) ASAP: A, ALAP: A, LIST: B, EDD: D (2) ASAP: B, ALAP: B, LIST: C, EDD: A (3) ASAP: C, ALAP: C, LIST: B, EDD: D (4) ASAP: D, ALAP: D, LIST: B, EDD: A (5) ASAP: D, ALAP: D, LIST: B, EDD: C
4 Problem 3. StateChart and FSM [15] Given the following StateChart, draw the equivalent Finite State Machine (FSM): -2: No self loop for c -2: Missing signal for each edge -7: # of states > 4-5: Misunderstanding in the edge d or e
5 Problem 4. Petri Net [20] Consider the following Petri Net N specification with P places, T transitions, A flows and W arc weights: P = {P1, P2, P3, P4, P5, P6} T = {t1, t2, t3, t4, t5} A ={(P1 t1), (P2 t2), (P3 t2), (P3 t5), (P4 t3), (P5 t3), (P5 t4), (P6 t5), (t1 P2), (t1 P3), (t2 P4), (t2 P5), (t3 P2), (t3 P3), (t4 P6), (t5 P1)} W (P3, t2) = 2, W (P2, t2) = 2, W (t3, P2) = 2, W (t3, P3) = 2 all other arc weights are 1. Given initial marking M 0 = [2, 0, 0, 0, 0, 0] for {P 1, P 2, P 3, P 4, P 5, P 6 }: a) Draw the Petri Net. [7] -3: Missing weights
6 b) Draw the reachability graph [8] c) Answer the following questions [5] - Does the graph include any transition of L0 live/dead? If so, specify the transition(s)? Yes, t5 - Does the graph include any transition of L1 live? If so, specify the transition(s)? Yes, t1 & t4 (t2 & t3 can be also included since the liveness has inclusive relationship. But this has to be consistent.) - Does the graph include any transition of L3 live? If so, specify the transition(s)? Yes, t2 & t3 - Is the net conservative? No (The number of total tokens may increase and decrease) - Is the net pure? Yes (No self loop)
7 Problem 5. SDF [20] Given the following SDF graph: a) Write the incidence matrix. Use columns to represent the nodes, and rows to represent each edge. [5] A B C D E a b c d e f g 0 - x : Inconsistent signs -2: Inconsistent sign only for x
8 b) Find value of x so that the SDF has a PASS schedule. Write your PASS schedule. Assume that the tasks are executed in the following order: A, B, C, D, E [7] x = 10 8*A 4*B 5*C 8*D 8*E -7: completely wrong answer -4: x!= 10 (If so, the PASS schedule is graded based on the equation described) -2: Any mistake for one node -4: Equations are correct, but the given schedule is wrong (e.g., 5A 10B 8C 5D 5E) c) Find the initial number of elements in each edge buffer for the PASS schedule found in b) [4] [ ] -1: Any mistake -3: Computed sizes of nodes, not on edges d) Find the minimum size required of each edge buffer. [4] [ ] -1: Any mistake -3: Computed sizes of nodes, not on edges
9 Problem 6. EDF & RM [20] Consider two processors, a general-purpose processor (GP) and a digital signal processor (DSP). The GP can run three periodic tasks, A, B, and C, using Earliest Deadline First (EDF), whereas the DSP can run three periodic tasks, C, D and E, using Rate Monotonic (RM) scheduling. The worst case execution time (WCET) on each processor and task period are shown in the table below. Task WCET on GP WCET on DSP Period A 1 - x B 1-4 C D E Assume followings in Problem 6. - All tasks arrive at the time t = 0. - If multiple tasks have the same priority, use alphabetic order to break the tie e.g., if task A and task B have the same priority, run task A first a) When the GP uses EDF to run the three tasks, A, B, and C, what is the minimum period of task A, x, to ensure all the tasks can be scheduled? [3] x = x 1 x 1.0 ( ) = x
10 c) Using x found in part a), fill scheduled tasks in the table below for the following case: [6] - The GP runs the three tasks: A, B, and C, using EDF. - The DSP runs the two tasks: D and E, using RM. Time Task on GP A B C C A B C C C A Task on DSP D E E D E E D Time Task on GP B C A B C C A B C C Task on DSP E E D E D E -3: Wrong method for either EDF or RM, -1: Any mistake c) Using x found in part a), fill scheduled tasks in the table below for the following case: [6] - The GP runs the three tasks: A and B, using EDF. - The DSP runs the two tasks: C, D and E, using RM. Time Task on GP A B A B A B Task on DSP D E E C D E E C D C Time Task on GP A B A B Task on DSP E E D C C E D E C -3: Wrong method for either EDF or RM, -1: Any mistake
11 d) Calculate the average power consumption for the two cases given in b) and c). Which one is the better choice in terms of the average power consumption? [5] Assume the followings: - The two processors run in parallel. - The GP consumes 1 W, while processing a task. - The DSP consumes 1.1 W, while processing a task. - While no task is running, the power consumption of the two processors is both 0.1 W. Case b) (20 * 1W + (20-7) * 1.1W + 7 * 0.1 W) / 20 = 1.75 W Case c) (10 * 1W + 10 * 0.1W + (20-1) * 1.1W + 1 * 0.1 W) / 20 = 1.6 W Case c is the better choice. -1: Mistake in calculation -3: Misunderstanding of average power consumption (e.g., calculating energy instead) -2: No or wrong decision This is the last page.
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