M502 Evaluation Kit User Guide

Transcription

1 M0 Evaluation Kit User Guide Overview M0 is an ARM9-based Linux ready System on Module. The M0 is equipped with an ATMEL AT9SAM9G0 SoC and features: Front View RTC M-0 Layout Rear View CN mm x pins header. ARM96EJ-S ARM Thumb Processor with 00MHz, Memory Management Unit. -KByte Data Cache and -KByte Instruction Cache. 6MB SDRAM, 8MB NAND Flash, MB DataFlash. One 0/00 Mbps Ethernet with MAC/PHY and transformer. Two USB.0 full speed ( Mbps) Host Ports, One USB client port 6. Multimedia Card Interface for SD memory card 7. Four UARTs with hardware and software flow control 8. On board Real Time Clock with Lithium battery 9. IC bus 0. Programmable Digital I/O Port. 8-bit external local bus interface. Serial Peripheral Interface (SPI) Ports. Linux.6.9 OS JP Internal use SD bus 8-bit Local Bus IS bus Φ mm (M) Debug Port JP JTAG Port CON JP/JP Internal use Function Block Diagram ARM9 NAND Flash SDRAM Battery RTC/WD CN mm x pins header USB Client x USB Host x UART x CN mm x pins header Linux.6.9 OS is pre-installed in the flash disk of M0 and many powerful utility programs are also included. GNU C/C++ tool chain are shipped with M0 in CD. Therefore, M0 is ready to drop in your design to save your time in software porting and hardware debug. IC bus SPI bus Data Flash GPIO GPIO PHY LAN Coil RS- Serial Console

2 M0 Hardware Specifications SoC: ATMEL AT9SAM9G0 CPU: ARM96EJ-S ARM Thumb Processor with Memory Management Unit (MMU) Clock: 00MHz SDRAM: 6MB Flash: 8MB NAND Flash and MB Data Flash Ethernet: 0/00 Mbps with MAC/PHY and Transformer PHY: DAVCOM DM96 Transformer:. KV isolation Signal: ETX0+, ETX0-, ERX0+, ERX- USB Host: USB.0 full speed (Mbps) Host x Signal: UDataA+, UDataA-, UDataB+, UDataB- USB Device: DDP (data+), DDM (data-), UDIO (I/O) UART: Four Universal Asynchronous Receiver and Transmitter Data Bits: to 9 bits Parity: None, Even, Odd, Mark, Space Stop:,., bits Baud Rate: Up to 9.6 Kbps Flow Control: RTS/CTS, XON/XOFF, None RS8 Driver Control Signal (RTS0~RTS) Signal Level: CMOS/.V compatible COM: TXD0, RXD0, RTS0, CTS0 (Software configurable RS-/8 mode) COM: TXD, RXD, RTS, CTS, DCD, DTR, DSR (Software configurable RS-/8 mode) COM: TXD, RXD, RTS, CTS (Software configurable RS-/8 mode) COM: TXD, RXD, RTS, CTS (Software configurable RS-/8 mode) Inter-IC Bus: (IC Bus) Compatible with standard two-wire serial memory interface Supported Devices: (built-in) Real Time Clock: ST MT8 (option:ricoh RSC7A) Watchdog Timer: ST MT8 Backup battery: Lithium Battery (BR V 8mAh) GPIO controller: NXP PCA99 ( GPIO) Signal: TWD, TWDK IS (internal IC Sound): Transmitter: TSCK, TWS, TSD Receiver: RSCK, RWS, RSD Supported Device: Audio codec TI TLV0AIC Serial Peripheral Interface: (SPI) Two chip Selects with external decoder Three wires signals: MISO, MOSI and SPCK clock Signal: MISO, MOSI, SPCK, CS, CS Supported Device: ATMEL Dataflash Multimedia Card Interface Compatible with SD memory card Specification.0 Signal: MCCDA, MCCK, MCDA0, MCDA, MCDA, MCDA Programmable DIO ( I/O Controller NXP PCA99) General Purpose I/O can be programmable as digital input or output Signal Level: CMOS/TTL Compatible Input: Low level: -0.V min +0.9V max High level: +.V min +.V max Output: Low level: +0.V 8mA High level: +.8V 8mA Signal: I/O_0 to I/O_ Note: PIO to PIO are reserved for RS-//8 interface selection for serial ports to. Please contact Artila if you want to use PIO to PIO. External Bus Interface: 8-bit data bus Signal: D0~D7 8-bit address bus Signal: A0~A7 Chip Selection Signal: NCS0/NCS/NCS6 Signal Level: CMOS/.V Predefine Pins: Reset Button (CN, pin#, RST#), input Buzzer (CN, pin#7, BUZR), output System ready LED (CN, pin#8, RDY_LED), output LAN activity LED (CN, pin#, ACT_LED), output DIP_SW0, DIP_SW, input Debug Port: JP Serial Console: RS- TX/RX Signal: DTXD_, DRXD_ JTAG: For low level debug Signal: NTRST, TDI, TMS, TCK, TDO Power: Input:.0 to.6vdc (.V nominal) Consumption:.W

3 OS: Linux.6.9 Boot Loader: U-Boot.. File System: JFFS, EXT/EXT, VFAT/FAT, NFS Protocol Stacks: IPV, ICMP, ARP, DHCP, NTP, TCP, UDP, FTP, Telnet, HTTP, PPP, PPPoE, CHAP, PAP, SMTP, SNMP V/V, SSL, SSH / Utilities: Bash: Shell Command Tinylogin: Login and user manager utility Telnet: Telnet client program Busybox: Linux utility collection FTP: FTP client program Daemon pppd: Dial In/out over serial port and PPPoE snmpd: SNMP agent program telnetd: Telnet server program inetd: TCP server program ftpd: FTP server program boa: Web server program sshd: secured shell server iptables: Firewall service manager armd: Artila manager daemon Tool Chain for Windows/Linux GCC: C/C++ PC cross compiler GLIBC: POSIX Library Standard Device Drivers: ttys0: serial console port (AT9SAM9G0 debug port) ttys~ttys: serial ports (AT9SAM9G0 UART0~UART) gpio: General Purpose I/O ( Controller NXP PCA99) mmc: SD/MMC: rtc: Real Time Clock (ST mt8) sda: USB flash memory disk ttyacm: USB Modem ttyusb: USB RS- adaptor spi: spi bus Default Setting Default IP Address: Netmask:...0 ssh Login: root Password: root Telnet Login: guest Password: guest Terminal type: VT00 M0 Software Specifications I/O Devices Control M-0 uses standard I/O device control to access following devices:. Ethernet: eth0. Serial Ports: ttys, ttys, ttys,ttys. Serial Console Port: ttys0. Real time clock: rtc0. USB Flash Disk: sda, sda, sdb, sdb 6. SD memory Card: mmc0 7. USB WLAN dongle: wlan0 8. USB Serial Cable: ttyusb0, ttyusb 9. SPI bus: spi0, spi Remark: Remember to include the matrix0.h header file in your program. Please refer to the example program included in the M-0 SDK CD to demo the RS-//8 mode configuration of serial port configuration. File System Matrix 0 uses ubi file system for the built-in flash memory disk. The files system is stored at NAND flash memory. Mount External Disk To mount the USB Flash Disk and SD memory card, use following commands after the disk are installed properly. To mount USB disk mount /mnt/sda or mount /mnt/sda or mount /mnt/sdb or mount /mnt/sdb To find out the device name of the USB disk, you can use dmesg grep sd And to mount SD memory card mount /mnt/mmc Web Page Directory The web pages are placed at /usr/www and the /etc/lighttpd.conf contains the lighttpd web server settings. The home page name should be index.html Welcome Message The welcome message Artila can be modified by editing the / etc/motd file. Manager Utility Software The Manager Utility software, manager.jar is a java program and is used to discovered the Matrix 0 in the network if the IP address is forgotten. It can be run at any OS where java run time is available. To install the java run time platform at your computer, please visit and download the Java Standard Edition (JSE). Once the Matrix 00 is found, you can click the Telnet Console to configure the Matrix 00 Note: Please refer to the software guide for the software operation!!

4 Pin Assignment and Definition Function CPU SoM SoM CPU Function CN (Addr Bus) A0 D0 (Data Bus) (Addr Bus) A D (Data Bus) (Addr Bus) A 6 D (Data Bus) (Addr Bus) A 7 8 D (Data Bus) (Addr Bus) A 9 0 D (Data Bus) (Addr Bus) A D (Data Bus) (Addr Bus) A6 D6 (Data Bus) (Addr Bus) A7 6 D7 (Data Bus) (Write Enable) NWE NWR0 7 8 NRD (Read Enable) (USB-Device-) DDM DDM 9 0 CS NCS (Chip Select) (Chip Select) NCS6 CS6 CS0 NCS0 (Chip Select) (USB-Device+) DDP DDP IRQ0 (Interrupt 0) (Console TXD) DTXD_ 6 DRXD- (Console RXD) VCC 7 8 CN

5 Pin Assignment and Definition Function CPU SoM SoM CPU Function CN (COM) CTS DSR (COM) (COM) RTS RXD (COM) (COM) TXD 6 CTS (COM) (COM) RTS 7 8 TXD (COM) (COM) RXD 9 0 RTS (COM) (COM) CTS DIP_SW PB (DIP_SW) (DIP_SW) PB DIP_SW PIO6 I/O_6 (GPIO) (GPIO) I/O_7 PIO7 6 PIO8 PC/PCK0 (GPIO) (GPIO) I/O_9 PIO9 7 8 PIO0 I/O_0 (GPIO) (GPIO) I/O_ PIO 9 0 PIO I/O_ (GPIO) (GPIO) I/O_ PIO PIO I/O_ (GPIO) (GPIO) I/O_ PIO PIO6 I/O_6 (GPIO) (GPIO) I/O_7 PIO7 6 PIO8 I/O_8 (GPIO) (USB B+) HDPB UdataB+ 7 8 UdataB- HDMB (USB B-) (USB A-) HDMA UdataA- 9 0 UdataA+ HDPA (USB A+) (GPIO) I/O_9 PIO9 PIO0 I/O_0 (GPIO) (GPIO) I/O_ PIO VCC PWROK (System Reset) (Reset Btn) BTNRST# 6 UDIO (USB-Device I/O) (Buzzer) PA6 BUZR 7 8 PC6 (System Ready LED) (IS transmitter) TF0 TWS 9 0 TSCK TK (IS transmitter) (IS transmitter) TD0 TSD RSD RD (IS receiver) (IS receiver) RK0 RSCK RWS RF (IS receiver) VCC 9 0 VCC CN

6 Pin Assignment and Definition Function CPU SoM SoM CPU Function CN VCC VCC 6 (LAN) ERX0-7 8 ERX0+ (LAN) (LAN) ETX0-9 0 ETX0+ (LAN) (LAN LED) ACTLED# MISO (SPI) (SPI) MOSI SPCK (SPI) (SPI) NPCS0 6 NPCS (SPI) (SD) MCCK 7 8 MCCDA (SD) (SD) MCDA0 9 0 MCDA (SD) (SD) MCDA MCDA (SD) (Card Detect) SDCD SDWP (SD Write Protect) (IC) TWD 6 TWCK (IC) (GPIO) I/O_ PIO 7 8 PIO I/O_ (GPIO) (GPIO) I/O_ PIO 9 0 PIO I/O_ (GPIO) (GPIO) I/O_6 PIO6 PIO7 I/O_7 (GPIO) (GPIO) I/O_8 PIO8 PIO9 I/O_9 (GPIO) (GPIO) I/O_0 PIO0 6 PIO I/O_ (GPIO) (GPIO) I/O_ PIO 7 8 PIO I/O_ (GPIO) (GPIO) I/O_ PIO 9 0 PIO PC (GPIO) (GPIO) I/O_0 PIO0 PIO I/O_ (GPIO) (COM) TXD RXD (COM) (COM) CTS 6 RTS (COM) (COM) DTR 7 8 TXD (COM) (COM) RXD 9 0 DCD (COM) CN

7 M0 Evaluation Board Layout LAN Reset Button GPIO 0~ Power +9~0VDC USB.0 Host CN DIP Switches Power LED Ready LED CN LAN Link/Act GPIO 6~ CN8 CN LED COM ~ CN7 COM RS- RS- RS-8 COM RS- With RTS CTS COM RS- With RTS CTS COM RS- With RTS CTS

8 Pin Assignment of Connectors LAN COM Port CN8 Local Bus Connector. x Pin Header Pitch.mm. CN8 directly connect to CN of M0 GPIO Port 0~ and GPIO Port 6~ +V V DIO DIO DIO DIO0 DIO DIO DIO8 9 0 DIO9 DIO6 7 8 DIO 6 DIO7 DIO DIO DIO DIO0 DIO JP Serial Console Port TxD RxD VCC JP of M0 Boot Mode Selection Jumper A0 A A A A A A6 A7 NWE_NWR0 DDM PC/NCS6 DDP DTXD_ VCC D0 D D D D D D6 D7 NOE_NRD NCS NCS0 IRQ0 DRXD_ +V DIO0 DIO8 DIO6 DIO DIO DIO0 DIO8 DIO6 -: Internal ROM -: External Flash (Default) CN7 (SPI) Pin Assignment MISO (Master In Slave Out) V DIO DIO9 DIO7 9 0 DIO DIO DIO DIO9 DIO7 CON JTAG Connector VCC (.V) TDO VCC_PWROK NTRST TDI TMS TCK MOSI (Master Out Slave In) SPCK (SPI Serial Clock) NPCS0 (SPI Chip Select 0) NPCS (SPI Chip Select )